| Kulig et al., “System and Method for Controlling Transmission of Data Packets Over an Information Network”, pending U.S. patent application. |
| Lockwood et al., FPGrep and FPSed: Regular Expression Search and Substitution for Packet Streaming in Field Programmable Hardware, unpublished |
| Berk, Elliott, “JLex: A lexical analyzer generator for Java™”, downloaded from http://www.cs.princeton.edu/˜appel/modern/java/Jlex/ in Jan. 2002. |
| Braun et al., “Layered Protocol Wrappers for Internet Packet Processing in Reconfigurable Hardware”, Proceedings of Hot Interconnects 9 (Hotl-9) Stanford, CA, Aug. 22-24, 2001, pp. 93-98. |
| Lockwood, J., “Evolvable Internet Hardware Platforms”, NASA/DoD Workshop on Evolvable Hardware (EHW'01), Long Beach, CA, Jul. 12-14,2001, pp. 271-279. |
| Lockwood, J., “Platform and Methodology for Teaching Design of Hardware Modules in Internet Routers and Firewalls”, IEEE Computer Society International Conference on Microelectronic Systems Education (MSE'2001), Las Vega, NV, Jun. 17-18, 2001, pp. 56-57. |
| Shah, N., “Understanding Network Processors”, Version 1.0, University of California-Berkeley, Sep. 4, 2001. |
| Keutzer et al., “A Survey of Programmable Platforms—Network Proc”, University of California-Berkeley. |
| Lockwood et al., Reprogrammable Network Packet Processing on the Field Programmable Port Extender (FPX), ACM International Symposium on Field Programmable Gat Arrays (FPGA'2001), Monterey, Ca, Feb. 2001, pp. 87-93. |
| Lockwood, J., “An Open Platform for Development of Network Processing Modules in Reprogrammable Hardware”, IEC DesignCon 2001, Santa Clara, CA, Jan. 2001, Paper WB-19. |
| Lockwood et al., Field Programmable Port Extender (FPX) for Distributed Routing and Queuing, ACM International Symposium on Field Programmable Gate Arrays (FPGA'2000), Monterey, CA, Feb. 2000, pp. 137-144. |
| Choi et al., “Design of a Flexible Open Platform for High Performance Active Networks”, Allerton Conference, Campaign, Il, 1999. |
| Fu et al., The FPX KCPSM Module: An Embedded, Reconfigurable Active Processing Module for the Field Programmable Port Extender (FPX), Washington University, Department of Computer Science, Technical Report WUCS-01-14 Jul., 2001. |
| Lockwood et al., Hello, World: A Simple Application for the Field Programmable Port Extender (FPX), Washington University, Department of Computer Science, Technical Report WUCS-00-12 Jul. 11, 2000. |
| Taylor et al., “Generalized RAD Module Interface Specification of the Field Programmable Port Extender (FPX) Version 2”, Washington University, Department of Computer Science, Technical Report, Jan. 8, 2000. |
| Lockwood et al., “Parallel FPGA Programming over Backplane Chassis”, Washington University, Department of Computer Science, Technical Report WUCS-00-11, Jun. 12, 2000. |
| “The Field-Programmable Port Extender (FPX)”, downloaded from http://www.arl.wustl.edu/art/ in Mar. 2002. |
| “Overview”, Field Programmable Port Extender: Jan. 2002 Gigabit Workshop Tutorial, Washington University, St. Louis, MO, Jan. 3-4, 2002. |
| Lockwood, J., “Introduction”, Field Programmable Port Extender: Jan. 2002 Gigabit Workshop Tutorial, Washington University, St. Louis, MO, Jan. 3-4, 2002. |
| Lockwood, J., “Building Networks with Reprogrammable Hardware”, Field Programmable Port Extender: Jan. 2002 Gigabit Workshop Tutorial, Washington University, St. Louis, MO, Jan. 3-4, 2002. |
| Taylor et al., “Modular Design Techniques for the FPX”, Field Programmable Port Extender: Jan. 2002 Gigabit Workshop Tutorial, Washington University, St. Louis, MO, Jan. 3-4, 2002. |
| Lockwood, J., “Protocol Processing on the FPX”, Field Programmable Port Extender: Jan. 2002 Gigabit Workshop Tutorial, Washington University, St. Louis, MO, Jan. 3-4, 2002. |
| Lockwood, J., “Simulation and Synthesis”, Field Programmable Port Extender: Jan. 2002 Gigabit Workshop Tutorial, Washington University, St. Louis, MO, Jan. 3-4, 2002. |
| Lockwood, J., “Hardware Laboratory Configuration”, Field Programmable Port Extender: Jan. 2002 Gigabit Workshop Tutorial, Washington University, St. Louis, MO, Jan. 3-4, 2002. |
| Lockwood, J., “Simulation of the Hello World Application for the Field-Programmable Port Extender (FPX)”, Washington University, Applied Research Lab, Spring 2001 Gigabits Kits Workshop. |
| “Lucent Technologies Delivers “Payload Plus” Network Processors for Programmable, Multi-Protocol, OC-48c Processing”, Lucent Technologies Press Release, downloaded from http://www.lucent.com/press/1000/0010320.meb.html on Mar. 21, 2002. |
| Payload Plus™ Agere System Interface, Agere Systems Product Brief, Jun. 2001, downloaded from Internet, Jan. 2002. |
| Sidhu et al., “Fast Regular Expression Matching using FPGAs”, IEEE Symposium on Field Programmable Custom Computing Machines (FCCM 2001), Apr. 2001. |
| Sidhu et al., “String Matching on Multicontext FPGAs using Self-Reconfiguration”, FPGA '99: Proceedings of the 1999 ACM/SIGDA 7th International Symposium on Field Programmable Gate Arrays, Feb. 1999, pp. 217-228. |
| Franklin et al., “Assisting Network Intrusion Detection with Reconfigurable Hardware”, Symposium on Field-Programmable Custom Computing Machines (FCCM 2002), Apr. 2002, Napa, California. |
| Baer, Jean-Loup; Computer Systems Architecture; 1990; pp. 262-265; Computer Science Press; Potomac, Maryland. |
| Hayes, John P.; Computer Architecture and Organization; Second Edition; 1988; pp. 448-459: McGraw-Hill. Inc. |
| Patent Cooperation Treaty, International Search Report; Jul. 10, 2003. |
| Hollaar, Lee A.; Hardware Systems for Text Information Retrieval; Proceedings of the Sixth Annual International ACM Sigir Conference on Research and Development in Information Retrieval; Jun. 6-8, 1983; pp.3-9; Baltimore Maryland USA. |
| Pramanik et al.; A Hardware Pattern Matching Algorithm on a Dataflow; Computer Journal; Jul. 1, 1985; pp. 264-269: vol. 28. No. 3: Oxford University Press. Surrey, Great Britain. |