The invention relates generally to electronic circuitry and, more particularly, to bandgap reference circuits that produce reference voltages for use by electronic circuitry.
Virtually all systems that manipulate analog, digital or mixed signals utilize at least one reference voltage as a basis for other operations in the system. The reference voltage should be reproducible every time the circuit is powered up, and must remain relatively unchanged over process, voltage and temperature (PVT) variations. A well known conventional technique for producing a reference voltage is the semiconductor bandgap reference circuit, also referred to as a bandgap reference. A bandgap reference circuit relies on the bandgap energy of the underlying semiconductor material. Such bandgap reference circuits are well known in the art. Conventional examples of such bandgap reference circuits can be found, for example, in U.S. Pat. Nos. 6,075,407 and 6,281,743, both of which are incorporated herein by reference.
In addition to the aforementioned requirement that bandgap reference circuits provide adequate performance over PVT variations, many applications also require the bandgap reference circuit to operate at vary low supply currents, and to be as small as possible.
One factor that can significantly impact the performance of a bandgap reference circuit is the input offset of the control loop amplifier (error amplifier). The offset is typically multiplied by approximately 10 in most bandgap designs. This multiplication factor can translate a relatively small offset error at the amplifier input into a relatively large error at the amplifier output. Trimming can provide a limited solution to the offset problem, but usually only at a single nominal temperature, not across the entire operating temperature range. Choppers have is also been conventionally utilized to solve offset problems, but they are not particularly effective in some applications, for example, low drop out amplifiers (LDOs) and switched power supplies.
It is desirable in view of the foregoing to provide bandgap reference circuit designs which provide adequate performance over PVT variations, operate at low currents, produce a relatively compact circuit footprint, and overcome offset problems.
Exemplary embodiments of the invention improve bandgap reference circuit performance by increasing ΔVBE, and thereby correspondingly decreasing the input sensitivity of the error amplifier in the control loop. Some embodiments increase ΔVBE by presenting stacked diode configurations at the amplifier inputs, other embodiments increase ΔVBE by increasing the diode ratio presented at the amplifier inputs, and other embodiments increase ΔVBE by providing a higher current in the CTAT leg than in the PTAT leg. The stacked diode configuration is achieved by producing isolated diodes with a triple well CMOS process. The stacked diode configuration and the triple well CMOS process also permit some embodiments to utilize in the input stage of the amplifier N-channel transistors operating in the threshold region.
Before undertaking the DETAILED DESCRIPTION OF THE INVENTION below, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document: the terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation; the term “or,” is inclusive, meaning and/or; the phrases “associated with” and “associated therewith,” as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, or the like; and the term “controller” means any device, system or part thereof that controls at least one operation. A controller may be implemented in hardware, firmware or software, or some combination of at least two of the same. It should be noted that the functionality associated with a controller may be centralized or distributed, whether locally or remotely. Definitions for certain words and phrases are provided throughout this patent document, those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior, as well as future uses of such defined words and phrases.
For a more complete understanding of the present invention and its advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, in which like reference numerals represent like parts:
The drop across the resistor in the PTAT (proportional to absolute temperature) leg of a conventional bandgap reference circuit is commonly referenced to as ΔVBE, because it represents the difference between the voltage drops (base-emitter voltages) of the respective diode structures in the PTAT and CTAT (complementary to absolute temperature) legs of the circuit. In a typical conventional bandgap circuit, ΔVBE is around 50 millivolts. The sum of the multiplied ΔVBE and the diode potential (about 0.6 volts) must be equal to approximately 1.22 volts, the bandgap voltage. Accordingly, the error amplifier must typically introduce a ΔVBE multiplication factor of 10 in order to produce the desired bandgap voltage. As mentioned above, however, this 10× multiplication can turn a relatively small offset error at the amplifier input into a relatively large error at the amplifier output. Exemplary embodiments of the invention make the initial ΔVBE larger, thereby permitting a corresponding reduction in the multiplication factor applied by the error amplifier. This reduces the impact of offset errors that occur at the amplifier input.
One direct way to increase the ΔVBE of a conventional bandgap reference circuit is to replace every diode in both the CTAT and PTAT legs with two series-connected diodes. The use of two series-connected diodes in place of a single diode is also referred to herein as diode stacking, or a stacked diode configuration. This use of stacked diode arrangements in the CTAT and PTAT legs doubles the voltage drops across the respective diode structures in the CTAT and PTAT legs, which in turn doubles the ΔVBE of the circuit. As indicated above, such an increase in ΔVBE reduces the sensitivity of the amplifier to input offset errors.
However, it is not possible to produce completely isolated diodes in a conventional bulk CMOS process. Accordingly, it would be impractical at best to attempt to produce a stacked diode configuration of the type described above using a bulk CMOS process. The present invention recognizes that isolated diode structures can be produced using a conventional triple well CMOS process. This is illustrated generally in
Referring to
The current source structure 34 provides a replicated mirrored topology for isolating the bandgap portion 35 and sub-bandgap portion 36 from the CTAT and PTAT legs 31 and 32. The bandgap portion 35, sub-bandgap portion 36, and current source structure 34 all share the common amplifier 30. This provides a more compact and integrated structure than the prior art, wherein each of the current source, bandgap portion and sub-bandgap portion requires its own dedicated amplifier.
The CTAT leg 31 includes a pair of diodes connected in series, or stacked, between the inverting input of amplifier 30 and a ground reference potential. The PTAT leg 32 includes a resistor RX connected in series with a diode arrangement 33 between the non-inverting input of amplifier 30 and the ground reference potential. In the example of
In some embodiments, the current source 34A mirrors into the CTAT leg 31 twice as much current as the current source 34B mirrors into the PTAT leg 32. This effectively doubles the ratio of the diode area in PTAT leg 32 to the diode area in CTAT leg 31. So doubling the current in the CTAT 31 changes the diode ratio between the 2 legs from 6:1 to 12:1. This further increases ΔVBE and further correspondingly decreases the effect of offset errors at the amplifier input.
In some embodiments, the resistance RX provides a resistance value that is substantially constant (flat temperature coefficient) over the operating temperature range. This can be accomplished, for example, by a series combination of two separate resistors having approximately equal resistance values, with one of the separate resistances having a positive temperature coefficient and the other separate resistance having a complementary negative temperature coefficient. For example, one of the separate resistances can be an N-well resistor, and the other of the separate resistances can be a poly resistor. Because the resistance value of RX remains substantially constant over temperature, and because ΔVBE has a PTAT characteristic, the amplifier 30 and the current source structure 34 will cooperate to produce a PTAT current through the resistance RX of the PTAT leg 32. This means that all currents produced by the current source structure 34 under control of the amplifier 30 will be PTAT currents. Note also that a PTAT current flowing through a CTAT device such as a diode will have only a negligible impact on the CTAT characteristic of the diode.
In the bandgap portion 35, the bandgap voltage 37 is realized by passing PTAT current from the current source arrangement 34 through a diode 300. As indicated above, the diode 300 will exhibit a CTAT characteristic. The voltage across the diode (0.6 volt drop) is summed with the voltage across the resistance R2 to produce the bandgap voltage at 37. In some embodiments, R2 is produced in the same manner as RX to exhibit a flat temperature coefficient. The value of the resistance R2 is selected to give a 0.6 volt drop when driven with the PTAT current from the current source 34D. In some embodiments, the current source 34D mirrors the same current provided by the current source 34A, and the current source 34C mirrors the same current provided by the current source 34B. The voltage drop across resistance R2 is a PTAT voltage because a PTAT current flows through a flat temperature coefficient resistance. Accordingly, the CTAT voltage characteristic of the diode 300 is combined with the PTAT voltage characteristic of the resistance R2, thereby producing the desired bandgap reference voltage at 37.
In the sub-bandgap portion 36, a resistor divider is connected to divide the voltage drop across a diode 301. The resistances R3 and R4 of the resistor divider are flat temperature coefficient resistances (which in some embodiments are constructed in the same manner described above with respect to RX). The resistance R3 effectively interconnects a CTAT leg (diode 301) with a PTAT leg (resistance R4), thereby providing at 38 the desired combination of CTAT and PTAT characteristics at a sub-bandgap voltage level, for example 0.5 volts. In some embodiments, the current source 34E mirrors the same current provided by current sources 34B and 34C, and the current source 34F provides 1.5 times as much current as the current source 34E.
The bandgap reference circuit of
The stacked diode arrangements at 31 and 33 also guarantee that the voltages at the amplifier inputs will exceed the threshold of an N-channel transistor. It is therefore possible to use N-channel transistors in the input stage of the amplifier 30, and to operate those N-channel transistors in the threshold region. Conventional bandgap reference circuits do not permit operation of N-channel input transistors in the threshold region. N-channel devices are generally preferable to P-channel devices in the amplifier input stage for numerous reasons, including superior transconductance, superior gain, and smaller size. However, in a conventional bulk CMOS process, the bulk contacts of all N-channel devices are defined by the substrate, and are therefore effectively tied together. Accordingly, the N-channel transistors cannot be isolated from one another, and the bulk contact of a given N-channel transistor cannot be connected to the source of that transistor. The offset error of the amplifier is increased dramatically if the bulk contact of an input stage transistor cannot be tied to its source.
However, and referring now to
Accordingly, using a conventional triple well CMOS process and stacked diode configurations in the CTAT and PTAT legs 31 and 32, the input stage of the amplifier 30 of
Although the present invention has been described with exemplary embodiments, various changes and modifications may be suggested to one skilled in the art. It is intended that the present invention encompass such changes and modifications as fall within the scope of the appended claims.
Number | Name | Date | Kind |
---|---|---|---|
6052020 | Doyle | Apr 2000 | A |
6075407 | Doyle | Jun 2000 | A |
6281743 | Doyle | Aug 2001 | B1 |
6462612 | Roh et al. | Oct 2002 | B1 |
6507179 | Jun et al. | Jan 2003 | B1 |