The invention relates to a semiconductor device, and more particularly to a method of improving body contacted silicon on insulation (SOI ) field effect transistors (FET) with the use of a halo implantation process.
Body contacted devices in Partially-Depleted SOI, PDSOI, are key analog components used in PLLs, small-swing receivers, and the like. As is well known in the art of semiconductor fabrication, in PDSOI, the depletion/inversion layer under the gate is thinner than the Si active layer. In the body contacted devices, low-resistance contact to the body must be assured, and accurate models provided early in the program development. Increasing halo or well dose later in the program upsets the body-effect and drive of the FET. Also, such increases in the halo or well dose later in the program can require redesign of the device, with associated delay and cost.
In standard SOI FET, the source and drain are formed in an epitaxial layer of silicon disposed on the silicon oxide-insulating layer. In SOI technology, if the body of an SOI transistor device floats, e.g., is not connected to a voltage source, the device characteristics and threshold voltage may vary with the switching history which the device experiences in actual operation. To cure such deficiencies, it is known to form a contact to the body of the device in order to allow the body to be connected to a potential source. This may be done by use of a vertical gate line; however, known contact bodies have high resistance, which impart deleterious characteristics to the device.
By way of example, in known body contacts, the body contact is doped in the same concentration as that of the active region of a semiconductor device. This doping can affect many performance characteristics of the semiconductor device. For example, if the body doping concentration is increased in order to reduce the body-contact resistance, the threshold voltage of the device will increase in correspondence. Accordingly, under certain circumstances, a semiconductor device, with increased body doping to reduce body contact resistance, will tend to require higher gate voltage to conduct and to conduct less for a given voltage applied to the gate. Yet another problem for body-contacted devices is the potential for the existence of a ‘sneak path’ for current between the source and the drain adjacent to the device channel and beneath the region of the gate electrode which provides isolation between the body contact and the source/drain regions. When body doping is too low beneath this isolation region and adjacent to the source and drain regions, a parasitic channel can form between the source and drain which degrades operation of the device. This sneak path can be particularly exacerbated when the body-contacted device is operated at voltages, with respect to the substrate voltage, that tend to invert the body, providing a ‘back-gating’ action on this sneak path. Thus it is desirable to achieve low resistance the body contact, and to eliminate sneak paths, while maintaining low threshold voltage of the device.
In a first aspect of the invention, a method of manufacturing a device includes providing a substrate including a gate structure comprising an active region and a contact body region. The method also includes forming a first impurity region under the contact body region at a higher dose than that under the active region.
In another aspect of the invention, the method comprises providing a substrate having a gate structure comprising an active gate electrode and an isolating gate electrode. The active gate electrode and the isolating gate electrode are not parallel to one another. The method further includes forming a first impurity region under an edge of the isolating gate electrode at a higher dose than that under the active gate electrode. The first impurity is not formed under the active gate electrode.
In another aspect of the invention, a semiconductor device comprises a device having an active channel region and at least one isolating channel region substantially orthogonal to the active channel region. The active channel region and the at least one isolating channel region have a doped region at a first concentration and the isolating channel region has a doped region at a second, higher concentration which does not substantially affect the active channel region of the device. The second, higher concentration is configured to lower a resistance in a body-contact parasitic region of the isolating channel region and suppress a back-gate “sneak path’” for leakage.
The invention relates to a semiconductor device, and more particularly to a method of improving body contacted SOI FETs with a halo implantation process on the body contact region. In accordance with the invention, a channel region of an FET is formed in a first direction on the substrate (e.g., x-direction) and comprises a first halo implant in the channel region of a first dopant type at a first concentration. A body contact region is formed in another direction (e.g., y direction) and comprises a second halo implant of the first dopant type at a second concentration different than the first concentration (preferably at a higher concentration). In accordance with the invention, the second halo implant reduces body contact resistance, to name but few features.
Referring to
As should be understood, the starting structure is formed by any of the suitable methods for forming the respective structures. Thus, the gate dielectric 16 may be formed, for example, from an oxide, a nitride, or high k material, and may include SiO2, for example. The gate 18 (and vertical gate line 18a) may be formed from, for example, a polysilicon. Also, the gate dielectric 16 may be in the range of approximately 0.7 nm to 2 nm, and may also vary from these specifications, depending on the specific applications. The gate 18 may range from about 50 nm to 150 nm in length, for example.
Referring to
In one embodiment, the dose of the halo implantation is in the range of 2×1013 cm−2 to about 2×1014 cm−2 at a relatively high energy such as, for example, 120 KeV for As.
In this process, the implantation includes, for example, doping the device with a donor element, e.g., P, As, Sb, etc. for a pMOSFET device, and an acceptor element, e.g., B, In, BF2, etc. for an nMOSFET device. Thus, the type of dopant used in the halo implantation process, in accordance with the invention, will be the type of dopants used for the initial halo implantation.
By using the halo implantation, at a higher energy and dose, it is now possible to reduce the body resistance at the bottom of the body, itself. Thus, in the method and structure of the invention, the higher dose and energy will reduce the higher resistance in the body.
Also, a previously discussed, by using the halo implantation, at a higher energy and dose, it is now possible to reduce the body resistance at the bottom of the body, itself. Thus, in the method and structure of the invention, the higher dose and energy will reduce the higher resistance in the body. In one embodiment, the dose of the halo implantation is in the range of 2×1013 cm−2 to about 2×1014 cm−2 at a relatively high energy such as, for example, 120 KeV for As, and utilizing the same elements as described above.
Thus, embodiments include a method and device to provide a doping concentration in an active region of a semiconductor device with an increased doping concentration of the body contact, e.g., vertical gate line. In accordance with the invention, in the halo implantation, the ions reach though the body contact, with less dosage or concentration of implant being received in the active channel region, itself. In this way, the halo implantation process of the invention controls the threshold voltage, while reducing the contact resistance between the body contact and the lower structure. Also, by using the invention, the body contact is greatly improved over conventional devices while only minor affect to the FET by providing a strong halo ion-implant in the direction of a T or H-body gate, but only the conventional dose halo along the active gate. This provides low resistance in the body-contact parasitic region and also suppresses a back-gate “sneak path’” for leakage that has otherwise be observed in such designs.
Normal process steps to finish building devices (including spacer formation, source drain implantation, source/drain annealing, and metalization) can be implemented after the implantation steps of
While the invention has been described in terms of exemplary embodiments, those skilled in the art will recognize that the invention can be practiced with modifications and in the spirit and scope of the appended claims.