Patent Application
20140160104
1. Field of the Invention
The disclosed embodiments of the present invention relate to a driver of a liquid crystal display module (LCM), and more particularly, to a display driving method and an associated driving circuit.
2. Description of the Prior Art
When an amplifier array of a conventional driving circuit drives a capacitive load, the conventional driving circuit needs to provide sufficient charges in order to charge an equivalent capacitance of the capacitive load to a required voltage level, which results in huge power consumption. To solve the problem, charge reuse methods are provided in the related art. The charge reuse methods, however, usually cause side effects, such as too many control phases needed and slower response speed. Thus, a novel driving method is needed to mitigate the aforementioned side effects and further enhance efficiency of a driving circuit.
It is therefore one objective of the present invention to provide a display driving method and a related driving circuit to solve the above problems.
It is therefore another objective of the present invention to provide a display driving method and a related driving circuit to mitigate the aforementioned side effects and further enhance overall efficiency of a display apparatus (or an electronic apparatus having a display module).
According to a preferred embodiment of the present invention, an exemplary display driving method is disclosed. The exemplary display driving method is applied to a driving circuit of a display apparatus. The driving circuit includes a plurality of digital code input terminals corresponding to a plurality of sets of display cells of the display. A digital code received by each digital code input terminal represents a predetermined gray-level of a corresponding set of display cells within the sets of display cells. The exemplary display driving method includes the following steps: checking relationships between two voltage levels respectively represented by two continuously received digital codes received by a specific digital code input terminal and a first predetermined threshold in order to determine whether to pre-charge a specific set of display cells within the sets of display cells that corresponds to the specific digital code input terminal, wherein the two voltage levels respectively represent voltage levels applied to the specific set of display cells by the driving circuit at different time points according to indication of the two digital codes; and when it is determined to pre-charge the specific set of display cells, temporarily conducting a first pre-charging voltage generator in the driving circuit to the specific set of display cells to pre-charge the specific set of display cells, wherein the first pre-charging voltage generator is arranged for outputting a first pre-charging voltage for pre-charging.
Besides the above display driving method, an associated driving circuit of a display apparatus is also provided correspondingly. The exemplary driving circuit of the display apparatus includes a plurality of driving modules, a first pre-charging voltage generator, a first set of switches and a switch control circuit. The driving modules include a plurality of digital code input terminals and a plurality of output terminals. The first set of switches are electrically connected between the first pre-charging voltage generator and the output terminals, respectively. The switch control circuit is coupled to the digital code input terminals and electrically connected to the first set of switches. The driving modules are arranged for driving a plurality of sets of display cells of the display apparatus, wherein the output terminals are electrically connected to the sets of display cells, the digital code input terminals correspond to the sets of display cells, respectively, and a digital code received by each digital code input terminal represents a predetermined gray-level of a corresponding set of display cells within the sets of display cells. The first pre-charging voltage generator is arranged for outputting a first pre-charging voltage for pre-charging. The first set of switches is arranged to perform signal switching, wherein each switch in the first set of switches is utilized to selectively conduct the first pre-charging voltage generator to a corresponding output terminal in the output terminals. The switch control circuit is arranged for checking relationships between two voltage levels respectively represented by two continuously received digital codes received by a specific digital code input terminal and a first predetermined threshold to determine whether to pre-charge a specific set of display cells within the sets of display cells that corresponds to the specific digital code input terminal, wherein the two voltage levels respectively represent voltage levels applied to the specific set of display cells by the driving circuit at different time points according to indication of the two digital codes. When it is determined to pre-charge the specific set of display cells, the switch control circuit utilizes a switch corresponding to the specific digital code input terminal in the first set of switches to temporarily conduct the first pre-charging voltage generator to the specific set of display cells to pre-charge the specific set of display cells.
It is an advantage of the present invention that, compared to a conventional driving circuit, the proposed display driving method and an associated driving circuit can mitigate the aforementioned side effects while enhancing overall efficiency of the driving circuit.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
As shown in
The driving circuit 100 further includes: at least one pre-charging voltage generator such as pre-charging voltage generators 120-1 and 120-2, wherein the number of the at least one pre-charging voltage generator may be varied in different embodiments/variations; at least one set of switches such as a first set of switches {SWPC(n1,1), SWPC(n2,1), SWPC(n3,1)} and a second set of switches {SWPC(n1,2), SWPC(n2,2), SWPC(n3,2)}, wherein the first set of switches {SWPC(n1,1), SWPC(n2,1), SWPC(n3,1)} are electrically connected between the pre-charging voltage generator 120-1 and the output terminals A(n1), A(n2), A(n3), respectively, the second set of switches {SWPC(n1,2), SWPC(n2,2), SWPC(n3,2)} are electrically connected between the pre-charging voltage generator 120-2 and the output terminals A(n1), A(n2), A(n3), respectively, and the number of the at least one set of switches corresponds to the number of the at least one pre-charging voltage generator; another set of switches {SWCS(n1), SWCS(n2)}, whose connection in this embodiment shown in
Please note that, as charges may include positive charges and negative charges, the word “pre-charging” may further encompass “pre-discharging”. For simplicity, the following description will use “pre-charging” rather than “pre-discharging” which corresponds to certain cases. Additionally, according to this embodiment or variations thereof, indices n1, n2, n3 may depend on design requirements of the driving circuit 100. For example, the indices n1, n2, n3 may represent a series of regularly arranged integers such as 1, 2, 3. In another example, as long as implementations of the present invention are not hindered, indices n1, n2, n3 may represent a series of arbitrarily arranged integers.
In practice, the buffers B(n1), B(n2), B(n3) may be implemented by an amplifier array, and the at least one set of switches (e.g. the first set of switches {SWPC(n1,1), SWPC(n2,1), SWPC(n3,1)} and the second set of switches {SWPC(n1,2), SWPC(n2,2), SWPC(n3,2)}), the another set of switches {SWCS(n1), SWCS(n2)} and the switches {SWHZ(n1), SWHZ(n2), SWHZ(n3)} may be implemented by metal oxide semiconductor filed effect transistors (MOSFETs). In addition, the switch control circuit 110 may be implemented by logic circuit(s), wherein the logic circuit(s) may include a plurality of logic gates and related control circuit(s). The at least one pre-charging voltage generator (e.g. the pre-charging voltage generators 120-1 and 120-2) may be implemented by power management circuit(s) (or voltage generation modules within power management circuit(s)), respectively. This is for illustrative purposes only, and is not meant to be a limitation of the present invention. According to variations of this embodiment, the at least one pre-charging voltage generator (e.g. the pre-charging voltage generators 120-1 and 120-2) may also be implemented by capacitor(s).
Based on the architecture shown in
In this embodiment, the switch control circuit 110 may control any switch within the first set of switches {SWPC(n1,1), SWPC(n2,1), SWPC(n3,1)}, any switch within the second set of switches {SWPC(n1,2), SWPC(n2,2), SWPC(n3,2)}, any switch within the another set of switches {SWCS(n1), SWCS(n2)} and any switch within the aforementioned switches {SWHZ(n1), SWHZ(n2), SWHZ(n3) } to perform signal switching and also control switching time points as well as switching sequences in order to save time and/or reduce power consumption, especially power consumption in the buffers B(n1), B(n2), B(n3). For example, assuming that a symbol nx represents one of the indices n1, n2, n3, an output terminal A(nx) may represent one of the output terminals A(n1), A(n2), A(n3). Regarding any rising edge or falling edge control of a driving signal of the output terminal A(nx) (especially a switch control between two target voltage levels corresponding to different digital codes in the driving signal of the output terminal A(nx)), the switch control circuit 110 may perform signal switching by utilizing at least a portion of corresponding switches SWHZ(nx), SWPC(nx,1), SWPC(nx,2) and SWCS(nx) during at least one control phase (e.g. more than one control phase), thereby making the driving signal change from an original voltage level to a target voltage level efficiently and economically with the aid of at least one of pre-charging and charge-sharing. More particularly, the switch control circuit 110 may utilize the switch SWHZ(nX) to perform signal blocking, utilize at least one of the switches SWPC(nx,1) and SWPC(nx,2) to provide at least one of the pre-charging voltages VL and VH (which correspond to the pre-charging voltage generators 120-1 and 120-2, respectively) to a load capacitor CLOAD(nx) for pre-charging, and utilize the switch SWCS(nx) to perform chare-sharing between different sets of display cells. During the pre-charging or charge-sharing, the switch control circuit 110 may utilize the switch SWHZ(nx) to cut the electrical connection between the buffer B(nx) and the load capacitor CLOAD(nx), thereby suspending an operation performed upon the load capacitor CLOAD(nx) by the buffer B(nx).
Please note that, according to variations of this embodiment, the number of the at least one pre-charging voltage generator may depend on design requirements of the driving circuit 100. For example, the number of the at least one pre-charging voltage generator may be changed to one to provide a single pre-charging voltage (e.g. a pre-charging voltage VM between the pre-charging voltages VL and VH) for pre-charging. In another example, the number of the at least one pre-charging voltage generator may be changed to three or more than three, thus providing three or more than three pre-charging voltages for pre-charging.
In step 210, the switch control circuit 110 may check relationships between two voltage levels respectively represented by two continuously received digital codes received by a specific digital code input terminal D(nx) (in the digital code input terminals D(n1), D(n2), D(n3)) and a predetermined threshold Th(1) in order to determine whether to pre-charge a specific set of display cells (especially the set of display cells represented by the load capacitor CLOAD(nx)) within the sets of display cells that corresponds to the specific digital code input terminal D(nx), wherein the two voltage levels respectively represent voltage levels applied to the specific set of display cells by the driving circuit 100 at different time points according to indication of the two digital codes. For example, the predetermined threshold Th(1) may be equal to a voltage level of the pre-charging voltage VL. In another example, a difference between the predetermined threshold Th(1) and the voltage level of the pre-charging voltage VL may lie within a predetermined range, wherein the predetermined range, in practice, may represent a maximum tolerable shift which can avoid misjudgment occurring in step 210, or a predefined shift based on specific design requirements.
More particularly, in step 210, the switch control unit 210 may check whether the predetermined threshold Th(1) is between the two voltage levels. When it is checked that the predetermined threshold Th(1) is between the two voltage levels, the switch control circuit 110 may determine to pre-charge the specific set of display cells, especially the set of display cells represented by the load capacitor CLOAD(nx).
In step 220, when it is determined to pre-charge the specific set of display cells, especially the set of display cells represented by the load capacitor CLOAD(nx), the switch control circuit 110 may utilize a switch SWPC(nx,1) (which corresponds to the specific digital code input terminal D(nx)) in the first set of switches {SWPC(n1,1), SWPC(n2,1), SWPC(n3,1)} to temporarily conduct the pre-charging voltage generator 120-1 to the specific set of display cells for pre-charging the specific set of display cells.
In step 230, the switch control circuit 110 may check whether to stop a pre-charging function. For example, the driving circuit 100 may be designed to determine whether to temporarily enable or disable the pre-charging function according to a user setting. When it is detected that the pre-charging function should be stopped (e.g. the user setting indicates that the pre-charging function should be stopped), the flow shown in
In practice, the switch control circuit 110 may check a series of continuously received digital codes, and sequentially determine whether to pre-charge a rising edge or a falling edge between every two target voltage levels respectively represented by two adjacent and different digital codes in the series of continuously received digital codes. Assume that, when the flow enters a loop including steps 210 and 220 for the first time, the aforementioned two voltage levels include a first voltage level and a second voltage level, and the second voltage level represents a voltage level represented by a later received one of the two digital codes. For example, when the flow returns to step 210, two updated voltage levels under consideration in step 210 may include the second voltage level and a voltage level (e.g. a third voltage level) of next one digital code (following the two digital codes). In another example, when the flow returns to step 210, two updated voltage levels under consideration in step 210 may include two voltage levels (e.g. the third voltage level and a fourth voltage level) of next two digital codes (following the two digital codes).
Please note that, to facilitate understanding of technical features of the present invention, step 210 is described as checking the specific digital code input terminal D(nx), and step 220 is described as performing switch control of the switch SWPC(nx,1) corresponding to the specific digital code input terminal D(nx). This is for illustrative purposes only, and is not meant to be a limitation of the present invention. According to variations of this embodiment, the switch control circuit 110 may check a plurality of specific digital code input terminals {D(nx)} in step 210, and perform switch control of a plurality of switches {SWPC(nx,1)} respectively corresponding to the specific digital code input terminals {D(nx)} in step 220.
Additionally, the flow shown in
According to variations of this embodiment, in step 210, the switch control circuit 110 may check whether the predetermined threshold Th(n1) is between the two voltage levels, and check whether the predetermined threshold Th(n2) is between the two voltage levels. When the predetermined threshold Th(n1) is between the two voltage levels and the predetermined threshold Th(n2) is between the two voltage levels, the switch control circuit 110 may determine to pre-charge the specific set of display cells, especially the set of display cells represented by the load capacitor CLOAD(nx). In step 220, after the pre-charging voltage generator 120-1 is employed to pre-charge the specific set of display cells, the switch control circuit 110 may pre-charge the specific set of display cells by utilizing a switch SWPC(nx,2) (which corresponds to the specific digital code input terminal D(nx)) in the second set of switches {SWPC(n1,2), SWPC(n2,2), SWPC(n3,2)} to temporarily conduct the pre-charging voltage generator 120-2 to the specific set of display cells without conducting the pre-charging voltage generator 120-1 to the specific set of display cells, especially the set of display cells represented by the load capacitor CLOAD(nx).
According to variations of this embodiment, in step 210, the switch control circuit 110 may check a relationship between at least one voltage level represented by at least one digital code in the two digital codes and a predetermined zone NAZ(1) to determine whether to pre-charge the specific set of display cells. More particularly, the switch control circuit 110 may check whether the predetermined threshold Th(1) is between the two voltage levels, and check whether at least one voltage level represented by at least one digital code in the two digital codes falls in the predetermined zone NAZ(1) to determine whether to pre-charge the specific set of display cells. For example, when it is determined that the predetermined threshold Th(1) is between the two voltage levels and both of the two voltage levels are beyond the predetermined zone NAZ(1), the switch control circuit 110 may determine to pre-charge the specific set of display cells (especially, the set of display cells represented by the load capacitor CLOAD(nx)), wherein the predetermined zone NAZ(1) may be regarded as a no action zone. According to one of the variations, the predetermined zone NAZ(1) may include the predetermined threshold Th(1). For example, the predetermined zone NAZ(1) may be defined as [Th(1)−DELTA, Th(1)+DELTA], where DELTA is a positive value or 0, and the predetermined threshold Th(1) is equal to a central value of the predetermined zone NAZ(1). This is for illustrative purposes only, and is not meant to be a limitation of the present invention. According to another one of the variations, the predetermined zone NAZ(1) may be immediately adjacent to the predetermined threshold Th(1). For example, the predetermined threshold Th(1) may be defined as (Th(1), Th(1)+DELTA′], where DELTA′ is a positive value. In another example, the predetermined zone NAZ(1) may be defined as [Th(1)−DELTA″, Th(1)), where DELTA″ is a positive value.
Similarly, according to variations of this embodiment, the switch control circuit 110 may check a relationship between at least one voltage level represented by at least one digital code in the two digital codes and a predetermined zone NAZ(2) to determine whether to pre-charge the specific set of display cells in step 210. More particularly, the switch control circuit 110 may check whether the predetermined threshold Th(2) is between the two voltage levels and check whether at least one voltage level represented by at least one digital code in the two digital codes falls in the predetermined zone NAZ(2), to determine whether to pre-charge the specific set of display cells. For example, when it is determined that the predetermined threshold Th(2) is between the two voltage levels and both of the two voltage levels are beyond the predetermined zone NAZ(2), the switch control circuit 110 may determine to pre-charge the specific set of display cells (especially, the set of display cells represented by the load capacitor CLOAD(nx)), wherein the predetermined zone NAZ(2) may be regarded as a no action zone. According to one of the variations, the predetermined zone NAZ(2) may include the predetermined threshold Th(2). For example, the predetermined zone NAZ(2) may be defined as [Th(2)−DELTA, Th(2)+DELTA], where DELTA is a positive value, and the predetermined threshold Th(2) is equal to a central value of the predetermined zone NAZ(2). This is for illustrative purposes only, and is not meant to be a limitation of the present invention. According to another one of the variations, the predetermined zone NAZ(2) may be immediately adjacent to the predetermined threshold Th(2). For example, the predetermined threshold Th(2) may be defined as (Th(2), Th(2)+DELTA′], where DELTA′ is a positive value. In another example, the predetermined zone NAZ(2) may be defined as [Th(2)−DELTA″, Th(2)), where DELTA″ is a positive value.
As shown in
Please note that, as no charge-sharing operation (e.g. the charge-sharing operation during the time interval TCS shown in
As shown in
After the time interval TPC(6,1), the driving circuit 100 may drive the driving signals Sx and Sy to the corresponding target voltage levels in a middle control phase by temporarily utilizing the buffers B(nx) and B(ny) to perform buffering operations, respectively. During a time interval TPC(6,2), the switch control circuit 110 utilizes the switch SWPC(ny,1) to temporarily conduct the pre-charging voltage VL to the output terminals and A(ny) for pre-charging. As the driving signal Sx does not meet a pre-charging activation criterion, the switch control circuit 110 does not activate a pre-charging operation for the driving signal Sx. For example, as the switch control circuit 110 detects that an initial voltage level of the driving signal Sx falls in the predetermined zone NAZ(2), it is determined that the driving signal Sx does not meet the pre-charging activation criterion. In another example, as the switch control circuit 110 detects that the predetermined threshold Th(2) is not between an initial voltage level of the driving signal Sx and an expected target voltage level of a middle control phase of the driving signal Sx, it is determined that the driving signal Sx does not meet the pre-charging activation criterion.
As shown in
During a time interval TPC(7,1), the switch control circuit 110 utilizes the switch SWPC(nx,2) to temporarily conduct the pre-charging voltage VH to the output terminals and A(nx) for pre-charging. As the driving signal Sy does not meet a pre-charging activation criterion, the switch control circuit 110 does not activate a pre-charging operation for the driving signal Sy. During a time interval TPC(7,2), the switch control circuit 110 utilizes the switches SWPC(nx,M) and SWPC(ny,M) to temporarily conduct the pre-charging voltage VM to the output terminals and A(nx) and A(ny) for pre-charging, respectively. Next, the driving circuit 100 may drive the driving signals Sx and Sy to the corresponding target voltage levels of a middle control phase by temporarily utilizing the buffers B(nx) and B(ny) to perform buffering operations, respectively.
As shown in
According to this embodiment, the capacitors CAux(1) and CAux(2) may be unable to accurately provide the pre-charging voltages VH and VL, respectively, during a short period of time immediately after the activation of the driving circuit 100. However, based on implementation experiences and theoretical analyses, the capacitors CAUX(1) and CAUX(2) will enter a steady state while respective voltage levels of non-ground terminals of the capacitors CAUX(1) and CAUX(2) are automatically approaching the corresponding pre-charging voltages VL and VH. After entering the steady state, the capacitors CAUX(1) and CAUX(2) thus provide the pre-charging voltages VL and VH accordingly. For example, assuming that the first predetermined threshold and the second predetermined threshold are set as ((⅓)*VDD) and ((⅔)*VDD), respectively, the pre-charging voltages VL and VH may be ((⅓)*VDD) and ((⅔)*VDD), respectively, in the aforementioned steady state. The similarity between this embodiment and the first embodiment (or variations thereof) is not detailed here for brevity.
It is an advantage of the present invention that, compared to a conventional driving circuit, the proposed display driving method and an associated driving circuit can mitigate the aforementioned side effects and further enhance overall efficiency of the driving circuit. More particularly, regarding any rising edge or falling edge control of all driving signals except for the embodiment shown in
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
| Number | Date | Country | Kind |
|---|---|---|---|
| 101146699 | Dec 2012 | TW | national |
