The present invention will be described in accordance with an ink jet recording system as an application example of the present invention. However, an application range of the present invention is not limited to this example, and the present invention is applicable to not only preparation of a biochip and printing of an electronic circuit but also a liquid discharge head for a medical application such as discharging of a medicine.
First, an ink jet recording head to which the present invention is applicable will be described.
In the ink jet recording head of the present embodiment, a heating portion 3 as an energy generation element and a wiring line 4 are formed on a substrate 1 made of silicon via a protective layer 2 made of SiO2. An electric signal is supplied to the heating portion via the wiring line 4. Furthermore, a discharge port 6 is formed which is an opening to discharge ink. The substrate 1 is also provided with a supply opening 7 which supplies ink, and the supply opening communicates with the discharge port 6 via a flow path 8. Here, the protective layer 2 is formed so as to prevent the ink flowing through the flow path 8 from being brought into contact with the heating portion 3, and prevents energization defects.
This ink jet recording head is disposed so that the surface provided with the discharge port 6 faces a recording surface of a recording medium. Moreover, in this ink jet recording head, the ink is boiled by heat generated by the heating portion 3, discharge energy is applied to discharge an ink droplet from the discharge port 6, and the droplet is attached to the recording medium to record information.
This ink jet recording head can be mounted on a device such as a printer, a photocopier, a facsimile machine and a word processor having a printer section, and a composite industrial recording device combined with various processing units.
Next, a manufacturing method of the ink jet recording head according to the present invention will be described in detail.
First, as shown in
When porosity of the porous silicon is lowered, density of stacking defects of a layer formed on the porous silicon can be reduced. The porous silicon having low porosity can comparatively easily be realized by at least one method selected from a method of increasing an HF concentration, a method of decreasing a current density and a method of raising a temperature during the anode formation. The whole substrate may be constituted to be porous, or an only surface portion may be constituted to be porous. In the present invention, a step of further reducing the above density of the stacking defects of the upper layer and smoothening the surface of the porous silicon is performed by a sealing step described later.
Next, pores of the porous silicon are sealed (hereinafter referred to as the sealing step). The pores are present in the surface (including a case where the surface portion (A in the drawing) has a thickness) of the porous silicon having the surface which is continuous from the surface of the silicon substrate. This sealing step is performed in order to decrease the density of the pores in the surface of the porous silicon and reduce concave and convex portions of the surface.
The sealing step for use in the present invention is performed by thermally treating the porous silicon in a predetermined atmosphere. As the sealing method, at least one of the following (1) and (2) may be performed:
(1) pre-heating (pre-baking) in a reduction atmosphere which does not contain a silicon-based source gas but contains hydrogen; and
(2) a treatment (pre-injection) of thermally treating the porous silicon while supplying a micro amount of the silicon-based source gas, and applying silicon atoms to the porous silicon.
After the pre-baking, the pre-injection can be performed.
The porous silicon subjected to the sealing of the surface pores by the above method is thermally treated again (hereinafter referred to as intermediate baking) prior to epitaxial growth described later. The intermediate baking is performed at a temperature higher than that during the sealing. At this time, the supply of the silicon-based source gas is stopped in order to perform the intermediate baking in an atmosphere which does not contain any silicon-based gas. During the intermediate baking, the silicon-based source gas is unavoidably included as a contaminant in the intermediate baking atmosphere, but this has no problem.
Moreover, a non-porous single crystal layer is formed on the surface of the porous silicon subjected to the intermediate baking and having the sealed surface pores. A material constituting this non-porous single crystal layer may be silicon formed by homo-epitaxial growth or a material other than silicon formed by hetero epitaxial growth.
The above pre-baking will be described. During the pre-baking, a temperature can arbitrarily be selected from a range of 600° C. to 1150° C. In the present embodiment, the temperature can be set to a range of 850° C. to 1000° C., or an optimum range of 900° C. to 950° C. Even in such a low temperature range, a satisfactory result is obtained. Examples of the atmosphere for the pre-baking include a reduction atmosphere including 100% of hydrogen and a reduction atmosphere in which hydrogen is diluted with an inactive gas such as argon, but the pre-baking may be performed in a super-high vacuum. To produce a desired effect at low cost, the pre-baking can be performed in the hydrogen-containing reduction atmosphere. A usable pressure is in a range of 1×10−10 to 760 torrs.
As discussed in Japanese Patent Application Laid-Open No. H09-100197, during the pre-injection, a micro amount of the silicon atoms are supplied to the surface of the porous layer in an initial stage of the growth, and crystal defects are further effectively reduced.
A temperature and a pressure during the pre-injection may be selected from the above temperature and pressure ranges which are selectable during the pre-baking. An amount of the silicon-based source gas to be introduced can be set so that a deposition rate of silicon is about 20 nm/minute or less, more preferably 10 nm/minute or less, most preferably 2 nm/minute or less. In this case, crystal defects of the subsequently growing single crystal layer are further reduced.
Thus, the surface pores in the surface of the porous silicon are sealed. The silicon-based source gas is used in applying the silicon atoms to the surface of the porous layer to block the pores of the porous silicon. Examples of the gas include silicon H2Cl2, SiH4, SiHCl3, SiCl4 and Si2H6. Silane which is a substrate at normal temperature and under normal pressure is more preferable in view of controllability of an amount of the gas to be supplied. When the pre-injection is performed by an MBE process instead of such a so-called CVD process, the silicon atom is supplied from a solid source. At this time, the substrate temperature can be set to be as low as 800° C. or less, and the growth rate can be set to 0.1 nm/minute or less.
All of the surface pores in the surface of the porous layer do not have to be sealed by the pre-injection. The sealing may be performed to such an extent that density of the remaining surface pores is about 1×108 cm−2 or less, more preferably 1×106 cm−2 or less.
Moreover, it can be confirmed whether or not a pre-injection time is sufficiently secured. This can be confirmed by measuring surface roughness of a semiconductor substrate subjected to the steps up to the pre-injection with an atomic force microscope (AFM).
The intermediate baking performed in the present invention is a heat treatment performed at a temperature higher than that of the sealing after the sealing of the pores. When the intermediate baking is performed, the surface roughness of the surface of the porous silicon having the sealed pores can further be decreased. There is also an effect that distortion in the vicinity of an interface between the porous silicon layer and the non-porous single crystal silicon layer is relaxed and the surface including the sealed pores is smoothened. Since this intermediate baking is performed, the density of the crystal defects of the non-porous single crystal layer formed on the porous layer does not increase. Most of the crystal defects of the non-porous single crystal layer formed on the porous layer are stacking defects. However, when the stacking defects are observed from the surface, the defect having an equal size is observed in a layer having an equal film thickness. That is, all of the stacking defects are generated in the vicinity of the interface between the porous silicon layer and the non-porous single crystal layer. The density of the stacking defects is determined by the pore sealing step. In the heat treatment of and after the sealing step, the stacking defect density hardly changes.
After this intermediate baking, at a desired heat treatment temperature, the non-porous single crystal silicon layer and a non-porous compound semiconductor single crystal layer epitaxially grow.
A temperature during the intermediate baking is selected from a range of 900° C. to 1150° C., more preferably 1000° C. to 1150° C. so that the temperature is higher than a temperature of the sealing step. The intermediate baking is performed in an atmosphere which does not substantially include the silicon-based source gas as described above. Examples of the atmosphere include the super-high vacuum, the reduction atmosphere including 100% of hydrogen and the reduction atmosphere in which hydrogen is diluted with an inactive gas such as argon. A pressure selection range is equal to that during the sealing step.
After the intermediate heat treatment is performed, the epitaxial growth is performed in which there is not any special restriction on the growth rate. Conditions may be the same as those for growth of well-known bulk state of silicon. Alternatively, the growth may continue at a growth rate equal to that of a step of supplying a micro amount of the raw material in the same manner as in the above pre-injection step. Even if gas species are changed, achievement of the object of the present invention is not hindered. When the same conditions as those of the step of supplying the micro amount of the raw material are selected, after the pre-injection, the supply of a material gas may once be discontinued to perform the intermediate baking. The supply of a desired raw material may be started again to perform the growth. In any method, the single crystal layer is formed with a desired film thickness.
Next, as shown in
Next, as shown in
Next, as shown in
According to a method of manufacturing the ink jet recording head of the present invention, as shown in
Next, as shown in
Next, as shown in
Finally, as shown in
An example will be described below to describe the present invention in more detail.
First, opposite surfaces of a silicon substrate 101 having a thickness of 300 μm were coated with 1 μm of a polyimide resin, an opening was made by photolithography so as to expose a position where porous silicon was to be formed, and a mask was formed. Subsequently, anode formation was performed in an HF solution. Anode formation conditions were as follows:
current density: 30 (mA·cm−2);
anode forming solution: HF:H2O:C2H5OH=1:1:1;
time: 12 minutes;
thickness of porous silicon: 20 μm; and
porosity of silicon: 56%.
In consequence, porous silicon 102 was formed at a region having a shape of a 60μ wide square and a thickness of 20 μm in the exposed portion. Next, a mask material made of the polyimide resin was removed, and SiH4 was added to a hydrogen carrier gas so as to set a concentration to 28 ppm at 950° C. in an electric furnace. Subsequently, a treatment was performed for 200 seconds, and the addition of SiH4 was completed. Subsequently, the temperature was lowered to 900° C., and SiH2Cl2 was added so as to set a concentration to 0.5 mol %. According to this step, porous single crystal silicon was formed, and the surface of the porous silicon 102 as an upper portion of the silicon substrate was sealed and smoothened (
Subsequently, an SiO2 layer was formed with a thickness of 0.1 μm on the surface of the substrate by use of a P-CVD process to form a protective layer 103 (
Next, a TaN film having a thickness of 0.05 μm was formed as a heating resistance layer, and subjected to patterning by the photolithography so as to obtain a thickness of 15 μm, thereby forming a heating portion 104 (
Next, a wiring line layer made of Al was formed with a thickness of 1 μm, and subjected to the patterning by use of the photolithography to form wiring lines 105 (
Next, to form a heat storage layer provided with a discharge port on the wiring line layer, an SiO2 layer having a thickness of 15 μm was formed by use of the P-CVD process to form a heat storage layer 106 (
Next, to form the discharge port, an etching mask was prepared using the photolithography, and a columnar discharge port 107 having a bore diameter of 10 μm was formed in the heat storage layer by dry etching (
Next, to form an ink supply opening, an etching mask was formed on the back surface of the substrate by use of the photolithography, and an ink supply opening 108 having a bore diameter of 20 μm was formed in the silicon substrate by the dry etching (
Finally, the material was immersed into a KOH solution to remove the porous silicon so that the ink supply opening 108 communicated with the discharge port 107 (
As described above, an ink jet recording head was completed.
The completed head was electrically connected, bonded to a member to which ink was to be supplied, and mounted on a recording apparatus. When printing was performed, a satisfactory recorded image was obtained. As a result of detailed observation, a droplet had a size in such a necessary range as to satisfy an image quality level, and disturbances of shot intervals due to instability of bubbling were not seen.
While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.
This application claims the benefit of Japanese Patent Application No. 2006-110941, filed Apr. 13, 2006 which is hereby incorporated by reference herein in its entirety.
Number | Date | Country | Kind |
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2006-110941 | Apr 2006 | JP | national |