Claims
- 1. A method of fabricating a metal electrode of a semiconductor device comprising the steps of:
- forming and patterning a first metal layer which is not anodizable to a desired thickness on a substrate;
- forming a second metal layer which is anodizable on the first metal layer and the substrate; and
- forming a mask corresponding to said patterned first metal layer on said second metal layer and forming a flat surface by anodic oxidation for forming regions other than the patterned first metal layer and second metal layer into an insulator.
- 2. A method as recited in claim 1, wherein a thickness of said patterned first metal layer and a thickness of said second metal layer are respectively designated d.sub.1 and d.sub.2, and a variation rate of the thickness of the second metal layer is designated A, and the second metal layer is formed so that the thickness d.sub.2 is in accordance with the relationship: d.sub.2 =d.sub.1 /(A-1).
- 3. A method as recited in claim 1 wherein the first metal layer is selected from one of Cu and Cr and the second anodizable metal layer is selected from one of Al and Ta.
- 4. A method as recited in claim 1 wherein the substrate is used in a thin film transistor of reverse staggered type and in the manufacturing of a semiconductor device having a metal pattern with differential step for flattening.
- 5. A method of fabricating a metal electrode of a semiconductor device comprising the steps of:
- forming and patterning a first metal layer which is not anodizable to a first desired thickness on a substrate;
- forming a second metal layer which is anodizable to a second desired thickness on the substrate;
- forming a mask corresponding to said patterned first metal layer on said second metal layer and oxidizing the unmasked region of the second metal layer; and
- further oxidizing a portion of the second metal layer after said mask is removed.
- 6. A method as recited in claim 5, wherein the thicknesses of the patterned first metal layer and second metal layer, and thickness of the portion of the second metal layer which has been further oxidized are respectively designated by d.sub.1, d.sub.2, and d.sub.3, and the variation in rate of thickness obtained by oxidizing the anodizable second metal layer is designated A, the method further comprising the step of adjusting the thickness of the patterned first metal layer to satisfy the following condition: d.sub.1 =(A.sub.1 -1)(d.sub.2 -d.sub.3).
- 7. A method as recited in claim 5, wherein the first metal layer that is not anodizable is selected from the group consisting of Cu and Cr, and the second metal layer that is anodizable is selected from the group consisting of Al and Ta.
- 8. A method as recited in claim 5 wherein said process is applied to any one of a thin film transistor of reverse staggered type, a thin film transistor of staggered type, and in the manufacturing of a semiconductor device having a metal pattern which has a step=like difference between layers for flattening.
Priority Claims (3)
Number |
Date |
Country |
Kind |
91-7009 |
Apr 1991 |
KRX |
|
91-7010 |
Apr 1991 |
KRX |
|
91-11375 |
Jul 1991 |
KRX |
|
Parent Case Info
This is a division of application Ser. No. 07/810,848 filed Dec. 20, 1991 now U.S. Pat. No. 5,240,868.
US Referenced Citations (9)
Foreign Referenced Citations (2)
Number |
Date |
Country |
52-71980 |
Jun 1977 |
JPX |
53-107284 |
Sep 1978 |
JPX |
Divisions (1)
|
Number |
Date |
Country |
Parent |
810848 |
Dec 1991 |
|