Claims
- 1. A method of manufacturing a thin film surface-mount circuit protection device for protection against electrostatic transient voltage damage to electrical components, comprising the steps of:
- a. providing a substrate having a top, a bottom and opposing sides;
- b. depositing, upon the top of a substrate, a first conductive layer to simultaneously form a pair of electrodes and a first terminal pad layer, the electrodes being spaced apart by a gap having a gap width, wherein depositing the electrodes creates a gap width of less than half of the width of one of the electrodes, wherein the gap width is intricately configured through photolithography in order to obtain specific electrical characteristics for the circuit device, and wherein the gap width, at least, partially determines a triggering voltage and a clamping voltage rating for the circuit device;
- c. depositing a voltage variable polymeric material in the gap and between the electrodes, wherein the voltage variable polymer provides for a non-linear electrical response to an electrostatic overvoltage condition, for protection against electrostatic transient voltage damage to electrical components; and,
- d. covering the voltage variable polymeric material with a protective layer by smoothing a protective material over the voltage variable polymeric material to create a substantially flat upper surface of the protective layer.
- 2. The method as set forth in claim 1, wherein the first terminal pad layer extends from the top of the substrate and is deposited upon the sides of the substrate simultaneously with the depositing of the first terminal pad layer on the top of the substrate and the depositing of the electrodes on the top of the substrate, and wherein the first terminal pad layer extends from the sides of the substrate and terminates on the bottom of the substrate.
- 3. The method as set forth in claim 1, further including the step of depositing one or more additional conductive terminal pad layers on top of the first terminal pad layer.
- 4. The method as set forth in claim 1, wherein the protective layer is applied to the voltage variable polymeric material using a stencil printing machine, the stencil printing machine applying the protective layer such that the protective layer has a substantially flat top surface for automated assembly.
- 5. The method as set forth in claim 1, wherein the pair of electrodes have notches therein, each notch adjacent the gap, wherein a portion of the gap width is increased by the notches adjacent the opposing sides of the substrate, wherein the notches are provided for preventing the gap width from narrowing during separation into individual circuit devices, and further including the step of bisecting the notches while cutting the substrate, the notches being provided for preventing the gap width from narrowing as a result of the cutting.
- 6. A method of mass producing a plurality of individual surface-mount circuit protection devices comprising the steps of:
- providing a substrate having a plurality of strips, the strips each having a first end and a second end defining a strip length, and each of the strips having a first edge and a second edge defining a strip width having a dimension D corresponding to a device length of the devices;
- applying a first conductive layer on the strips at substantially the first and second edges from substantially the first end of the strips to substantially the second end of the strips, in order to simultaneously create a set of first and second electrodes and at least partially create sets of first and second terminal pads, respectively;
- applying a circuit protection material on the substrate between the set of first and second electrodes, from substantially the first end of the strips to substantially the second end of the strips; and,
- after the step of applying the circuit protection material, separating the strips into individual devices along the width of the strips.
- 7. The method of claim 6 further comprising the step of applying a second conductive layer on the first conductive layer substantially above the first and second edges of the strips from substantially the first end of the strips to substantially the second end of the strips, in order at least partially to build up the sets of first and second terminal pads.
- 8. The method of claim 7 further comprising the step of applying a third conductive layer on the second conductive layer substantially above the first and second edges of the strips from substantially the first end of the strips to substantially the second end of the strips, in order at least partially to build up the sets of first and second terminal pads.
- 9. The method of claim 6, wherein the circuit protection material is a voltage variable polymer material.
- 10. The method of claim 6, wherein the step of separating the strips into individual devices includes dicing the strips along the width across the dimension D of the strips at substantially equal intervals.
- 11. The method of claim 6 further comprising the step of creating a slot in the substrate along each of the first and second edges of each strip, for creating interstitial regions within the substrate and for allowing the application of conductive layers to the interstitial regions.
- 12. The method of claim 6 further comprising the initial step of:
- plating the substrate with copper before applying the first metalization layer; and,
- etching the copper from the substrate to prepare the substrate for accepting the first conductive layer.
- 13. The method of claim 6 further comprising the step of:
- applying a protective layer over the circuit protection material, from substantially the first end of the strips to substantially the second end of the strips, the protective layer having a substantially flat upper surface.
- 14. A method of mass producing a plurality of individual surface-mount circuit protection devices comprising the steps of:
- providing a substrate having a plurality of strips, the strips each having a first end and a second end defining a strip length, and each of the strips having a first edge and a second edge defining a strip width having a dimension D corresponding to a device length of the devices;
- applying a first metalization layer on the strips at substantially the first and second edges from substantially the first end of the strips to substantially the second end of the strips, in order to simultaneously create a set of first and second electrodes and to at least partially create sets of first and second terminal pads, respectively;
- applying a second metalization layer on the first metalization layer substantially above the first and second edges of the strips from substantially the first end of the strips to substantially the second end of the strips, in order to at least partially create the sets of first and second terminal pads;
- applying a circuit protection material on the substrate between the set of first and second electrodes, from substantially the first end of the strips to substantially the second end of the strips;
- applying a protective layer over the circuit protection material, from substantially the first end of the strips to substantially the second end of the strips; and,
- separating the strips into individual devices along the width of the strips.
- 15. The method of claim 14 further comprising the step of:
- applying a third metalization layer on the second metalization layer substantially above the first and second edges of the strips from substantially the first end of the strips to substantially the second end of the strips, in order to at least partially create the sets of first and second terminal pads.
- 16. The method of claim 14 wherein the protective layer is adapted to have a substantially flat upper surface for automated assembly.
- 17. The method of claim 14 further comprising the step of creating a slot in the substrate along each of the first and second edges of each strip, for creating interstitial regions within the substrate and for allowing the application of metalization to the interstitial regions.
- 18. The method of claim 17 including the initial step of:
- plating the substrate with copper, including the interstitial regions, before applying the first metalization layer; and,
- etching the copper from the substrate, including the interstitial regions, to prepare the substrate for accepting the first metalization layer.
- 19. The method of claim 14, wherein the step of applying the protective layer over the circuit protection material comprises:
- using a die having openings corresponding to the width of the strips;
- applying a protective coating within the openings from substantially the first end of the strips to substantially the second end of the strips, the protective coating forming the protective layer.
- 20. The method of claim 14, wherein the step of applying a protective layer includes applying the protective layer over at least a portion of the sets of first and second terminal pads.
- 21. The method of claim 14, wherein the step of applying a protective layer includes applying the protective layer over the entire top surface of the strips.
- 22. The method of claim 17, wherein the step of applying the first metalization layer also includes simultaneously applying a first metalization layer on the interstitial regions of the strips from substantially the first end of the strips to substantially the second end of the strips, in order to extend the sets of first and second terminal pads onto respective interstitial regions of the devices.
- 23. The method of claim 22 wherein the step of applying the first metalization layer also includes simultaneously applying a first metalization layer on the strips below the edges of the substrate and adjacent the interstitial regions of the strips from substantially the first end of the strips to substantially the second end of the strips, in order to extend the sets of first and second terminal pads onto a bottom of the devices.
- 24. The method of claim 17, wherein the step of applying the second metalization layer also includes simultaneously applying a second metalization layer on the first metalization layer:
- a. above the interstitial regions of the strips from substantially the first end of the strips to substantially the second end of the strips, in order to extend the sets of first and second terminal pads above the respective interstitial regions of the devices;
- b. on the interstitial regions of the strips from substantially the first end of the strips to substantially the second end of the strips, in order to extend the sets of first and second terminal pads onto respective interstitial regions of the devices; and,
- c. below the edges of the substrate and adjacent the interstitial regions of the strips, from substantially the first end of the strips to substantially the second end of the strips, in order to extend the sets of first and second terminal pads onto a bottom of the devices.
- 25. The method of claim 17, wherein the step of applying the third metalization layer also includes simultaneously applying the third metalization layer on the second metalization layer:
- a. above the interstitial regions of the strips from substantially the first end of the strips to substantially the second end of the strips, in order to extend the sets of first and second terminal pads above the respective interstitial regions of the devices;
- b. on the interstitial regions of the strips from substantially the first end of the strips to substantially the second end of the strips, in order to extend the sets of first and second terminal pads onto respective interstitial regions of the devices; and,
- c. below the edges of the substrate and adjacent the interstitial regions of the strips, from substantially the first end of the strips to substantially the second end of the strips, in order to extend the sets of first and second terminal pads onto a bottom of the devices.
RELATED APPLICATIONS
This application is a continuation of U.S. patent application Ser. No. 08/474,502 filed Jun. 7, 1995, which is a continuation-in-part of U.S. patent application Ser. No. 08/247,584 filed May 27, 1994. U.S. patent application Ser. No. 08/247,584 issued as U.S. Pat. No. 5,552,757 on Sep. 3, 1996. U.S. patent application Nos. 08/474,502 and 08/247,584 are hereby incorporated by reference, and made a part hereof.
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Continuations (1)
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Continuation in Parts (1)
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247584 |
May 1994 |
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