The present invention relates to methods or arrangements for processing numerical data by electrical programmable computers, digital processing systems, logic circuitry, or similar electronic hardware together with any associated software, and in particular relates to arithmetic processing and calculating methods involving finite field, residue or congruence operations, including modular multiplication operations upon integers or polynomials, especially methods based upon or derived from the Barrett reduction method.
Numerous cryptographic algorithms make use of large-integer multiplication (or exponentiation) and reduction of the product to a residue value that is congruent for a specified modulus that is related to the cryptographic key. Some crypotographic algorithms, including the AES/Rijndael block cipher and also those based on discrete logarithms and elliptic curves, perform arithmetic operations on polynomials in a finite field, such as the binary field GF(2n), including multiplication (or exponentiation) and modular reduction operations on such polynomials.
Mathematical computations in cryptographic algorithms, especially those performed by hardware-implemented cryptographic systems (such as RISC-based smart cards), may be susceptible to various side-channel attacks, including power analysis and timing attacks. An attacker externally monitors aspects of the hardware that are accessible, such as current through chip pads or electromagnetic emissions from a chip, in order to obtain information about internal operations which may be subjected to various analyses in an effort to uncover the encryption key. Therefore, it is important that computations be secured so that information about the key cannot be obtained.
Typically, secure microcontrollers for smart cards use various kinds of hardware-based countermeasures to thwart such attacks. While some software-level countermeasures introduced into a cryptographic algorithm itself might also be considered, it is very important that any such countermeasures not adversely affect the speed or accuracy of the underlying computations. Not all of the internal operations of a cryptographic algorithm are as readily adaptable so as to incorporate software countermeasures without appreciable slowing and without jeopardizing accuracy of a final result.
Arithmetic operations in particular, including modular multiplication, either upon integers or upon polynomials with integer coefficients, generally require a specific result from operating upon given operands. Any changes that would obtain an erroneous final result would clearly be unwelcome. At the same time, it is important that these computations be fast and accurate. Multiplication and reduction, whether operated upon large integers or upon polynomials in a finite field, is usually the most computationally intensive portion of a cryptographic algorithm. In electronic digital hardware, various computational methods have been developed for efficiently performing modular multiplication, including those based upon the Barrett reduction method.
One particular case that frequently occurs in cryptographic applications is where one of the operands of a modular multiplication (or exponentiation) operation is known in advance or used several times. It would be desirable to take advantage of such occurrences in order to speed up the computation.
The present invention is a method implemented in an electronic digital processing system that performs fast modular multiplication computations upon integers or polynomials. In particular, a precomputation is carried out using one operand that is known in advance, in order that the modular reduction quotient to be quickly estimated for any given product involving that operand. For added cryptographic security, the estimated quotient so obtained can be optionally reduced by a random value. The reduced product will then be larger than or equal to, yet still congruent to, the exact residue value for the modular multiplication. In some cryptographic algorithms, it is possible to work with the larger randomized, but congruent, value without affecting the final result. In other algorithms, the exact residue value may need to be found using a few additional subtractions with the modulus, but the intermediate randomization is still useful in resisting cryptoanalytic attacks.
More specifically, where V and W are two operands of which W is known in advance, M is the modulus, and a product congruent to (V×W) mod M is to be found, the method precomputes P=└(W×2n+δ)/M┘, where n is greater than the size of the larger of W and M. The choice of small integer increment δ depends upon the maximum size of the other operand (the one not known in advance), and determines the permissible rounding error obtained for the quotient estimation. For each modular multiplication involving the pre-known operand W, an estimated quotient q^=└(V×P)/2n+δ┘ is obtained. Then a remainder value r^=V×W−q^×M is calculated. If the estimated quotient is reduced by a random value, q′=q^−E, then the randomized estimated quotient q′ is used to obtain a remainder value r′ congruent with the exact residue.
This sequence of steps can be carried out using either integer or polynomial operands. For polynomial operands over a variable X, when calculating both P and q^, Xn+δ replaces 2n+δ. To clarify the differences between integers and polynomials: (1) For integers, if the maximum possible size of V<2n+φ, and if δ≧φ, then the result q^ is less than or equal to the actual quotient Q with a maximum error of 1, i.e., Q−1≦q^≦q^≦Q. But if δ<φ, the result q^ is less than or equal to the actual quotient Q with a maximum error defined by Q−2φ−δ≦q^≦Q; (2) For polynomials, if the maximum size (i.e., degree) of polynomial V(x) is such that deg(V(x))<n+φ, and if δ≧φ−1, then the result q^ is equal to the actual quotient Q. But if δ<φ−1, the result q^ can be different from the actual quotient Q with a maximum error deg(Q−q^)≦φ−δ−2.
The computation method is easily implemented with processing hardware, or by executing an equivalent firmware or software program in a data processor or computer. Exemplary hardware used to execute the modular multiplication may include an arithmetic logic unit (ALU) with multiplication-accumulate (MAC) circuitry, which might be selectable to perform either natural or polynomial arithmetic, and which could, if desired, be dedicated to finite field operations. Such a computation unit, with memory access, operates under the control of an operation sequencer executing firmware to carry out the modular multiplication steps. A random number generator may be provided to inject a random value into an estimated quotient value used for the modular reduction of the product. It is also well within the level of skill of hardware system designers to implement the method entirely in hardware, using, for example, a field programmable gate array (FPGA) or application-specific integrated circuit (ASIC).
With reference to
Modular multiplication of two operands, whether of integers or polynomials, typically consists in calculating a product of the two numbers, and then processing a modular reduction of the product. Modular reduction generally solves r≡X mod M≡X−└X/M┘M, where r is the residue value to be found which is congruent to X for a modulus M, and the symbol └a┘ represents the floor function (the largest integer≦a) so that q=└X/M┘ corresponds to an integer division operation to find a quotient q. In the present case, the numerical value X, whether an integer or a polynomial, is the product of two operands, X=V×W, where the operands V and W are themselves either integers or polynomials. Thus, the residue r=V×W−q×M. Barrett's reduction method involves pre-calculating and storing a scaled estimate of the modulus' reciprocal, M−1, and replacing the long division with multiplications and word shifts to obtain an estimated quotient q^. Obtaining the estimated quotient q^ is much faster than calculating the true quotient. When the estimated quotient q^ is used in place of the true quotient, the resulting remainder r^ will be slightly larger than, but congruent with, the residue value r. The exact residue value r, if desired, can be obtained from the remainder r^ by a final strict reduction. The present invention modifies this approach still further when one of the operands is known in advance or is used many times in the execution of a given algorithm.
With reference to
Next, we load (step 34) a first of the operands V for which we wish to calculate a modular product with pre-known operand W. The quotient is estimated (step 36) as q^:=└(V×P)/2n+δ┘. The estimated quotient q^ can be optional diminished (step 40) by a random value E generated (step 38) by a pseudo-random number generator circuit 20 (in
In either case, the quotient value q′ is used to compute a remainder R′ in the modular multiplication operation (step 44), where R′:=(V×W)−(q′×M). The remainder R′ will usually be larger than the modulus M, because the quotient value used q′ is not exactly equal to actual quotient q. Nevertheless R′ is congruent to the residue value for the modular multiplication. Depending on the needs of the particular application, the residue R can be calculated from the remainder R′ by applying substractions (step 46) of the modulus M until the number is smaller than the modulus M. Then the residue value R can be returned (step 48), possibly together with the particular operand V, for use in the rest of the cryptographic system. Alternatively, if a final reduction to the residue is not required, the remainder R′ could be returned and used in the further calculations, since it is congruent modulo M with the residue value R.
Next, one can check (step 50) whether there are other operands V to be used in a modular multiplication with the same pre-known operand W. If so, the procedure may return (path 52) to step 34 and load the next operand V. If there are no additional operands V, the procedure may return to the main program.
With reference to
However, for any binary field, the members are {0, 1}, so that addition and subtraction of the field elements are performed modulo 2 (0±0=0, 0±1=1, 1±0=1, 1±1=0). Note that, in this case, subtraction is identical to addition. In computer hardware, addition/subtraction modulo 2 is performed with a logical XOR operation upon the array of bits. For example, (x6+x4+x2+x+1)+(x7+x+1)=(x7+x6+x4+x2); or in binary notation [01010111]⊕[10000011]=[11010100].
Polynomial multiplication is ordinarily defined (for infinite fields) by:
where the coefficient ck is given by the convolution:
(Again, in a binary field, the summation is performed modulo 2). However, in a finite field, this definition must be modified in order to ensure that the product also belongs to the field. In particular, ordinary polynomial multiplication is followed by modular reduction by a modulus m(x) of degree n (where n is the dimension of the finite field, as in GF(2n). The modulus m(x) is preferably chosen to be an irreducible polynomial (the polynomial analogue of a prime number, i.e. one that cannot be factored into nontrivial polynomials over the same field). For example, in the AES/Rijndael symmetric block cipher, operations are performed on bytes (polynomials of degree 7 or less) in the binary finite field GF(28), using the particular irreducible polynomial m(x)=x8+x4+x3+x+1 as the chosen basis for modular reduction when performing polynomial multiplication. As an example of polynomial multiplication in a binary finite field using the particular m(x) specified for AES: (x6+x4+x2+x+1)·(x7+x+1)=x13+x11+x9+x8+x6+x5+x4+x3+1), which after reduction, gives (x7+x6+1).
Let F[x] be the set of polynomials all of whose coefficients are members of a field F. If the modulus m(x) is a polynomial of degree d in F[x], then for polynomials p(x), r(x)εF[x], we say that p(x) is congruent to r(x) modulo m(x), written as p(x)≡r(x) (mod m(x)), if and only if m(x) divides the polynomial p(x)−r(x); in other words p(x)−r(x) is a polynomial multiple of m(x), that is, p(x)−r(x)=q(x)·m(x) for some polynomial q(x)εF[x]. Equivalently, p(x) and r(x) have the same remainder upon division by m(x). Modular reduction of a polynomial p(x), which could be an ordinary product of polynomials a(x) and b(x) in F[x], that is, p(x)=a(x)·b(x), involves finding a polynomial quotient q(x) such that the remainder or residue r(x) is a polynomial of degree less than m(x), that is, deg(r(x))<d. The polynomial residue r(x), which is congruent with p(x), is the polynomial value we ultimately want. In the binary finite field GF(2n), m(x) will be an irreducible polynomial of degree n and the residue polynomial r(x) that is sought will be of degree less than n; but p(x) and hence also q(x) can be any degree, and at least the polynomial p(x) to be reduced is often of degree larger than m, as for example when p(x) is a product. In any case, the basic problem in any modular reduction method is in efficiently obtaining a quotient, especially for polynomial p(x) and m(x) of larger degree.
As shown in
q(x):=v(x)·p(x)/xn+δ.
The q(x) can be randomized (step 40) by subtracting a random polynomial value E(x), q′(x):=q(x)−E(x). The random polynomial value E(x) may be generated by any known random or pseudo-random number generator (hardware or software), where the binary value generated is interpreted as a polynomial in the manner already described above. As an option, the random polynomial value E(x) may be constrained to fall within some specified range, such a 0<deg(E(x))<w/2, where here w is the word size.
Next, the modular multiplication operation is carried out (step 44), producing a remainder r′(x):
r′(x):=(v(x)·w(x))−(q′(x)·m(x)).
This remainder r′(x) will be congruent modulo m(x) with the residue value r(x). Note that the choice of δ in the equations given above will determine whether the quotient is exact. If deg(v(x))<n+φ, and δ≧φ−1, then the polynomial q(x) will equal the exact quotient, prior to any randomization. If δ<φ−1, then q(x) will differ from the exact quotient, but deg(r′(x))−deg(r(x)) will be less than a maximum limit defined by δ, deg(Q−q^)≦φ−δ−2, where Q is the real quotient. Depending upon the needs of the particular application, the residue polynomial r(x) can be calculated from the remainder r′(x) by applying ordinary GF(2N) polynomial reduction with the modulus m(x) to obtain a polynomial smaller than m(x). The polynomial remainder r′(x) or the residue r(x) may be returned for further use by the application. If modular multiplication on another polynomial operand v(x) is to be carried out (step 80) using the same w(x), then the procedure goes back (path 82) to loading (step 64) the next v(x).
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