Patent Application
20200153513
The present disclosure relates to low power coherent optical interconnects, more particularly to, carrier phase recovery and compensation in coherent optical links. The present application is based on, and claims priority from an Indian Application Number 201821042617 filed on 13 Nov. 2018, the disclosure of which is hereby incorporated by reference herein.
Demand for low power high-speed short-reach datacenter interconnects is growing very rapidly. Intensity-modulation direct-detection (IMDD) schemes such as PAM-4 are able achieve low power optical interconnects. However, due to bandwidth limitations of electronics, and dispersion effects, achieving more than 100 Gbps per wavelength channel using IMDD techniques become difficult.
For higher capacities, coherent optical communication links have to be used due to significant additional power consumption overheads as the coherent optical communication links require significant power for high-speed ADC (analog-to-digital conversion) and DSP (digital-signal processing). DSP is required for carrier frequency and phase offset correction and for mitigation of other effects such as dispersion effects.
Efforts and proposals have been made to obviate the requirement of high-power consuming high-speed ADCs and DSP to reduce power consumption substantially in such interconnects, especially for carrier phase/frequency recovery and compensation (CPRC).
For example, previously, CPRC for BPSK signals using a Costas loop has been demonstrated. However, for such a system, a very specific type of laser is needed, requiring very fast tunability. Such lasers also have poor phase-noise characteristics. Thus, use of such lasers makes the communication link expensive, and results in high bit-error-rates (BERs) in the link.
Also, for higher data rates advanced modulation formats, such as QPSK, 8-PSK, 16-PSK, 8-QAM, 16-QAM, 32-QAM, 64-QAM have to be used, for which CPRC solutions are not easy to implement.
The principal object of the embodiments herein is to provide receiver of a coherent optical communication link.
Yet another object of the embodiment is a method of tuning phase delay in the receiver.
Yet another object of the embodiment is to provide a power efficient technique for CPRC in coherent links for QPSK, 16-QAM or similar systems.
Accordingly, the embodiments herein provide a receiver of a coherent optical communication link. The receiver comprises of a 90° optical hybrid configured to receive as an input, a reference optical carrier (LO) signal and a modulated optical signal (S) and a carrier phase offset detection block configured to generate at least one output representing a nominal phase offset between the reference optical carrier (LO) and the modulated optical signal (S) and an electronic control unit configured to receive one or more output signals from the carrier phase offset detection block for generating one or more control signals. The receiver further comprises a tunable phase delay block configured to receive the one or more control signals from the electronic control unit. Each of the 90° optical hybrid, the carrier phase offset detection block, the electronic control unit and the tunable phase delay block are configured in a feedback loop such that one or more outputs of the carrier phase offset detection block are used for tuning the phase delay of the tunable phase delay block to achieve carrier phase synchronization.
Accordingly, the embodiments herein provide a method of compensating for a carrier phase offset in a receiver of a coherent optical communication link. The method comprises of receiving, at a 90° optical hybrid, an input of each of a reference optical carrier (LO) signal and a modulated optical signal (S) and generating, through a carrier phase offset detection block, at least one output representing a nominal phase offset between the reference optical carrier (LO) and the modulated optical signal (S). The method comprises of receiving, through an electronic control unit, one or more output signals from the carrier phase offset detection block for generating one or more control signals and receiving, at a tunable phase delay block, the one or more control signals from the electronic control unit. Each of the 90° optical hybrid, the carrier phase offset detection block, the electronic control unit and the tunable phase delay block are configured in a feedback loop, such that one or more outputs of the carrier phase offset detection block are used for tuning the phase delay of the tunable phase delay block to achieve carrier phase synchronization.
Accordingly, the embodiments herein also provide an endless tunable phase delay element comprising an optical IQ modulator, configured to receive an optical signal as an input and pass as an output a modified optical signal, after adding an endless tunable phase delay to the optical input signal. The optical IQ modulator receives at least two electrical control signals to control the endless tunable phase delay added by the optical IQ modulator. Each of the at least two electrical control signals are generated by an electronic circuitry connected to the optical IQ modulator and the at least two electrical control signals are generated by using one or more lookup tables from one of an input signal received by the electronic circuitry or an electrical signal obtained after integrating the input signal received by the electronic circuitry.
Accordingly, embodiments herein also provide a method of adding an endless tunable phase delay to an optical signal. The method comprises of coupling, an optical input signal to an optical input port of an optical IQ modulator, passing as an output a modified optical signal, after adding an endless tunable phase delay to the optical input signal and applying, by using an electronic circuitry, at least two electrical control signals to electrical inputs of the optical IQ modulator along with the optical input signal. The at least two electrical control signals are generated by using one or more lookup tables from one of an input signal received by the electronic circuitry or an electrical signal obtained after integrating the input signal received by the electronic circuitry.
This receiver and method are illustrated in the accompanying drawings, throughout which like reference letters indicate corresponding parts in the various figures. The embodiments herein will be better understood from the following description with reference to the drawings, in which:
The embodiments herein and the various features and advantageous details thereof are explained more fully with reference to the non-limiting embodiments that are illustrated in the accompanying drawings and detailed in the following description. Descriptions of well-known components and processing techniques are omitted so as to not unnecessarily obscure the embodiments herein. Also, the various embodiments described herein are not necessarily mutually exclusive, as some embodiments can be combined with one or more other embodiments to form new embodiments. The term “or” as used herein, refers to a non-exclusive or, unless otherwise indicated. The examples used herein are intended merely to facilitate an understanding of ways in which the embodiments herein can be practiced and to further enable those skilled in the art to practice the embodiments herein. Accordingly, the examples should not be construed as limiting the scope of the embodiments herein.
The embodiments herein discuss a receiver implementing method for carrier phase recovery and compensation technique for low power coherent optical interconnects.
As shown in
The reference optical carrier will now be referred as LO signal and the optical carrier modulated with message signal will be referred as S signal or “modulated optical signal.” An input signal pair shown in the
The receiver refers to a Coherent receiver frontend with the 90° optical hybrid and optical-to-electrical (O/E) converters. The receiver also comprises Local Oscillator (LO) or the reference optical carrier for providing the input of the reference optical carrier (LO) signal and the modulated optical signal (S— Signal referring to an optical carrier modulated with the message signal). Complex demodulated signal is represented by the I-Q pair (i.e. the complex signal I+jQ).
The electric field of the reference optical carrier at the input of the 90° optical hybrid with an amplitude ALO, frequency fLO, undesired time varying phase ϕn,LO(t) is represented by ELO=ALO.exp(j(2πfLOt+ϕn,LO(t)), where t represents time. The electric field of the modulated optical signal with amplitude AS, optical carrier frequency fe, time varying message phase ϕm(t) and undesired time varying phase ϕn,c(t) is represented by ES=AS.exp(j(2πfct+ϕm(t)+ϕn,c(t)).
The expressions for normalized electrical signals at output of O/E converter are given by: I=AS.cos(2π(fc−fLO)t+ϕm(t)+ϕn,c(t)−ϕn,LO(t)) and Q=AS.sin(2π(fc−fLO)t+ϕm(t)+ϕn,c(t)−ϕn,LO(t)). The term fc−fLO, which quantifies the difference between the average carrier frequency of the modulated optical signal and that of the reference optical carrier at the optical hybrid input, is termed as the carrier frequency offset in the coherent optical communication link.
Similarly, the term ϕn,c(t)−ϕn,LO(t), which quantifies the phase difference between the carrier phase of the modulated optical signal and that of the reference optical carrier at the optical hybrid input, is termed as the carrier phase offset in the coherent optical communication link. Since phase and frequency are related, i.e. frequency offset is a time derivative of frequency, the overall phase offset can be written as:
ϕoffset,overall=∫2π(fc−fLO)·dt+ϕn,c(t)−ϕn,LO(t)
At least one of a non-zero phase and frequency offset exists between nominal phases and frequencies of each of the signal S and the signal LO. Frequency offset generally exists if the transmitter uses one laser source and the receiver uses another independent laser source. If the signal S and the signal LO are derived from a common laser source, then nominal (or average) frequency offset is zero, and only a phase offset exists. The phase offset may be time-varying due to phase-noise in the laser and fluctuations in the phase delays in the signal S and signal LO paths. An instantaneous non-zero frequency offset foffset(t) still exists, and is proportional to a time derivative of an instantaneous phase offset ϕ_offset(t), at time instant t, and may be written as:
Therefore, according to equation (1), the frequency offset and phase offset are inter related and compensation of one of the frequency offset or the phase offset may result in compensation of the one of the phase offset or the frequency offset. For example, if there is a non-zero nominal frequency offset, the nominal frequency offset may be compensated by adding a continuously increasing phase offset in between the signal S and the signal LO paths. If there is a nominal phase offset, the nominal phase offset may be removed by momentarily adding a frequency offset for a short time period between the signal S and the signal LO paths.
In accordance with an exemplary embodiment,
When digital modulation formats comprising an M-ary Phase Shift Keying (M-PSK) or N-ary Quadrature Amplitude Modulation (N-QAM) are used, the message signal is represented by digital symbols, and the symbols are mapped to the constellation points on the complex plane (showing raw I-Q values of the demodulation message signal).
The time varying phase and frequency offsets between the lasers result in phase shift of the constellation points on the complex (I-Q) plane (as shown in
Phase and frequency offset compensation is performed by introducing at least one of the phase delay and frequency shift in the S signal and the LO signal path so that an overall phase offset between the S signal and the LO signal is nullified. Process of introducing at least one of the phase delay and frequency shift is known as carrier phase recovery and compensation (or carrier phase synchronization). Proposed receiver and the method 200 solve problem of phase shift by using power efficient techniques. At least one of the phase compensation and the frequency compensation may be done in at least one of an optical domain and electrical domain. When the least one of the phase compensation and the frequency compensation is compensated in the electrical domain, the phase delay is actually added after the 90° optical hybrid and conversion of the optical signals to electrical domain.
In accordance with an embodiment, referring to
The receiver 100 further comprises an electronic control unit 106 configured to receive one or more output signals from the carrier phase offset detection block 104 for generating one or more control signals. The receiver 100 further comprises a tunable phase delay block 108 configured to receive the one or more control signals from the electronic control unit 106.
In the receiver 100, each of the 90° optical hybrid 102, the carrier phase offset detection block 104, the electronic control unit 106 and the tunable phase delay block 108 are configured in a feedback loop such that one or more outputs of the carrier phase offset detection block 104 are used for tuning the phase delay of the tunable phase delay block 108 to achieve carrier phase synchronization.
In accordance with an alternate embodiment, referring to
At step 402, the method 400 receives an input of each of the reference optical carrier (LO) signal and a modulated optical signal (S) at the 90° optical hybrid 102. At step 404, the method 400 generates at least one output representing a nominal phase offset between the reference optical carrier (LO) and the modulated optical signal (S) through the carrier phase offset detection block 104.
At step 406, the method 400 receives one or more output signals from the carrier phase offset detection block 104 for generating one or more control signals through the electronic control unit. At step 408, the method 200 receives the one or more control signals from the electronic control unit 106 at the tunable phase delay block 108. In the proposed method 400, each of the 90° optical hybrid 102, the carrier phase offset detection block 104, the electronic control unit 106 and the tunable phase delay block 108 are configured in a feedback loop, such that one or more outputs of the carrier phase offset detection block 104 are used for tuning the phase delay of the tunable phase delay block 108 to achieve carrier phase synchronization.
Still referring to
The phase offset detection block 104 may produce second output signal. In another predefined range of the frequency offset between the signal S and the signal LO, when the average magnitude of the second output changes monotonically with the magnitude of the frequency offset between the signal S and the signal LO, the second output signal is termed as a frequency error signal.
In an embodiment, the phase offset detection block 104 may be implemented by at least one of using a combination of photonic components and electronic components comprising one of couplers, photo-detectors, modulator, or using purely electronic components comprising mosfets on electronic integrated circuit (EIC). In optical domain, the phase offset detection block 104 may be implemented by using one of couplers, modulators, and photodetectors. In an Analog domain implementation, the phase detection block 104 may be implemented in an EIC by using cross-correlator architecture. One embodiment of the cross-correlator based phase detector (phase detection clock 104) is shown in
In
The phase error signal coming out of the phase detection block 104 in the analog domain will be a monotonically varying function of the phase offset between the S signal and the LO signal, at least when the phase offset comprises in a range of −0.1 radian to +0.1 radian, for signals using a few commonly used modulation formats, such as for M-PSK, and N-QAM, where M is 2, 4, 8 or 16 and N is 4, 8, 16, 32 or 64.
The phase offset detection block 104 may also be implemented in an EIC the digital domain implementation using algorithms such as Viterbi-Viterbi, blind-phase search or look-up table-based algorithms.
The frequency error signal changes monotonically with the frequency offset between the S signal and the LO signals, at least when the frequency offset is in the range of −10 MHz to +10 MHz.
The electronic control unit 106 of the receiver 100 is configured to generate the control signals (details described later).
The receiver 100 further comprises the phase delay block (tunable phase delay block) 108. The tunable phase delay block 108 introduces a variable phase delay dependent on one or more electrical control signals generated by the electronic control unit 106 and are applied to the tunable phase delay block 108. The phase delay (variable phase delay) may be added to the modulated optical signal (S) or the LO in the optical domain, or to the demodulated complex (I,Q) signal in the electrical domain.
The phase delay produced by the phase delay block 108 monotonically varies with the input signal, at least in a predefined range. The phase delay block 108 may have at least one of a finite phase delay range or may be implemented in a manner that allows provision of an endless phase delay with time (referring to the phase delay used for applying a frequency offset).
In an exemplary embodiment, the finite phase delay range to be applied by the phase delay block 108 may be realized by using one of an electro-optic phase modulator or a thermo-optic phase modulator implemented as a discrete device or as a phase modulator implemented in a photonic integrated circuit (PIC).
In case of finite delay range to be applied, variable component of the phase delay added by the phase modulator may be approximated as ϕout=πVcont/V□. Here, ϕout, Vcont, and V□ represent each of an added phase delay, an applied electrical control signal (generally a voltage signal) amplitude and an electrical control signal amplitude respectively, resulting in a phase shift of π radians, respectively.
The phase delay block 108 in the optical domain may also be implemented by using a thermo-optic phase shifter, in a case, when an amount of phase delay added by the phase delay block 108 changes monotonically with a temperature change in a waveguide, caused by tunable amount of heat generated by the control signal when the phase delay is applied to a heating element.
In an embodiment, implementation of the phase delay block 108 may also be implemented to add an endless phase delay (then phase delay block may be implemented as an endless phase delay element 108). In case of endless phase delay, the phase delay block may provide any amount of phase delay by one of increasing the phase delay or decreasing the phase delay over a predefined time period to get a desired amount of delay.
In quadrature IQ modulator configuration, Vbias1 and Vbias2 are adjusted such that corresponding internal intensity modulators of the I-Q modulator are biased at null points (which means that the output power level of each of the internal individual intensity modulator is zero when the values of signal components □ and β are zero), and the Vbias3 is adjusted to provide a relative phase delay of π/2 between the internal modulator outputs before coming the optical signals to obtain the final output from the modulator, as shown in the
In some of these IQ modulators, the signal components □ and β are added to each of Vbias1 and Vbias2 voltages to provide the desired phase delay. When the values of each of □ and β are <<Vπ each, the phase delay added (in radians) is equal to arctan(β/□). Here, Vπ is the bias voltage needed by the phase modulator for adding a phase delay of π radians. If the signals □ and β are continuous time functions (derivatives of each of the □ and β are defined for all time instants), the phase delay added by the phase delay block will also be a continuous function of time.
The optical domain tunable endless phase delay element described above can also be used in a variety of other independent applications, which may not be limited to the receivers of coherent optical communication links. For example, the tunable phase delay element may be used for adding tunable phase delays to the optical signals use in LiDAR applications for beam forming and beam steering by providing desired phase delays to optical signals. The tunable phase delay elements can also be used for optical phase locked loops and for interferometry and sensing applications.
In general, optical phase modulators are used for providing tunable optical phase delay. However, such modulators have a limited range over which the phase delay can be tuned. For example, the optical phase modulator, adds a phase delay that changes monotonically with respect to the applied electrical signal. Since the applied electrical signal cannot go beyond certain range, the tunable optical phase delay range gets limited by the maximum value of the electrical signal that can be applied. In case of the endless tunable optical phase delay element described here, the two signals □ and β are varied together to overcome this limitation. In general, it is desired that the output intensity of the endless tunable optical phase delay element remains constant, irrespective of the amount of phase delay added by it. The values of □ and β have to be chosen such that this requirement is satisfied. For example, when the optical IQ modulator is implemented using a nested Mach-Zehnder modulator shown in
Above expression is obtained under the condition that the phase shifts added by phase modulators inside the nested Mach-Zehnder modulator vary linearly with respect to the applied voltage. In this case, depending on the amount of phase delay needed, the □ and β signals can be generated by an electronic circuitry. This circuitry can use lookup tables to generate the values of □ and β, which are dependent on the desired phase delay, in addition to getting the desired output intensity from the tunable optical delay element. An example of the values of □ and β with respect to the desired phase delay have been shown in
The values provided by the lookup table with respect to the desired phase delay can also be calibrated to incorporate the effects of non-idealities in optical IQ modulator. The lookup table can be implemented using digital electronic circuitry. The electronic circuitry can also integrate the input signal to generate a signal that represents the desired phase delay. This signal may have jumps corresponding to jumps of 2π radians in phase. However, these jumps will not result in phase jumps in the phase delay added by the endless tunable optical phase delay element.
foffset is a frequency offset between the S signal and LO signal, the phase delay added by the block increases continuously with time, i.e. the tunable component of the phase delay becomes:
ϕout=2πfoffsett
Alternatively, the added phase delay becomes unbounded or endless. The endless phase delay through the phase delay block 108 may help in covering a very wide range of phase delays, and may also be useful if there is no other tunable frequency offset correction mechanism. In the above-mentioned example, the endless phase delay through the phase delay block 108 provides a frequency shift by foffset. When foffset is varying with time, the desired output phase for CPRC is given below:
ϕout=∫2πfoffset(t)dt
Where, foffset(t) is the frequency offset at time instant t. Therefore, the desired values of □ and β as a function of time.
The endless phase delay may compensate for any amount phase offset and help in avoiding the loss of synchronization due to saturation of phase delay that may happen when a conventional phase delay block (i.e. the phase modulator-based phase delay block) is used.
In an embodiment,
As shown in
Here complex output signal Iout+jQout is the phase delayed version input complex I-Q signal (i.e. the complex signal I+jQ). The phase delay added is proportional to arctan(β/□). If the signals □ and β are continuous time functions (i.e. their derivatives are defined for all time instants), the phase delay added by the phase delay block 108 will also be a continuous function of time.
In an embodiment, the receiver 100 also comprises a frequency shifting element 110 in order to compensate for frequency offset. For compensating the frequency offset between the carrier and LO lasers, tunable frequency shifting element 110 (or the frequency shifting element 110) is required. In one embodiment, the tunable frequency shifting element 110 is implemented by using the endless phase delay in one of the path of the S signal or path of the LO signal by using one of an optical IQ modulator, or using an SSB mixer in electrical domain, as discussed earlier. Therefore, the phase delay block 108 providing the endless phase delay element may also be treated as a frequency shifting element 110.
In case of any limitations in using the phase delay block 108 for shifting frequency, the use of tunable laser (may also be referred as the tunable aser 110) may be more beneficial to achieve the desired frequency shift. The tunable laser at the receiver 100 of the coherent optical link may act as the frequency shifting element 110. However, in this case, the frequency shift is provided directly to the reference optical carrier (i.e. the LO signal). The amount of frequency shift may be controlled by one or more signals coming out of the electronic control unit 106. The control signals may be at least one of analog in nature, and digital in nature. For example, the laser may have digitally controlled coarse frequency tunability and analog voltage controlled fine frequency tunability.
The frequency shifting element 110 can also be implemented using the tunable laser. The frequency shift of an analog signal controlled tunable laser may be controlled by varying the analog control signal generated from the electronic control unit. The frequency shift of the tunable laser can be varied monotonically at least over the frequency range of 10 MHz with respect to the analog control signal. The frequency shift of the digitally controlled tunable laser is tuned monotonically with respect to the digital control word generated by digital circuitry in the electronic control unit. By varying the digital control word monotonically, the frequency shift of at least of the range of 10 MHz can be achieved over a range of digital control word.
As discussed earlier, the electronic control unit 106 is configured to generate control signals for each of the phase delay block 108 and the frequency shifting element 110.
The electronic control unit 106 takes at least one of the phase error signal and the frequency error signal from the phase offset detection block 104 and generates and transmits the control signals (electrical signals) to at least one of the phase delay block 108 and frequency shifting element 110.
The electronic control unit 106 comprises of at least one analog, digital and mixed signal circuitry to complete the feedback loop in the receiver 100. The electronic control unit 106 is designed to ensure that the feedback loop is stable and is able to track and compensate for at least one of the phase offset and the frequency offsets between the S signal and the LO signal.
The electronic control unit 106 in the analog domain may comprise passive circuit components such as resistors, capacitors and inductors. The electronic control unit 106 in the analog domain may also include some active circuit components such as circuits made using op-amps, comparators, current sources, charge-pumps and switches to implement integrators, differentiators and other signal conditioning circuits.
The values of the passive circuit components and the active circuit components may be designed to achieve a desired transfer function of the feedback loop to ensure that the feedback loop is stable and is able to track and compensate for at least one of the phase offset and the frequency offsets between the S signal and LO signal by adjusting the transfer function(s). The circuitry implementing the transfer function/characteristics of the electronic control unit 106 is also often termed as the loop filter.
The electronic control unit 106 may also use electronic circuitry developed in digital domain. In case of the digital domain, one or more analog signals or digitized signals coming from the phase offset detection block 104 are processed in the digital domain (i.e. using digital signal processing techniques that use synchronous and combinational logic circuits). The digital domain processing again effectively implements the loop filter in digital domain. The final output (from the electronic control unit 106) may be used directly to tune the phase delay provided by at least one the tunable phase delay block 108 and the frequency shift added by the tunable frequency shifting element 110.
One or more of the final output(s) may also be converted to analog domain using one or more digital-to-analog converters and provide to the tunable phase delay block 108 and/or tunable frequency shifting element 110.
The electronic control unit 106 may be able to generate the desired □ and β signals, as shown above in
In many cases, at least one of the phase delay and frequency shift added by the tunable phase delay block 108 and the frequency shifting element 110 may show a small or significant deviation from desired behavior causing distortion. The electronic control unit 106 may also be configured to compensate for the distortion, for example, by adding pre-adjusting input-to-output transfer characteristics using additional calibration mechanism.
The electronic control unit 106 may also be able to provide automatically adjustable bias(es) to the tunable phase delay block and/or frequency shifting element 110 to get acceptable transfer characteristics. For example, the bias voltages provided to the optical IQ modulator shown in
In addition, to reduce losses in the optical IQ modulator based phase shifter, the amplitudes of □ and β signals may have to be increased, which changes the phase delay characteristics and adds amplitude variations in the optical IQ modulator output intensity. The look-up tables may be used to obtain modified □ and β values, to achieve the desired phase delay characteristics overall and a constant intensity output from the tunable phase delay block.
Still referring to
In another embodiments, the tunable phase delay may be added in the electrical domain. In the proposed receiver 100 and the method 400, the tunable laser (additional) may be also used to tune out the frequency offset and accumulated phase offsets.
In an exemplary embodiment, as discussed above,
In an exemplary embodiment,
In another exemplary embodiment,
Each of the
In another exemplary embodiment, when the signal LO and the signal S are derived from an independent optical (or laser) sources, then nominal (or average) frequencies of the signal LO and the signal S may have a small difference or offset (foffset), even if intended design for the signal LO and the signal S is to provide similar nominal frequency. Using the frequency shifting element, the foffset may be nullified, so that signal S and the signal LO are frequency synchronized. One or more feedback signals from the electronic control unit 106 may then be provided to the frequency shifting element 110 to get desired frequency shift.
In another exemplary embodiment,
In another exemplary embodiment,
In systems using independent lasers at transmitter and the receiver, the laser at the receiver 100 is used to provide the reference optical carrier (LO). The laser may comprise a tunable laser, acting as the frequency shifting element 110. Tunable lasers may have a slow response time, and hence, an additional phase delay block 108 has to be added to compensate for fast changing phase offset.
In an exemplary embodiment, in the proposed receiver 100 and the method, as shown in
In another embodiment, as shown in
In yet another embodiment, as shown in
Furthermore, in the coherent optical links using independent lasers at the transmitter and the receiver, instead of using a tunable laser at the receiver for shifting frequency, the frequency shifting element 110 may be introduced in at least one of the path of the S signal and path of the LO signal in the optical domain or before the phase offset detection block 104 in the electrical domain.
In another exemplary embodiment,
In another exemplary embodiment,
In another exemplary embodiment,
In another exemplary embodiment,
In another exemplary embodiment,
In each of the embodiment implemented through the receiver 100 and the method 400, as shown in each of the
The frequency shifting element 110 shifts the frequency of LOin so that foffset between the signal S and the signal LO tends to zero for achieving frequency synchronization between the signal S and the signal LO. The frequency of the tunable laser and the phase delay of phase delay blocks 108 are tuned by the control signals generated by electronic control unit 106.
In one of the embodiments as shown in
In another embodiment as shown in
In yet another embodiment as shown in
In another embodiment as shown in
Embodiments as shown in each of the
In accordance with an embodiment, the endless tunable phase delay element 108 (or tunable phase delay block providing endless delay) as discussed in
The optical IQ modulator receives at least two electrical control signals to control the endless tunable phase delay added by the optical IQ modulator. Each of the at least two electrical control signals are generated by the electronic circuitry (electronic control circuit 106) connected to the optical IQ modulator. The at least two electrical control signals are generated by using one or more lookup tables from one of an input signal received by the electronic circuitry 106 or an electrical signal obtained after integrating the input signal received by the electronic circuitry 106.
In another exemplary embodiment, referring to
The proposed receiver 100, the method 400 and the method 2000 may result in very high-speed phase/frequency offset correction overall and may be used with lasers having low phase noise levels at the expense of slow laser tunability.
The foregoing description of the specific embodiments will so fully reveal the general nature of the embodiments herein that others can, by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Therefore, while the embodiments herein have been described in terms of preferred embodiments, those skilled in the art will recognize that the embodiments herein can be practiced with modification within the spirit and scope of the embodiments as described herein.
| Number | Date | Country | Kind |
|---|---|---|---|
| 201821042617 | Nov 2018 | IN | national |
