The following disclosure discusses, in general, a semiconductor device and manufacture of that device and, in one embodiment, discusses a semiconductor device and a method of manufacture therefore that uses an etch to separate dies from a semiconductor wafer and forms a passivation layer on the edges of each of the dies to increase device space on a wafer.
Transistor device size continues to decrease as semiconductor device manufacturers drive to realize higher transistor density, lower power consumption, and higher speed operation of integrated circuits. As transistor device size decreases, some transistor manufacturing steps must be modified to reflect the smaller physical dimensions of the scaled transistors. Moreover, there is an emphasis in the semiconductor industry to increase the amount of wafer space available so that the component density may be increased further, while adequately protecting the circuitry.
Scribe seals and scribe streets are areas that presently consume much needed wafer space. Scribe seals are placed at the perimeter of each of the dies to protect the outer edges of the circuitry from postproduction processes. The scribe seals are typically formed during the fabrication of transistor devices and during the filling of the vias and the formation of the metal layers. As such, they consist of the same materials used to form the vias and metal layers. They are built next to the scribe streets on opposing sides of the circuitry and within the silicon wafer, and the transistor's circuitry typically extends to the scribe seals. The scribe streets are the areas located between dies that are set aside for physically separating the dies from the semiconductor wafer.
When complete, the scribe seals help passivate and protect the circuitry during the dicing or sawing processes that are presently used to physically separate the die. Unfortunately, however, each of the scribe seals and scribe streets requires a relatively large amount of wafer surface. For example, in a wafer having a die size of 2000 microns square, the scribe street may be about 62 microns wide with the scribe seals also consuming about 10 microns on each side of the circuitry. Thus, the percentage of scribe street/scribe area may consume as much as 8.4% of the wafer.
As mentioned above, manufacturers typically use saw blades to separate the dies from the wafer. Conventional processes typically use varying blade thicknesses and depths to dice the wafer into the individual dies. Although great care is used, damage can still occur to the circuitry. This is due primarily to the fact that many semiconductor devices include several layers of brittle dielectric material having low dielectric constants, which makes the structure delicate and susceptible to physical damage. Thus, during the heavy mechanical cutting action of the saw blade, damage can easily occur to the delicate circuit structures. In addition, the ragged edge left by the saw blade can form conductive paths along the die's edge, which in turn, can lead to shorts within the circuitry or may be a place into which moisture can enter the device.
Accordingly, what is needed in the art is a device and method for making that device that avoids the problems associated with the above-discussed conventional processes.
In one embodiment, the method comprises etching a trench into a scribe street located between dies that are formed on a semiconductor wafer. The dies each include circuitry, and the etch is conducted to a depth within the semiconductor wafer that extends beyond a depth of the circuitry and forms an edge of the die. A passivation layer is placed on the edge of the die and a back surface of the semiconductor wafer is removed until it intersects the trench, which separates the dies from the wafer.
In another embodiment, a method of manufacturing a semiconductor device comprises forming active circuitry within dies located on a semiconductor wafer. A scribe street is located between each of the dies, and the active circuitry terminates at the scribe street. A trench is etched into each of the scribe streets to a depth that extends beyond a depth of the active circuitry. In this embodiment, the etch leaves a portion of the scribe street between the trench and the active circuitry and forms an edge of the die. Also, a scribe seal is not present between the edge of the die and the active circuitry. A passivation layer is formed on the edge of the die such that the passivation layer extends past the depth of the active circuitry. A back surface of the semiconductor wafer is removed until the trench is intersected. This intersection separates the dies from the semiconductor wafer, but the passivation layer remains on the edge of each of the dies.
Another embodiment provides a semiconductor device. The device comprises a die that has an etched edge that includes a portion of a scribe street. Active circuitry is located on the die and dielectric layers are located over the active circuitry. Interconnects that are located within and over the dielectric layers contact the active circuitry. The active circuitry, dielectric layers, and interconnects form at least a portion of an integrated circuit (IC) and the IC terminates at the edge of the die. A passivation layer is located on the portion of the scribe street that forms the edge of the die and a scribe seal is not present between the edge of the die and the active circuitry.
For a better understanding, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
Scribe streets 110 separate the dies 105. The streets 110 do not form a portion of the circuitry 103 and their purpose is to provide a space on the wafer so that the dies can be separated from the wafer 100. As mentioned above, conventional semiconductor wafers include scribe seals that are metal structures, which abut the scribe street 110 and are located between the circuitry 103 and the scribe street 110. However, these conventional scribe seals are not necessarily present in all embodiments. Thus, since the scribe seals may be omitted, additional wafer space can be realized.
The semiconductor wafer 100 further includes a semiconductor substrate 220, which may be comprised of any conventional material, e.g., silicon, germanium, or silicon germanium, etc. Circuitry 225, which may be the same or different from die to die, is located over the substrate and within the perimeter 210a of each of the dies 210. The circuitry 225, illustrated as striations within each die 210, may comprise a device level with gate electrodes, typically located at the bottom level, and any number of metal levels located thereover. In
In
The etch 310 is conducted to form a trench 320 in the street 215. The depth of the trench may vary, but the trench should extend past the depth or lowest level of the circuitry 225. The depth or lowest level of the circuitry 225 may include the interface between an epitaxial layer and the base substrate 220. It may also include any buried contacts, isolation regions, or other structures that are involved in the operation of the circuitry 225, either as conductors or electrical insulators, and that are located below the gate electrodes or well regions of the circuitry 225.
The width to depth aspect ratio of the trench 320 may also vary, but in one embodiment, the aspect ratio may range from about 1:8 to about 1:10. The width of the trench 320 may also vary, but the width must be sufficient to allow room for the deposition of a passivation layer within the trench 320. For example, the width may be about 4 microns. In the embodiment illustrated in
After the trench 320 is formed, a passivation layer 410 is deposited in the trench 320, as seen in
Following the formation of the passivation layer 410 and the completion of the bond pad formation, a back surface 710 (non-circuit side) of the wafer 100 is subjected to a back-grind or a chemical/mechanical polishing (CMP) process. The back-grind or CMP process, which may be conventional, is conducted until the trench is intersected. At this point, the trench no longer exists, and is replaced by a separation space 715. When the back-grind reaches the trench the dies 720 and 725 are separated from the wafer 100 and from each other to form the individual dies 720 and 725, as seen in
From the foregoing, embodiments of a method and device that saves additional space across a semiconductor wafer are presented. Conventional scribe seals can be eliminated, if desired, and the scribe street's width can be reduced. This additional space is gained by using an etch to form a trench after a passivation layer is deposited in the trench. A back-grind or CMP process is used to remove semiconductor material from the back surface of the wafer until it intersects the trench and separates the dies into individual dies. The passivation layer remains in place following the back-grind process and forms at least a portion of an environmental seal.
Those skilled in the art will appreciate that other and further additions, deletions, substitutions and modifications may be made to the described embodiments without departing from the scope of the invention.