Alexander B. Slota

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Santa Clara, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Heterogeneous clock management solution
- Patent number 12,301,697
- Issue date May 13, 2025
- Intel Corporation
- Vikram Dadwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for low-latency network packet transmission
- Patent number 11,329,925
- Issue date May 10, 2022
- Intel Corporation
- Alexander B. Slota
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Fixed ethernet frame descriptor
- Patent number 11,237,990
- Issue date Feb 1, 2022
- Intel Corporation
- Alexander Slota
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fixed ethernet frame descriptor
- Patent number 10,684,963
- Issue date Jun 16, 2020
- Intel Corporation
- Alexander Slota
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
HETEROGENEOUS CLOCK MANAGEMENT SOLUTION
- Publication number 20210111862
- Publication date Apr 15, 2021
- Vikram Dadwal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FIXED ETHERNET FRAME DESCRIPTOR
- Publication number 20210064554
- Publication date Mar 4, 2021
- Intel Corporation
- Alexander Slota
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FIXED ETHERNET FRAME DESCRIPTOR
- Publication number 20190138462
- Publication date May 9, 2019
- Alexander Slota
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR LOW-LATENCY NETWORK PACKET TRANSMISSION
- Publication number 20190044870
- Publication date Feb 7, 2019
- Intel Corporation
- Alexander B. Slota
- H04 - ELECTRIC COMMUNICATION TECHNIQUE