Bruce R. Hancock

Person

Altadena, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Mapping electrical crosstalk in pixelated sensor arrays
- Patent number 9,596,460
- Issue date Mar 14, 2017
- California Institute of Technology
- Suresh Seshadri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and circuit for injecting a precise amount of charge onto a...
- Patent number 9,294,077
- Issue date Mar 22, 2016
- California Institute of Technology
- Bruce R. Hancock
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Sparsely-bonded CMOS hybrid imager
- Patent number 9,105,548
- Issue date Aug 11, 2015
- California Institute of Technology
- Thomas J. Cunningham
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Minimal power latch for single-slope ADCs
- Patent number 8,928,379
- Issue date Jan 6, 2015
- California Institute of Technology
- Bruce R. Hancock
- G01 - MEASURING TESTING
Information Patent Grant
Mixed linear/square-root encoded single slope ramp provides a fast,...
- Patent number 8,624,769
- Issue date Jan 7, 2014
- California Institute of Technology
- Christopher James Wrigley
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Mapping electrical crosstalk in pixelated sensor arrays
- Patent number 8,481,907
- Issue date Jul 9, 2013
- California Institute of Technology
- Suresh Seshadri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Analog bus driver and multiplexer
- Patent number 8,164,663
- Issue date Apr 24, 2012
- California Institute of Technology
- Bedabrata Pain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Photodiode CMOS imager with column-feedback soft-reset for imaging...
- Patent number 7,746,383
- Issue date Jun 29, 2010
- California Institute of Technology
- Bedabrata Pain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Parallel phase-sensitive three-dimensional imaging camera
- Patent number 7,274,815
- Issue date Sep 25, 2007
- Sandia Corporation
- Colin L. Smithpeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Increasing the dynamic range of CMOS photodiode imagers
- Patent number 7,235,771
- Issue date Jun 26, 2007
- California Institute of Technology
- Bedabrata Pain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Photodiode CMOS imager with column-feedback soft-reset for imaging...
- Patent number 7,019,345
- Issue date Mar 28, 2006
- California Institute of Technology
- Bedabrata Pain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High-speed on-chip windowed centroiding using photodiode-based CMOS...
- Patent number 6,721,464
- Issue date Apr 13, 2004
- California Institute of Technology
- Bedabrata Pain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-speed on-chip windowed centroiding using photodiode-based CMOS...
- Patent number 6,519,371
- Issue date Feb 11, 2003
- California Institute of Technology
- Bedabrata Pain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Growth of III-V films by control of MBE growth front stoichiometry
- Patent number 5,094,974
- Issue date Mar 10, 1992
- The United States of America as represented by the administrator of the Natio...
- Frank J. Grunthaner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MBE growth technology for high quality strained III-V layers
- Patent number 5,091,335
- Issue date Feb 25, 1992
- The United States of America as represented by the administrator of the Natio...
- Frank J. Grunthaner
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MAPPING ELECTRICAL CROSSTALK IN PIXELATED SENSOR ARRAYS
- Publication number 20150304653
- Publication date Oct 22, 2015
- California Institute of Technology
- Suresh SESHADRI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PRECISION CHARGE INJECTOR
- Publication number 20140027610
- Publication date Jan 30, 2014
- Bruce R. Hancock
- G01 - MEASURING TESTING
Information Patent Application
MINIMAL POWER LATCH FOR SINGLE-SLOPE ADCs
- Publication number 20130214760
- Publication date Aug 22, 2013
- California Institute of Technology
- Bruce R. Hancock
- G01 - MEASURING TESTING
Information Patent Application
SPARSELY-BONDED CMOS HYBRID IMAGER
- Publication number 20130175430
- Publication date Jul 11, 2013
- California Institute of Technology
- Thomas J. Cunningham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MIXED LINEAR/SQUARE-ROOT ENCODED SINGLE SLOPE RAMP PROVIDES A FAST,...
- Publication number 20130038482
- Publication date Feb 14, 2013
- California Institute of Technology
- Christopher James Wrigley
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Mapping electrical crosstalk in pixelated sensor arrays
- Publication number 20100020099
- Publication date Jan 28, 2010
- California Institute of Technology
- Suresh Seshadri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Analog bus driver and multiplexer
- Publication number 20070012870
- Publication date Jan 18, 2007
- Bedabrata Pain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Increasing the dynamic range of CMOS photodiode imagers
- Publication number 20060023092
- Publication date Feb 2, 2006
- Bedabrata Pain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Two dimensional range-imaging
- Publication number 20050243302
- Publication date Nov 3, 2005
- Bedabrata Pain
- G01 - MEASURING TESTING
Information Patent Application
Photodiode CMOS imager with column-feedback soft-reset for imaging...
- Publication number 20040169740
- Publication date Sep 2, 2004
- Bedabrata Pain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
High-speed on-chip windowed centroiding using photodiode-based CMOS...
- Publication number 20030133625
- Publication date Jul 17, 2003
- California Institute of Technology
- Bedabrata Pain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Photodiode CMOS imager with column-feedback soft-reset for imaging...
- Publication number 20020182788
- Publication date Dec 5, 2002
- Bedabrata Pain
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Bruce R. Hancock

Person

Patents Grantslast 30 patents

Mapping electrical crosstalk in pixelated sensor arrays

Method and circuit for injecting a precise amount of charge onto a...

Sparsely-bonded CMOS hybrid imager

Minimal power latch for single-slope ADCs

Mixed linear/square-root encoded single slope ramp provides a fast,...

Mapping electrical crosstalk in pixelated sensor arrays

Analog bus driver and multiplexer

Photodiode CMOS imager with column-feedback soft-reset for imaging...

Parallel phase-sensitive three-dimensional imaging camera

Increasing the dynamic range of CMOS photodiode imagers

Photodiode CMOS imager with column-feedback soft-reset for imaging...

High-speed on-chip windowed centroiding using photodiode-based CMOS...

High-speed on-chip windowed centroiding using photodiode-based CMOS...

Growth of III-V films by control of MBE growth front stoichiometry

MBE growth technology for high quality strained III-V layers

Patents Applicationslast 30 patents

MAPPING ELECTRICAL CROSSTALK IN PIXELATED SENSOR ARRAYS

PRECISION CHARGE INJECTOR

MINIMAL POWER LATCH FOR SINGLE-SLOPE ADCs

SPARSELY-BONDED CMOS HYBRID IMAGER

MIXED LINEAR/SQUARE-ROOT ENCODED SINGLE SLOPE RAMP PROVIDES A FAST,...

Mapping electrical crosstalk in pixelated sensor arrays

Analog bus driver and multiplexer

Increasing the dynamic range of CMOS photodiode imagers

Two dimensional range-imaging

Photodiode CMOS imager with column-feedback soft-reset for imaging...

High-speed on-chip windowed centroiding using photodiode-based CMOS...

Photodiode CMOS imager with column-feedback soft-reset for imaging...