Chia-Jen Chang

Person

Houston, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Circuits, integrated circuits, and methods for interleaved parity c...
- Patent number 9,166,625
- Issue date Oct 20, 2015
- Micron Technology, Inc.
- Guorjuh Thomas Hwang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuits, integrated circuits, and methods for interleaved parity c...
- Patent number 8,806,316
- Issue date Aug 12, 2014
- Micron Technology, Inc.
- Guorjuh Thomas Hwang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for controlling delay stage of off-chip driver
- Patent number 8,098,083
- Issue date Jan 17, 2012
- Nanya Technology Corp.
- Phat Truong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low power synchronous memory command address scheme
- Patent number 7,940,543
- Issue date May 10, 2011
- Nanya Technology Corp.
- Chia-Jen Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
External compensation for input current source
- Patent number 7,911,262
- Issue date Mar 22, 2011
- Nanya Technology Corp.
- Phat Truong
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
SERUM METABOLOMICS RELATED TO CHIMERIC ANTIGEN RECEPTOR (CAR) T-CEL...
- Publication number 20240241107
- Publication date Jul 18, 2024
- Board of Regents, The University of Texas System
- Neeraj SAINI
- C12 - BIOCHEMISTRY BEER SPIRITS WINE VINEGAR MICROBIOLOGY ENZYMOLOGY MUTATION...
Information Patent Application
Gut Microbiome as a Predictive Biomarker of Outcomes for Chimeric A...
- Publication number 20240084403
- Publication date Mar 14, 2024
- Board of Regents, The University of Texas System
- Neeraji Saini
- C12 - BIOCHEMISTRY BEER SPIRITS WINE VINEGAR MICROBIOLOGY ENZYMOLOGY MUTATION...
Information Patent Application
CIRCUITS, INTEGRATED CIRCUITS, AND METHODS FOR INTERLEAVED PARITY C...
- Publication number 20140331110
- Publication date Nov 6, 2014
- Guorjuh Thomas Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUITS, INTEGRATED CIRCUITS, AND METHODS FOR INTERLEAVED PARITY C...
- Publication number 20130179758
- Publication date Jul 11, 2013
- Micron Technology, Inc.
- Guorjuh Thomas Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER SYNCHRONOUS MEMORY COMMAND ADDRESS SCHEME
- Publication number 20110176376
- Publication date Jul 21, 2011
- Chia-Jen Chang
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR CONTROLLING DELAY STAGE OF OFF-CHIP DRIVER
- Publication number 20100253391
- Publication date Oct 7, 2010
- Phat Truong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
EXTERNAL COMPENSATION FOR INPUT CURRENT SOURCE
- Publication number 20100244940
- Publication date Sep 30, 2010
- Phat Truong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REDUCED SIZE CHARGE PUMP FOR DRAM SYSTEM
- Publication number 20090257272
- Publication date Oct 15, 2009
- Benjamin J. Stembridge
- G11 - INFORMATION STORAGE
Information Patent Application
LOW POWER SYNCHRONOUS MEMORY COMMAND ADDRESS SCHEME
- Publication number 20090238014
- Publication date Sep 24, 2009
- Chia-Jen Chang
- G11 - INFORMATION STORAGE

Chia-Jen Chang

Person

Patents Grantslast 30 patents

Circuits, integrated circuits, and methods for interleaved parity c...

Circuits, integrated circuits, and methods for interleaved parity c...

Apparatus and method for controlling delay stage of off-chip driver

Low power synchronous memory command address scheme

External compensation for input current source

Patents Applicationslast 30 patents

SERUM METABOLOMICS RELATED TO CHIMERIC ANTIGEN RECEPTOR (CAR) T-CEL...

Gut Microbiome as a Predictive Biomarker of Outcomes for Chimeric A...

CIRCUITS, INTEGRATED CIRCUITS, AND METHODS FOR INTERLEAVED PARITY C...

CIRCUITS, INTEGRATED CIRCUITS, AND METHODS FOR INTERLEAVED PARITY C...

LOW POWER SYNCHRONOUS MEMORY COMMAND ADDRESS SCHEME

APPARATUS AND METHOD FOR CONTROLLING DELAY STAGE OF OFF-CHIP DRIVER

EXTERNAL COMPENSATION FOR INPUT CURRENT SOURCE

REDUCED SIZE CHARGE PUMP FOR DRAM SYSTEM

LOW POWER SYNCHRONOUS MEMORY COMMAND ADDRESS SCHEME