Ganesh Hariharan

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Santa Clara, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Die singulation and stacked device structures
- Patent number 11,075,117
- Issue date Jul 27, 2021
- Xilinx, Inc.
- Ganesh Hariharan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for testing interposer dies prior to assembly
- Patent number 9,989,572
- Issue date Jun 5, 2018
- Xilinx, Inc.
- Raghunandan Chaware
- G01 - MEASURING TESTING
Information Patent Grant
Heterogeneous integration of integrated circuit device and companio...
- Patent number 9,865,567
- Issue date Jan 9, 2018
- Xilinx, Inc.
- Raghunandan Chaware
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for providing charge protection to one or more dies during f...
- Patent number 9,385,106
- Issue date Jul 5, 2016
- Xilinx, Inc.
- Raghunandan Chaware
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package testing
- Patent number 9,341,668
- Issue date May 17, 2016
- XILNIX, INC.
- Ganesh Hariharan
- G01 - MEASURING TESTING
Information Patent Grant
Method for removing bumps from incomplete and defective interposer...
- Patent number 8,900,987
- Issue date Dec 2, 2014
- Xilinx, Inc.
- Inderjit Singh
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
DIE SINGULATION AND STACKED DEVICE STRUCTURES
- Publication number 20190267287
- Publication date Aug 29, 2019
- Xilinx, Inc.
- Ganesh Hariharan
- H01 - BASIC ELECTRIC ELEMENTS