Jeffery Hunt

Person

Starkville, MS, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multiple sensor data processor interface and relay
- Patent number 11,792,264
- Issue date Oct 17, 2023
- Camgian Microsystems Corp.
- Gary Butler
- G08 - SIGNALLING
Information Patent Grant
Multiple sensor data processor interface and relay
- Patent number 10,250,690
- Issue date Apr 2, 2019
- Camgian Microsystems Corp.
- Gary Butler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multiple sensor data processor interface and relay
- Patent number 9,596,091
- Issue date Mar 14, 2017
- Camgian Microsystems, Corp
- Gary Butler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for dynamically detecting environmental condit...
- Patent number 8,271,810
- Issue date Sep 18, 2012
- Cypress Semiconductor Corporation
- Michael Fliesler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Input buffer with adaptive trip point
- Patent number 7,808,275
- Issue date Oct 5, 2010
- Cypress Semiconductor Corporation
- George McCollough Ansel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Variable impedance sense architecture and method
- Patent number 7,479,800
- Issue date Jan 20, 2009
- Cypress Semiconductor Corporation
- Kalyana C. Vullaganti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable matrix architecture
- Patent number 7,139,292
- Issue date Nov 21, 2006
- Cypress Semiconductor Corp.
- Brian P. Evans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data path configurable for multiple clocking arrangements
- Patent number 7,132,854
- Issue date Nov 7, 2006
- Cypress Semiconductor Corporation
- Suwei Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-port memory cell and access method
- Patent number 7,113,445
- Issue date Sep 26, 2006
- Cypress Semiconductor Corporation
- Sanjay Sancheti
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for generating a bit order data structure of conf...
- Patent number 6,904,436
- Issue date Jun 7, 2005
- Cypress Semiconductor Corporation
- James Daniel Merchant
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Push/pull multiplexer bit
- Patent number 6,815,984
- Issue date Nov 9, 2004
- Cypress Semiconductor Corp.
- Benjamin J. Bowers
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Buffer circuit using low voltage transistors and level shifters
- Patent number 6,801,064
- Issue date Oct 5, 2004
- Cypress Semiconductor, Corp.
- Jeffery Scott Hunt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Input buffer system using low voltage transistors
- Patent number 6,784,717
- Issue date Aug 31, 2004
- Cypress Semiconductor Corporation
- Jeffery Scott Hunt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Layout architecture to optimize path delays
- Patent number 6,609,243
- Issue date Aug 19, 2003
- Cypress Semiconductor Corp.
- Brian P. Evans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Port prioritization scheme
- Patent number 6,532,524
- Issue date Mar 11, 2003
- Cypress Semiconductor Corp.
- Junfei Fan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for identifying configuration circuit addresses i...
- Patent number 6,490,712
- Issue date Dec 3, 2002
- Cypress Semiconductor Corporation
- James Daniel Merchant
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low voltage differential amplifier with high voltage protection
- Patent number 6,483,386
- Issue date Nov 19, 2002
- Cypress Semiconductor Corp.
- Daniel E. Cress
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bitline/dataline short scheme to improve fall-through timing in a m...
- Patent number 6,473,357
- Issue date Oct 29, 2002
- Cypress Semiconductor Corporation
- Junfei Fan
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple power supply output driver
- Patent number 6,388,469
- Issue date May 14, 2002
- Cypress Semiconductor Corp.
- Jeffery Scott Hunt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electrical ID method for output driver
- Patent number 6,353,336
- Issue date Mar 5, 2002
- Cypress Semiconductor Corp.
- David R. Lindley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input buffer/level shifter
- Patent number 6,191,636
- Issue date Feb 20, 2001
- Cypress Semiconductor Corp.
- Daniel Eric Cress
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method, architecture and circuit for writing to and reading from a...
- Patent number 6,122,203
- Issue date Sep 19, 2000
- Cypress Semiconductor Corp.
- Jeffery Scott Hunt
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-timed sense amplifier evaluation scheme
- Patent number 6,087,858
- Issue date Jul 11, 2000
- Cypress Semiconductor Corp.
- Jeffery Scott Hunt
- G11 - INFORMATION STORAGE
Information Patent Grant
Reference voltage generator for reading a ROM cell in an integrated...
- Patent number 6,016,277
- Issue date Jan 18, 2000
- Cypress Semiconductor Corporation
- George M. Ansel
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, architecture and circuit for writing to a memory
- Patent number 5,986,970
- Issue date Nov 16, 1999
- Cypress Semiconductor Corp.
- Jeffery Scott Hunt
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, architecture and circuit for reducing and/or eliminating sm...
- Patent number 5,978,280
- Issue date Nov 2, 1999
- Cypress Semiconductor Corp.
- Satish C. Saripella
- G11 - INFORMATION STORAGE
Information Patent Grant
Wordline synchronized reference voltage generator
- Patent number 5,946,255
- Issue date Aug 31, 1999
- Cypress Semiconductor Corp.
- Satish C. Saripella
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual level wordline clamp for reduced memory cell current
- Patent number 5,936,894
- Issue date Aug 10, 1999
- Cypress Semiconductor Corp.
- Andrew L. Hawkins
- G11 - INFORMATION STORAGE
Information Patent Grant
Read only/random access memory architecture and methods for operati...
- Patent number 5,880,999
- Issue date Mar 9, 1999
- Cypress Semiconductor Corporation
- George M. Ansel
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual level wordline clamp for reduced memory cell current
- Patent number 5,864,507
- Issue date Jan 26, 1999
- Cypress Semiconductor Corporation
- Andrew L. Hawkins
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Multiple Sensor Data Processor Interface and Relay
- Publication number 20200344302
- Publication date Oct 29, 2020
- Camgian Microsystems Corp.
- Gary Butler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multiple Sensor Data Processor Interface and Relay
- Publication number 20190182327
- Publication date Jun 13, 2019
- Camgian Microsystems Corp.
- Gary Butler
- G08 - SIGNALLING
Information Patent Application
Multiple Sensor Data Processor Interface and Relay
- Publication number 20170180481
- Publication date Jun 22, 2017
- Camgian Microsystems Corp.
- Gary Butler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multiple Sensor Data Processor Interface and Relay
- Publication number 20150341179
- Publication date Nov 26, 2015
- Camgian Microsystems Corp.
- Gary Butler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Jeffery Hunt

Person

Patents Grantslast 30 patents

Multiple sensor data processor interface and relay

Multiple sensor data processor interface and relay

Multiple sensor data processor interface and relay

Method and apparatus for dynamically detecting environmental condit...

Input buffer with adaptive trip point

Variable impedance sense architecture and method

Configurable matrix architecture

Data path configurable for multiple clocking arrangements

Multi-port memory cell and access method

Method and system for generating a bit order data structure of conf...

Push/pull multiplexer bit

Buffer circuit using low voltage transistors and level shifters

Input buffer system using low voltage transistors

Layout architecture to optimize path delays

Port prioritization scheme

Method and system for identifying configuration circuit addresses i...

Low voltage differential amplifier with high voltage protection

Bitline/dataline short scheme to improve fall-through timing in a m...

Multiple power supply output driver

Electrical ID method for output driver

Input buffer/level shifter

Method, architecture and circuit for writing to and reading from a...

Self-timed sense amplifier evaluation scheme

Reference voltage generator for reading a ROM cell in an integrated...

Method, architecture and circuit for writing to a memory

Method, architecture and circuit for reducing and/or eliminating sm...

Wordline synchronized reference voltage generator

Dual level wordline clamp for reduced memory cell current

Read only/random access memory architecture and methods for operati...

Dual level wordline clamp for reduced memory cell current

Patents Applicationslast 30 patents

Multiple Sensor Data Processor Interface and Relay

Multiple Sensor Data Processor Interface and Relay

Multiple Sensor Data Processor Interface and Relay

Multiple Sensor Data Processor Interface and Relay