Jiunn-Yann Tsai

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Local interconnection process for preventing dopant cross diffusion...
- Patent number 6,495,408
- Issue date Dec 17, 2002
- LSI Logic Corporation
- Shouli Hsia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Modified multilayered metal line structure for use with tungsten-fi...
- Patent number 6,147,409
- Issue date Nov 14, 2000
- LSI Logic Corporation
- Shouli Steve Hsia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming vias, and trenches for metal lines, in multiple...
- Patent number 6,037,262
- Issue date Mar 14, 2000
- LSI Logic Corporation
- Shouli Steve Hsia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Local interconnection process for preventing dopant cross diffusion...
- Patent number 6,034,401
- Issue date Mar 7, 2000
- LSI Logic Corporation
- Shouli Hsia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Effective silicide blocking
- Patent number 6,020,242
- Issue date Feb 1, 2000
- LSI Logic Corporation
- Jiunn-Yann Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming metal silicide contacts using amorphization of...
- Patent number 6,010,952
- Issue date Jan 4, 2000
- LSI Logic Corporation
- Jiunn-Yann Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming MOS device in integrated circuit structure usin...
- Patent number 5,874,342
- Issue date Feb 23, 1999
- LSI Logic Corporation
- Jiunn-Yann Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming integrated circuit structure with metal silicid...
- Patent number 5,851,890
- Issue date Dec 22, 1998
- LSI Logic Corporation
- Jiunn-Yann Tsai
- H01 - BASIC ELECTRIC ELEMENTS

Jiunn-Yann Tsai

Person

Patents Grantslast 30 patents

Local interconnection process for preventing dopant cross diffusion...

Modified multilayered metal line structure for use with tungsten-fi...

Process for forming vias, and trenches for metal lines, in multiple...

Local interconnection process for preventing dopant cross diffusion...

Effective silicide blocking

Process for forming metal silicide contacts using amorphization of...

Process for forming MOS device in integrated circuit structure usin...

Process for forming integrated circuit structure with metal silicid...