Michael Arthur Snyder

Person

Rochester, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Virtual channel support using write table
- Patent number 11,893,413
- Issue date Feb 6, 2024
- Apple Inc.
- Michael D. Snyder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware verification of dynamically generated code
- Patent number 11,816,484
- Issue date Nov 14, 2023
- Apple Inc.
- Jeffrey E. Gonion
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage, access, and management of random numbers generated by a ce...
- Patent number 9,971,565
- Issue date May 15, 2018
- Oracle International Corporation
- John Pape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Debug instruction for execution by a first thread to generate a deb...
- Patent number 9,395,983
- Issue date Jul 19, 2016
- FREESCALE SEMICONDUCTOR, INC.
- William C. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor for processing a decorated storage notify
- Patent number 9,213,665
- Issue date Dec 15, 2015
- FREESCALE SEMICONDUCTOR, INC.
- William C. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Indicating disabled thread to other threads when contending instruc...
- Patent number 9,047,079
- Issue date Jun 2, 2015
- International Business Machines Corporation
- Becky Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for processing potentially self-inconsistent memo...
- Patent number 9,026,742
- Issue date May 5, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Sanjay R. Deshpande
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tracing support for interconnect fabric
- Patent number 8,990,633
- Issue date Mar 24, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Zheng Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for cache transactions in a data processing sy...
- Patent number 8,972,671
- Issue date Mar 3, 2015
- FREESCALE SEMICONDUCTOR, INC.
- William C. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thread de-emphasis instruction for multithreaded processor
- Patent number 8,832,702
- Issue date Sep 9, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Klas M. Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Permissions checking for data processing instructions
- Patent number 8,627,471
- Issue date Jan 7, 2014
- FREESCALE SEMICONDUCTOR, INC.
- William C. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with hardware thread control logic indicating disable sta...
- Patent number 8,615,644
- Issue date Dec 24, 2013
- International Business Machines Corporation
- Becky Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Polling using reservation mechanism
- Patent number 8,539,485
- Issue date Sep 17, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Michael D. Snyder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for testing a memory embedded in an integrated circuit
- Patent number 8,531,899
- Issue date Sep 10, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Technique for determining if a logical sum of a first operand and a...
- Patent number 8,380,779
- Issue date Feb 19, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Klas M. Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit having an embedded memory and method for testing...
- Patent number 8,379,466
- Issue date Feb 19, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Qualification of conditional debug instructions based on address
- Patent number 8,261,047
- Issue date Sep 4, 2012
- FREESCALE SEMICONDUCTOR, INC.
- William C. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error detection in a content addressable memory (CAM)
- Patent number 8,199,547
- Issue date Jun 12, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Ravindraraj Ramaraju
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage-based memory size scaling in a data processing system
- Patent number 8,156,357
- Issue date Apr 10, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus to trace and correlate data trace and instruct...
- Patent number 8,122,437
- Issue date Feb 21, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Zheng Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Forward progress mechanism for a multithreaded processor
- Patent number 8,117,618
- Issue date Feb 14, 2012
- FREESCALE SEMICONDUCTOR, INC.
- David C. Holloway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance monitoring device and method thereof
- Patent number 8,041,901
- Issue date Oct 18, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Michael D. Snyder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ineligible group member status
- Patent number 8,031,637
- Issue date Oct 4, 2011
- International Business Machines Corporation
- Michael James McDermott
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Completion continue on thread switch based on instruction progress...
- Patent number 7,941,646
- Issue date May 10, 2011
- Freescale Semicondoctor, Inc.
- David C. Holloway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interprocessor message transmission via coherency-based interconnect
- Patent number 7,941,499
- Issue date May 10, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Becky G. Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory operation testing
- Patent number 7,852,692
- Issue date Dec 14, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Interrupt controller for accelerated interrupt handling in a data p...
- Patent number 7,849,247
- Issue date Dec 7, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Bryan D. Marietta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache locking device and methods thereof
- Patent number 7,827,360
- Issue date Nov 2, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Syed R. Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple address and arithmetic bit-mode data processing device and...
- Patent number 7,805,581
- Issue date Sep 28, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Michael D. Snyder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for data transfers across different address spaces
- Patent number 7,702,881
- Issue date Apr 20, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Becky G. Bruce
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Hardware Verification of Dynamically Generated Code
- Publication number 20240045678
- Publication date Feb 8, 2024
- Apple Inc.
- Jeffrey E. Gonion
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hardware Verification of Dynamically Generated Code
- Publication number 20220137968
- Publication date May 5, 2022
- Apple Inc.
- Jeffrey E. Gonion
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Virtual Channel Support Using Write Table
- Publication number 20220083369
- Publication date Mar 17, 2022
- Apple Inc.
- Michael D. Snyder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RANDOM NUMBER STORAGE, ACCESS, AND MANAGEMENT
- Publication number 20160328209
- Publication date Nov 10, 2016
- ORACLE INTERNATIONAL CORPORATION
- John Pape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE THREAD DISABLE WITH STATUS INDICATING SAFE SHARED RESOURCE...
- Publication number 20120185678
- Publication date Jul 19, 2012
- International Business Machines Corporation
- Becky Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE THREAD DISABLE WITH STATUS INDICATING SAFE SHARED RESOURCE...
- Publication number 20110208949
- Publication date Aug 25, 2011
- International Business Machines Corporation
- Becky Bruce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTION IN A CONTENT ADDRESSABLE MEMORY (CAM)
- Publication number 20110194325
- Publication date Aug 11, 2011
- Ravindraraj Ramaraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR DETERMINING IF A LOGICAL SUM OF A FIRST OPERAND AND A...
- Publication number 20100306302
- Publication date Dec 2, 2010
- Ravindraraj Ramaraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRACING SUPPORT FOR INTERCONNECT FABRIC
- Publication number 20100268990
- Publication date Oct 21, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Zheng Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT HAVING AN EMBEDDED MEMORY AND METHOD FOR TESTING...
- Publication number 20100246297
- Publication date Sep 30, 2010
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE-BASED MEMORY SIZE SCALING IN A DATA PROCESSING SYSTEM
- Publication number 20100191990
- Publication date Jul 29, 2010
- Shayan Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSOR FOR PROCESSING A DECORATED STORAGE NOTIFY
- Publication number 20100106872
- Publication date Apr 29, 2010
- William C. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERMISSIONS CHECKING FOR DATA PROCESSING INSTRUCTIONS
- Publication number 20100107243
- Publication date Apr 29, 2010
- William C. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERRUPT ACKNOWLEDGMENT IN A DATA PROCESSING SYSTEM
- Publication number 20100095039
- Publication date Apr 15, 2010
- Bryan D. Marietta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEBUG INSTRUCTION FOR USE IN A MULTI-THREADED DATA PROCESSING SYSTEM
- Publication number 20100049955
- Publication date Feb 25, 2010
- William C. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEBUG INSTRUCTION FOR USE IN A MULTI-THREADED DATA PROCESSING SYSTEM
- Publication number 20100049956
- Publication date Feb 25, 2010
- William C. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY OPERATION TESTING
- Publication number 20090323446
- Publication date Dec 31, 2009
- SHAYAN ZHANG
- G11 - INFORMATION STORAGE
Information Patent Application
Method and Apparatus to Trace and Correlate Data Trace and Instruct...
- Publication number 20090249302
- Publication date Oct 1, 2009
- Zheng Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BRANCH TARGET BUFFER ADDRESSING IN A DATA PROCESSOR
- Publication number 20090249048
- Publication date Oct 1, 2009
- Sergio Schuler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QUALIFICATION OF CONDITIONAL DEBUG INSTRUCTIONS BASED ON ADDRESS
- Publication number 20090235059
- Publication date Sep 17, 2009
- FREESCALE SEMICONDUCTOR, INC.
- William C. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INELIGIBLE GROUP MEMBER STATUS
- Publication number 20090182877
- Publication date Jul 16, 2009
- International Business Machines Corp.
- Michael James McDermott
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
COMPLETION CONTINUE ON THREAD SWITCH MECHANISM FOR A MICROPROCESSOR
- Publication number 20090172361
- Publication date Jul 2, 2009
- FREESCALE SEMICONDUCTOR, INC.
- David C. Holloway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR PROCESSING POTENTIALLY SELF-INCONSISTENT MEMO...
- Publication number 20090164737
- Publication date Jun 25, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Sanjay R. Deshpande
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POLLING USING RESERVATION MECHANISM
- Publication number 20090132796
- Publication date May 21, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Michael D. Snyder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PSEUDO LEAST RECENTLY USED (PLRU) CACHE REPLACEMENT
- Publication number 20090113137
- Publication date Apr 30, 2009
- Brian C. Grayson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT MEMORY HAVING DYNAMICALLY ADJUSTABLE READ MARGIN...
- Publication number 20090103379
- Publication date Apr 23, 2009
- Shayan Zhang
- G11 - INFORMATION STORAGE
Information Patent Application
FORWARD PROGRESS MECHANISM FOR A MULTITHREADED PROCESSOR
- Publication number 20090100432
- Publication date Apr 16, 2009
- FREESCALE SEMICONDUCTOR, INC.
- David C. Holloway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEBUG INSTRUCTION FOR USE IN A DATA PROCESSING SYSTEM
- Publication number 20090100254
- Publication date Apr 16, 2009
- William C. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE LOCKING DEVICE AND METHODS THEREOF
- Publication number 20090037666
- Publication date Feb 5, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Syed R. Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPECIFICATION OF COHERENCE DOMAIN DURING ADDRESS TRANSLATION
- Publication number 20090019232
- Publication date Jan 15, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Sanjay R. Deshpande
- G06 - COMPUTING CALCULATING COUNTING

Michael Arthur Snyder

Person

Patents Grantslast 30 patents

Virtual channel support using write table

Hardware verification of dynamically generated code

Storage, access, and management of random numbers generated by a ce...

Debug instruction for execution by a first thread to generate a deb...

Data processor for processing a decorated storage notify

Indicating disabled thread to other threads when contending instruc...

System and method for processing potentially self-inconsistent memo...

Tracing support for interconnect fabric

Method and apparatus for cache transactions in a data processing sy...

Thread de-emphasis instruction for multithreaded processor

Permissions checking for data processing instructions

Processor with hardware thread control logic indicating disable sta...

Polling using reservation mechanism

Methods for testing a memory embedded in an integrated circuit

Technique for determining if a logical sum of a first operand and a...

Integrated circuit having an embedded memory and method for testing...

Qualification of conditional debug instructions based on address

Error detection in a content addressable memory (CAM)

Voltage-based memory size scaling in a data processing system

Method and apparatus to trace and correlate data trace and instruct...

Forward progress mechanism for a multithreaded processor

Performance monitoring device and method thereof

Ineligible group member status

Completion continue on thread switch based on instruction progress...

Interprocessor message transmission via coherency-based interconnect

Memory operation testing

Interrupt controller for accelerated interrupt handling in a data p...

Cache locking device and methods thereof

Multiple address and arithmetic bit-mode data processing device and...

Method and system for data transfers across different address spaces

Patents Applicationslast 30 patents

Hardware Verification of Dynamically Generated Code

Hardware Verification of Dynamically Generated Code

Virtual Channel Support Using Write Table

RANDOM NUMBER STORAGE, ACCESS, AND MANAGEMENT

HARDWARE THREAD DISABLE WITH STATUS INDICATING SAFE SHARED RESOURCE...

HARDWARE THREAD DISABLE WITH STATUS INDICATING SAFE SHARED RESOURCE...

ERROR DETECTION IN A CONTENT ADDRESSABLE MEMORY (CAM)

TECHNIQUE FOR DETERMINING IF A LOGICAL SUM OF A FIRST OPERAND AND A...

TRACING SUPPORT FOR INTERCONNECT FABRIC

INTEGRATED CIRCUIT HAVING AN EMBEDDED MEMORY AND METHOD FOR TESTING...

VOLTAGE-BASED MEMORY SIZE SCALING IN A DATA PROCESSING SYSTEM

DATA PROCESSOR FOR PROCESSING A DECORATED STORAGE NOTIFY

PERMISSIONS CHECKING FOR DATA PROCESSING INSTRUCTIONS

INTERRUPT ACKNOWLEDGMENT IN A DATA PROCESSING SYSTEM

DEBUG INSTRUCTION FOR USE IN A MULTI-THREADED DATA PROCESSING SYSTEM

DEBUG INSTRUCTION FOR USE IN A MULTI-THREADED DATA PROCESSING SYSTEM

MEMORY OPERATION TESTING

Method and Apparatus to Trace and Correlate Data Trace and Instruct...

BRANCH TARGET BUFFER ADDRESSING IN A DATA PROCESSOR

QUALIFICATION OF CONDITIONAL DEBUG INSTRUCTIONS BASED ON ADDRESS

INELIGIBLE GROUP MEMBER STATUS

COMPLETION CONTINUE ON THREAD SWITCH MECHANISM FOR A MICROPROCESSOR

SYSTEM AND METHOD FOR PROCESSING POTENTIALLY SELF-INCONSISTENT MEMO...

POLLING USING RESERVATION MECHANISM

PSEUDO LEAST RECENTLY USED (PLRU) CACHE REPLACEMENT

INTEGRATED CIRCUIT MEMORY HAVING DYNAMICALLY ADJUSTABLE READ MARGIN...

FORWARD PROGRESS MECHANISM FOR A MULTITHREADED PROCESSOR

DEBUG INSTRUCTION FOR USE IN A DATA PROCESSING SYSTEM

CACHE LOCKING DEVICE AND METHODS THEREOF

SPECIFICATION OF COHERENCE DOMAIN DURING ADDRESS TRANSLATION