Ming-Yi Lee

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method characterizing materials for a trench isolation structure ha...
- Patent number 8,021,955
- Issue date Sep 20, 2011
- LSI Logic Corporation
- Venkatesh P. Gopinath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow trench isolation structure with low trench parasitic capaci...
- Patent number 7,619,294
- Issue date Nov 17, 2009
- LSI Corporation
- Venkatesh P. Gopinath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a shallow trench isolation structure with l...
- Patent number 7,001,823
- Issue date Feb 21, 2006
- LSI Logic Corporation
- Venkatesh P. Gopinath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hard mask removal
- Patent number 6,989,331
- Issue date Jan 24, 2006
- LSI Logic Corporation
- Venkatesh Gopinath
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Composite spacer scheme with low overlapped parasitic capacitance
- Patent number 6,737,342
- Issue date May 18, 2004
- LSI Logic Corporation
- Ming-Yi Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of metal contacts for deep-submicron technologies
- Patent number 6,727,165
- Issue date Apr 27, 2004
- LSI Logic Corporation
- Helmut Puchner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Composite spacer scheme with low overlapped parasitic capacitance
- Patent number 6,613,637
- Issue date Sep 2, 2003
- LSI Logic Corporation
- Ming-Yi Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Deep submicron silicide blocking
- Patent number 6,586,332
- Issue date Jul 1, 2003
- LSI Logic Corporation
- Ming-Yi Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for CMP removal of excess trench or via filler metal which...
- Patent number 6,391,768
- Issue date May 21, 2002
- LSI Logic Corporation
- Dawn M. Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Planarization system
- Patent number 6,319,836
- Issue date Nov 20, 2001
- LSI Logic Corporation
- Samuel V. Dunton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and process for deposition of thin film on semiconductor...
- Patent number 6,127,286
- Issue date Oct 3, 2000
- LSI Logic Corporation
- Kaijun Leo Zhang
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Process for forming integrated circuit structure with metal silicid...
- Patent number 5,851,890
- Issue date Dec 22, 1998
- LSI Logic Corporation
- Jiunn-Yann Tsai
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ADVANCED QUANTUM POWER COLLECTOR
- Publication number 20210408966
- Publication date Dec 30, 2021
- Quantum Grid Labs Limited
- Randolph Allen ST JAMES
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Hard mask removal
- Publication number 20050006347
- Publication date Jan 13, 2005
- Venkatesh Gopinath
- H01 - BASIC ELECTRIC ELEMENTS

Ming-Yi Lee

Person

Patents Grantslast 30 patents

Method characterizing materials for a trench isolation structure ha...

Shallow trench isolation structure with low trench parasitic capaci...

Method of manufacturing a shallow trench isolation structure with l...

Hard mask removal

Composite spacer scheme with low overlapped parasitic capacitance

Fabrication of metal contacts for deep-submicron technologies

Composite spacer scheme with low overlapped parasitic capacitance

Deep submicron silicide blocking

Process for CMP removal of excess trench or via filler metal which...

Planarization system

Apparatus and process for deposition of thin film on semiconductor...

Process for forming integrated circuit structure with metal silicid...

Patents Applicationslast 30 patents

ADVANCED QUANTUM POWER COLLECTOR

Hard mask removal