Raymond Cotner

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Wilsonville, OR, US

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Patents Grantslast 30 patents

Information Patent Grant
Non-planar semiconductor device having omega-fin with doped sub-fin...
- Patent number 11,276,760
- Issue date Mar 15, 2022
- Intel Corporation
- Gopinath Bhimarasetti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-planar semiconductor device having omega-fin with doped sub-fin...
- Patent number 10,355,093
- Issue date Jul 16, 2019
- Intel Corporation
- Gopinath Bhimarasetti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor having a deposited dual-layer spacer structure
- Patent number 6,720,631
- Issue date Apr 13, 2004
- Intel Corporation
- Lawrence N. Brigham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High tensile nitride layer
- Patent number 6,046,494
- Issue date Apr 4, 2000
- Intel Corporation
- Lawrence N. Brigham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a transistor having a deposited dual-layer spacer...
- Patent number 5,714,413
- Issue date Feb 3, 1998
- Intel Corporation
- Lawrence N. Brigham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High tensile nitride layer
- Patent number 5,633,202
- Issue date May 27, 1997
- Intel Corporation
- Lawrence N. Brigham
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
NON-PLANAR SEMICONDUCTOR DEVICE HAVING OMEGA-FIN WITH DOPED SUB-FIN...
- Publication number 20220130962
- Publication date Apr 28, 2022
- Intel Corporation
- GOPINATH BHIMARASETTI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-PLANAR SEMICONDUCTOR DEVICE HAVING OMEGA-FIN WITH DOPED SUB-FIN...
- Publication number 20190296114
- Publication date Sep 26, 2019
- Intel Corporation
- GOPINATH BHIMARASETTI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHODS TO CREATE MICROELECTRONIC DEVICE ISOLATION BY...
- Publication number 20170162693
- Publication date Jun 8, 2017
- Intel Corporation
- Gopinath Bhimarasetti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-PLANAR SEMICONDUCTOR DEVICE HAVING OMEGA-FIN WITH DOPED SUB-FIN...
- Publication number 20170069725
- Publication date Mar 9, 2017
- Intel Corporation
- GOPINATH BHIMARASETTI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR HAVING A DEPOSITED DUAL-LAYER SPACER STRUCTURE
- Publication number 20010042894
- Publication date Nov 22, 2001
- LAWRENCE N. BRIGHAM
- H01 - BASIC ELECTRIC ELEMENTS