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Suwei Chen
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Mississippi State, MS, US
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last 30 patents
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Patent Grant
System and method for reducing skew in complementary signals that c...
Patent number
7,135,899
Issue date
Nov 14, 2006
Cypress Semiconductor Corp.
Sanjay Sancheti
G06 - COMPUTING CALCULATING COUNTING
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Patent Grant
Data path configurable for multiple clocking arrangements
Patent number
7,132,854
Issue date
Nov 7, 2006
Cypress Semiconductor Corporation
Suwei Chen
G11 - INFORMATION STORAGE
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Patent Grant
Delay circuit that scales with clock cycle time
Patent number
7,019,576
Issue date
Mar 28, 2006
Cypress Semiconductor Corporation
Sanjay K. Sancheti
H03 - BASIC ELECTRONIC CIRCUITRY