Access, addressing or allocation within memory systems or architectures

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Y02B60/1225

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y02Climate change prevention Y02BINDEXING SCHEME RELATING TO CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS Y02B60/00Information and communication technologies [ICT] aiming at the reduction of own energy use

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Y02B60/1225Access, addressing or allocation within memory systems or architectures

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Patents Grantslast 30 patents

Information Patent Grant
Cache operation in a multi-threaded processor
- Patent number 10,318,172
- Issue date Jun 11, 2019
- MIPS Tech, LLC
- Philip Day
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel garbage collection implemented in hardware
- Patent number 10,216,626
- Issue date Feb 26, 2019
- International Business Machines Corporation
- David F. Bacon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Burst length defined page size
- Patent number 10,141,039
- Issue date Nov 27, 2018
- EVERSPIN TECHNOLOGIES, INC.
- Thomas Andre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid programmable many-core device with on-chip interconnect
- Patent number 10,127,190
- Issue date Nov 13, 2018
- Altera Corporation
- Michael D. Hutton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for referencing dense and sparse information i...
- Patent number 10,101,937
- Issue date Oct 16, 2018
- Western Digital Technologies, Inc.
- Radoslav Danilak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory system, memory card having the same, and operat...
- Patent number 10,095,303
- Issue date Oct 9, 2018
- Samsung Electronics Co., Ltd.
- Seok-Won Ahn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for layered storage of enterprise data
- Patent number 10,089,009
- Issue date Oct 2, 2018
- INURON
- Kurt Glazemakers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for managing graphics processing resources in a tile-bas...
- Patent number 10,083,036
- Issue date Sep 25, 2018
- NVIDIA Corporation
- Ziyad S. Hakura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Polarity based data transfer function for volatile memory
- Patent number 10,055,346
- Issue date Aug 21, 2018
- Intel Corporation
- Nadav Bonen
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-tiered storage systems and methods for adaptive content strea...
- Patent number 10,037,285
- Issue date Jul 31, 2018
- Georgia Tech Research Corporation
- Umakishore Ramachandran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device, system, and method of memory allocation
- Patent number 10,014,046
- Issue date Jul 3, 2018
- Intel Corporation
- Jim Kardach
- G11 - INFORMATION STORAGE
Information Patent Grant
Reconfigurable fetch pipeline
- Patent number 10,007,613
- Issue date Jun 26, 2018
- QUALCOMM Incorporated
- Suresh Kumar Venkumahanti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tuning global digests caching in a data deduplication system
- Patent number 10,007,610
- Issue date Jun 26, 2018
- International Business Machines Corporation
- Shay H. Akirav
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple stage memory management
- Patent number 9,996,474
- Issue date Jun 12, 2018
- ARM Limited
- Vahan Ter-Grigoryan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for repurposing dead cache blocks
- Patent number 9,990,289
- Issue date Jun 5, 2018
- Advanced Micro Devices, Inc.
- Gabriel H. Loh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read writeable randomly accessible non-volatile memory modules
- Patent number 9,984,012
- Issue date May 29, 2018
- Virident Systems, LLC
- Vijay Karamcheti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic cache sharing based on power state
- Patent number 9,983,792
- Issue date May 29, 2018
- Intel Corporation
- Ryan D. Wells
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache array with reduced power consumption
- Patent number 9,977,485
- Issue date May 22, 2018
- International Business Machines Corporation
- Paul A. Bunce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fusible and reconfigurable cache architecture
- Patent number 9,977,741
- Issue date May 22, 2018
- Huawei Technologies Co., Ltd.
- Mihai Pricopi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic device and a method for managing memory space thereof
- Patent number 9,977,598
- Issue date May 22, 2018
- Mediatek Inc.
- Chung-Jung Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache array with reduced power consumption
- Patent number 9,971,394
- Issue date May 15, 2018
- International Business Machines Corporation
- Paul A. Bunce
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing coherent memory between an accelerated processing device a...
- Patent number 9,965,392
- Issue date May 8, 2018
- Advanced Micro Devices, Inc.
- Anthony Asaro
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer processor employing bypass network using result tags for r...
- Patent number 9,965,274
- Issue date May 8, 2018
- MILL COMPUTING, INC.
- Arthur David Kahlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for flushing dirty cache lines based on cache...
- Patent number 9,965,023
- Issue date May 8, 2018
- Intel Corporation
- David Keppel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory and processor hierarchy to improve power efficiency
- Patent number 9,959,202
- Issue date May 1, 2018
- International Business Machines Corporation
- Jan Van Lunteren
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for flush power aware low power mode control in a...
- Patent number 9,959,075
- Issue date May 1, 2018
- QUALCOMM Incorporated
- Krishna Vsssr Vanka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system including non-volatile memory of which access speed i...
- Patent number 9,959,919
- Issue date May 1, 2018
- Kabushiki Kaisha Toshiba
- Daisuke Saida
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system
- Patent number 9,959,212
- Issue date May 1, 2018
- Kabushiki Kaisha Toshiba
- Susumu Takeda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for providing instant responses to sleep state tr...
- Patent number 9,958,926
- Issue date May 1, 2018
- Intel Corporation
- Leena K. Puthiyedath
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory control unit for controlling semiconductor memory device and...
- Patent number 9,959,211
- Issue date May 1, 2018
- SK Hynix Inc.
- Jae Hyeong Jeong
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
VACUUM BLENDER
- Publication number 20180225205
- Publication date Aug 9, 2018
- R. Joseph Trojan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED CLOUD-BASED DYNAMIC NAME SERVER SURROGATION SYSTEMS AND...
- Publication number 20180113807
- Publication date Apr 26, 2018
- ZSCALER, INC.
- Patrick Foxhoven
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE CLOCK MANAGEMENT
- Publication number 20180107623
- Publication date Apr 19, 2018
- RAMBUS INC.
- Yuanlong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID PROGRAMMABLE MANY-CORE DEVICE WITH ON-CHIP INTERCONNECT
- Publication number 20180089139
- Publication date Mar 29, 2018
- Altera Corporation
- Michael D. Hutton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Translation Lookaside Buffer
- Publication number 20180089102
- Publication date Mar 29, 2018
- MIPS Tech, LLC
- Ranjit J. Rozario
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISK MANAGEMENT IN DISTRIBUTED STORAGE SYSTEM INCLUDING GROUPING DI...
- Publication number 20180081578
- Publication date Mar 22, 2018
- International Business Machines Corporation
- Lei Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TUNING GLOBAL DIGESTS CACHING IN A DATA DEDUPLICATION SYSTEM
- Publication number 20180081812
- Publication date Mar 22, 2018
- International Business Machines Corporation
- Shay H. AKIRAV
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVISIONING OF EXTERNAL MEMORY
- Publication number 20180081559
- Publication date Mar 22, 2018
- KOVE IP, LLC
- Timothy A. Stabrawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPARISON OPERATIONS IN MEMORY
- Publication number 20180082756
- Publication date Mar 22, 2018
- Micron Technology, Inc.
- Sanjay Tiwari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POLARITY BASED DATA TRANSFER FUNCTION FOR VOLATILE MEMORY
- Publication number 20180067852
- Publication date Mar 8, 2018
- Intel Corporation
- Nadav Bonen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISABLING CACHE PORTIONS DURING LOW VOLTAGE OPERATIONS
- Publication number 20180060239
- Publication date Mar 1, 2018
- Intel Corporation
- CHRISTOPHER WILKERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVELY ENABLING AND DISABLING SNOOPING BUS COMMANDS
- Publication number 20180052771
- Publication date Feb 22, 2018
- International Business Machines Corporation
- Guy L. Guthrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF PERFORMING AUTHENTICATION WITH A MEMORY CIRCUIT USING DYN...
- Publication number 20180052782
- Publication date Feb 22, 2018
- Bertrand F. Cambou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CREATE PAGE LOCALITY IN CACHE CONTROLLER CACHE ALLOCATION
- Publication number 20180046579
- Publication date Feb 15, 2018
- Intel Corporation
- Daniel Greenspan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR A CACHE IN A MULTI-CORE PROCESSOR
- Publication number 20180039576
- Publication date Feb 8, 2018
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR LOW POWER LOW LATENCY HIGH CAPACITY STORAG...
- Publication number 20180018259
- Publication date Jan 18, 2018
- Western Digital Technologies, Inc.
- Frank R. CHU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER SAVING METHOD AND APPARATUS FOR FIRST IN FIRST OUT (FIFO) MEM...
- Publication number 20180011800
- Publication date Jan 11, 2018
- Intel Corporation
- Sutirtha DEB
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIZING A WRITE CACHE BUFFER BASED ON EMERGENCY DATA SAVE PARAMETERS
- Publication number 20170364443
- Publication date Dec 21, 2017
- International Business Machines Corporation
- Kirk D. Lamb
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE ARCHITECTURE FOR COMPARING DATA
- Publication number 20170364444
- Publication date Dec 21, 2017
- Micron Technology, Inc.
- Robert M. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES HAVING DISTRIBUTED CONTROLLER SYSTEMS
- Publication number 20170364268
- Publication date Dec 21, 2017
- Micron Technology, Inc.
- Luca De Santis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM INCLUDING HIERARCHICAL MEMORY MODULES HAVING DIFFERENT TYPES...
- Publication number 20170365354
- Publication date Dec 21, 2017
- RAMBUS INC.
- Craig Hampel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhancing Cache Performance by Utilizing Scrubbed State Indicators...
- Publication number 20170357599
- Publication date Dec 14, 2017
- Intel Corporation
- Daniel Greenspan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PARTITIONING OF MEMORIES
- Publication number 20170351458
- Publication date Dec 7, 2017
- Micron Technology, Inc.
- Danilo Caraccio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR USING FIELDS IN N-SPACE TRANSLATION OF STO...
- Publication number 20170344303
- Publication date Nov 30, 2017
- Skyera, LLC
- Radoslav DANILAK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction Storage
- Publication number 20170323420
- Publication date Nov 9, 2017
- Apple Inc.
- Andrew M. Havlir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULATED PULSED ULTRASONIC POWER DELIVERY SYSTEM AND METHOD
- Publication number 20170312129
- Publication date Nov 2, 2017
- Abbott Medical Optics Inc.
- Kenneth E. Kadziauskas
- B06 - GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
Information Patent Application
CACHE ORGANIZATION AND METHOD
- Publication number 20170308480
- Publication date Oct 26, 2017
- NXP USA, Inc.
- Peter J. Wilson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flash memory controller
- Publication number 20170308318
- Publication date Oct 26, 2017
- SILICON MOTION INC
- Tsung-Chieh Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GARBAGE COLLECTION AND DEFRAGMENTATION FOR SOLID STATE DRIVES (SSD)...
- Publication number 20170277630
- Publication date Sep 28, 2017
- Quantum Corporation
- Roderick B. Wideman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ CACHE MEMORY
- Publication number 20170277449
- Publication date Sep 28, 2017
- Micron Technology, Inc.
- Eugene Feng
- G06 - COMPUTING CALCULATING COUNTING

Access, addressing or allocation within memory systems or architectures

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Cache operation in a multi-threaded processor

Parallel garbage collection implemented in hardware

Burst length defined page size

Hybrid programmable many-core device with on-chip interconnect

Apparatus and method for referencing dense and sparse information i...

Non-volatile memory system, memory card having the same, and operat...

Method for layered storage of enterprise data

Techniques for managing graphics processing resources in a tile-bas...

Polarity based data transfer function for volatile memory

Multi-tiered storage systems and methods for adaptive content strea...

Device, system, and method of memory allocation

Reconfigurable fetch pipeline

Tuning global digests caching in a data deduplication system

Multiple stage memory management

System and method for repurposing dead cache blocks

Read writeable randomly accessible non-volatile memory modules

Dynamic cache sharing based on power state

Cache array with reduced power consumption

Fusible and reconfigurable cache architecture

Electronic device and a method for managing memory space thereof

Cache array with reduced power consumption

Managing coherent memory between an accelerated processing device a...

Computer processor employing bypass network using result tags for r...

Apparatus and method for flushing dirty cache lines based on cache...

Memory and processor hierarchy to improve power efficiency

System and method for flush power aware low power mode control in a...

Memory system including non-volatile memory of which access speed i...

Memory system

Method and system for providing instant responses to sleep state tr...

Memory control unit for controlling semiconductor memory device and...

Patents Applicationslast 30 patents

VACUUM BLENDER

DISTRIBUTED CLOUD-BASED DYNAMIC NAME SERVER SURROGATION SYSTEMS AND...

INTERFACE CLOCK MANAGEMENT

HYBRID PROGRAMMABLE MANY-CORE DEVICE WITH ON-CHIP INTERCONNECT

Translation Lookaside Buffer

DISK MANAGEMENT IN DISTRIBUTED STORAGE SYSTEM INCLUDING GROUPING DI...

TUNING GLOBAL DIGESTS CACHING IN A DATA DEDUPLICATION SYSTEM

PROVISIONING OF EXTERNAL MEMORY

COMPARISON OPERATIONS IN MEMORY

POLARITY BASED DATA TRANSFER FUNCTION FOR VOLATILE MEMORY

DISABLING CACHE PORTIONS DURING LOW VOLTAGE OPERATIONS

ADAPTIVELY ENABLING AND DISABLING SNOOPING BUS COMMANDS

METHOD OF PERFORMING AUTHENTICATION WITH A MEMORY CIRCUIT USING DYN...

CREATE PAGE LOCALITY IN CACHE CONTROLLER CACHE ALLOCATION

SYSTEM AND METHOD FOR A CACHE IN A MULTI-CORE PROCESSOR

APPARATUS AND METHOD FOR LOW POWER LOW LATENCY HIGH CAPACITY STORAG...

POWER SAVING METHOD AND APPARATUS FOR FIRST IN FIRST OUT (FIFO) MEM...

SIZING A WRITE CACHE BUFFER BASED ON EMERGENCY DATA SAVE PARAMETERS

CACHE ARCHITECTURE FOR COMPARING DATA

MEMORY DEVICES HAVING DISTRIBUTED CONTROLLER SYSTEMS

SYSTEM INCLUDING HIERARCHICAL MEMORY MODULES HAVING DIFFERENT TYPES...

Enhancing Cache Performance by Utilizing Scrubbed State Indicators...

MULTI-PARTITIONING OF MEMORIES

APPARATUS AND METHOD FOR USING FIELDS IN N-SPACE TRANSLATION OF STO...

Instruction Storage

MODULATED PULSED ULTRASONIC POWER DELIVERY SYSTEM AND METHOD

CACHE ORGANIZATION AND METHOD

Flash memory controller

GARBAGE COLLECTION AND DEFRAGMENTATION FOR SOLID STATE DRIVES (SSD)...

READ CACHE MEMORY