Adapt frequency

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G06F2205/061

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2205/00Indexing scheme relating to group G06F5/00 Methods or arrangements for data conversion without changing the order or content of the data handled

Current Industry

G06F2205/061Adapt frequency

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Patents Grantslast 30 patents

Information Patent Grant
Apparatus and methods employing asynchronous FIFO buffer with read...
- Patent number 12,176,064
- Issue date Dec 24, 2024
- Advanced Micro Devices, Inc.
- Richard Martin Born
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for synchronizing data transfers across clock...
- Patent number 11,967,960
- Issue date Apr 23, 2024
- Advanced Micro Devices, Inc.
- David M. Dahle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transfer between clock domains
- Patent number 10,055,193
- Issue date Aug 21, 2018
- Nordic Semiconductor ASA
- Per Carsten Skoglund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pausible bisynchronous FIFO
- Patent number 9,672,008
- Issue date Jun 6, 2017
- NVIDIA Corporation
- Benjamin Andrew Keller
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock transfer circuit, video processing system, and semiconductor...
- Patent number 9,491,332
- Issue date Nov 8, 2016
- PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
- Yuuki Nishio
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method of sampling and storing data and implementation thereof
- Patent number 9,377,993
- Issue date Jun 28, 2016
- Dresser, Inc.
- Larry Gene Schoonover
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deterministic FIFO buffer
- Patent number 9,250,859
- Issue date Feb 2, 2016
- Altera Corporation
- David W. Mendel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor management using a buffer
- Patent number 8,843,686
- Issue date Sep 23, 2014
- Marvell International Ltd.
- Ting Li Chan
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and apparatus to prevent FIFO overflow and underflow by adju...
- Patent number 8,782,355
- Issue date Jul 15, 2014
- Marvell International Ltd.
- Kapil Jain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous first in first out interface, method thereof and integ...
- Patent number 8,346,201
- Issue date Jan 1, 2013
- Richwave Technology Corp.
- Tse-Peng Chen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Processor management using a buffer
- Patent number 8,327,056
- Issue date Dec 4, 2012
- Marvell International Ltd.
- Ting Li Chan
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Serial interface device and image forming apparatus
- Patent number 8,237,980
- Issue date Aug 7, 2012
- Rohm Co., Ltd.
- Tatsuhiko Murata
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit for correcting an output clock frequency in a receiving device
- Patent number 8,135,105
- Issue date Mar 13, 2012
- Integraded Device Technologies, Inc.
- Zhibing Liu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Processor management using a buffer
- Patent number 8,095,816
- Issue date Jan 10, 2012
- Marvell International Ltd.
- Ting Li Chan
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Systems and methods for limiting the rates of data to/from a buffer
- Patent number 8,014,281
- Issue date Sep 6, 2011
- Juniper Networks, Inc.
- Raymond Marcelino Manese Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic adjusting send rate of buffered data
- Patent number 8,001,297
- Issue date Aug 16, 2011
- Microsoft Corporation
- Michael D. Volodarsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital clock smoothing
- Patent number 7,995,622
- Issue date Aug 9, 2011
- Wideband Semiconductor, Inc.
- Richard John Fagerlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fibre channel elastic FIFO delay controller and loop delay method h...
- Patent number 7,921,242
- Issue date Apr 5, 2011
- Marvell International Ltd.
- Hung M. Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and circuit for differential clock pulse compensation betwee...
- Patent number 7,876,720
- Issue date Jan 25, 2011
- Infineon Technologies AG
- Frank Huertgen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for reading out sensor data
- Patent number 7,827,377
- Issue date Nov 2, 2010
- Robert Bosch GmbH
- Christian Ohl
- B60 - VEHICLES IN GENERAL
Information Patent Grant
Fibre channel elastic FIFO delay controller and loop delay method h...
- Patent number 7,698,481
- Issue date Apr 13, 2010
- Marvell International Ltd.
- Hung M. Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for limiting the rates of data to/from a buffer
- Patent number 7,630,309
- Issue date Dec 8, 2009
- Juniper Networks, Inc.
- Raymond Marcelino Manese Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital clock smoothing apparatus and method
- Patent number 7,613,211
- Issue date Nov 3, 2009
- Wideband Semiconductors, Inc.
- Richard John Fagerlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transmission controller and sampling frequency converter
- Patent number 7,570,727
- Issue date Aug 4, 2009
- Yamaha Corporation
- Takayoshi Mochizuki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronizing method
- Patent number 7,394,884
- Issue date Jul 1, 2008
- Broadcom Corporation
- Tarek Kaylani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
PLL/DLL dual loop data synchronization utilizing a granular FIFO fi...
- Patent number 7,366,270
- Issue date Apr 29, 2008
- Primarion, Inc.
- Benjamin Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for the clocked output of asynchronously received...
- Patent number 7,305,059
- Issue date Dec 4, 2007
- Infineon Technologies AG
- Stefan Eder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
First-in-first-out (FIFO) memory for buffering packet fragments thr...
- Patent number 7,272,675
- Issue date Sep 18, 2007
- Cypress Semiconductor Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Jitter and wander reduction apparatus
- Patent number 7,212,599
- Issue date May 1, 2007
- Applied Micro Circuits Corporation
- Ravi Subrahmanyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for limiting the rates of data to/from a buffer
- Patent number 7,106,696
- Issue date Sep 12, 2006
- Juniper Networks, Inc.
- Raymond Marcelino Manese Lim
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS FOR SYNCHRONIZING DATA TRANSFERS ACROSS CLOCK...
- Publication number 20230035110
- Publication date Feb 2, 2023
- ADVANCED MICRO DEVICES, INC.
- David M. Dahle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FIFO Clock and Power Management
- Publication number 20140310549
- Publication date Oct 16, 2014
- Apple Inc.
- Gilbert H. Herbeck
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK RATE CONTROLLER AND METHOD THEREOF AND ELECTRONIC DEVICE THEREOF
- Publication number 20130170369
- Publication date Jul 4, 2013
- C-Media Electronics Inc.
- JUNG-FU LIAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS FOR SYNCHRONIZING A DATA HANDOVER BETWEEN A FIRST CLOCK D...
- Publication number 20120303994
- Publication date Nov 29, 2012
- INFINEON TECHNOLOGIES AG
- Thomas Bauernfeind
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYNCHRONOUS FIRST IN FIRST OUT INTERFACE, METHOD THEREOF AND INTEG...
- Publication number 20110070854
- Publication date Mar 24, 2011
- RICHWAVE TECHNOLOGY CORP.
- Tse-Peng CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of Controlling Spread-Spectrum Clock Generation
- Publication number 20100229019
- Publication date Sep 9, 2010
- Chung-Ming Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit for correcting an output clock frequency in a receiving device
- Publication number 20090310729
- Publication date Dec 17, 2009
- Integrated Device Technology, Inc.
- Zhibing Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUDIO PROCESSOR HAVING DYNAMIC AUTOMATIC CONTROL FUNCTION OF OPERAT...
- Publication number 20090024864
- Publication date Jan 22, 2009
- NEC Electronics Corporation
- Hiroki SUGIMOTO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Reading Out Sensor Data
- Publication number 20080034170
- Publication date Feb 7, 2008
- Christian Ohl
- B60 - VEHICLES IN GENERAL
Information Patent Application
Serial Interface Device and Image Forming Apparatus
- Publication number 20070296617
- Publication date Dec 27, 2007
- Rohm Co., Ltd.
- Tatsuhiko Murata
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of Reducing Clock Differential in a Data Processing System
- Publication number 20070260771
- Publication date Nov 8, 2007
- Cheng-Hao Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and circuit for differential clock pulse compensation betwee...
- Publication number 20070165678
- Publication date Jul 19, 2007
- Frank Huertgen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Buffer management system, digital audio receiver, headphones, louds...
- Publication number 20070008984
- Publication date Jan 11, 2007
- Koninklijke Philips Electronics N.V.
- Norbert Jeanne Louis Philips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Event buffering model for instrumentation providers
- Publication number 20070011327
- Publication date Jan 11, 2007
- Microsoft Corporation
- Michael D. Volodarsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for setting data carrier speed in a data carrier drive appar...
- Publication number 20060294267
- Publication date Dec 28, 2006
- Koninklijke Philips Electronics N.V.
- Ludo Albert Lucia Lenaerts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data transmission controller and sampling frequency converter
- Publication number 20060188052
- Publication date Aug 24, 2006
- Yamaha Corporation
- Takayoshi Mochizuki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Clock synchroniser and clock and data recovery apparatus and method
- Publication number 20050220240
- Publication date Oct 6, 2005
- Paul Lesso
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronizing method and apparatus
- Publication number 20040165690
- Publication date Aug 26, 2004
- Broadcom Corporation
- Tarek Kaylani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and device for the clocked output of asynchronously received...
- Publication number 20040013093
- Publication date Jan 22, 2004
- Infineon Technologies AG
- Stefan Eder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Jitter and wander reduction apparatus
- Publication number 20030227988
- Publication date Dec 11, 2003
- Ravi Subrahmanyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Clock reproducing method and receiving clock producing apparatus
- Publication number 20030005348
- Publication date Jan 2, 2003
- NEC Corporation
- Jun Furukawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Jitter attenuator fifo overflow-underflow protection using digital-...
- Publication number 20020172310
- Publication date Nov 21, 2002
- Manop Thamsirianunt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of clock mismatch and drift compensation for packet networks
- Publication number 20020154640
- Publication date Oct 24, 2002
- Li Wei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DS-3 desynchronizer
- Publication number 20020144169
- Publication date Oct 3, 2002
- Applied Micro Circuits Corporation
- Balaji Ranganath
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PLL/DLL dual loop data synchronization utillizing a granular FIFO f...
- Publication number 20020075980
- Publication date Jun 20, 2002
- Benjamim Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for outputting a datastream processed by a pro...
- Publication number 20020042708
- Publication date Apr 11, 2002
- Hartmut Beintken
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for clock synchronization for USB sink device
- Publication number 20020034273
- Publication date Mar 21, 2002
- Steven Donald Spence
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronization control apparatus and method
- Publication number 20010018730
- Publication date Aug 30, 2001
- Yamaha Corporation
- Masafumi Toshitani
- G06 - COMPUTING CALCULATING COUNTING

Adapt frequency

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Apparatus and methods employing asynchronous FIFO buffer with read...

Methods and apparatus for synchronizing data transfers across clock...

Data transfer between clock domains

Pausible bisynchronous FIFO

Clock transfer circuit, video processing system, and semiconductor...

Method of sampling and storing data and implementation thereof

Deterministic FIFO buffer

Processor management using a buffer

Method and apparatus to prevent FIFO overflow and underflow by adju...

Asynchronous first in first out interface, method thereof and integ...

Processor management using a buffer

Serial interface device and image forming apparatus

Circuit for correcting an output clock frequency in a receiving device

Processor management using a buffer

Systems and methods for limiting the rates of data to/from a buffer

Dynamic adjusting send rate of buffered data

Digital clock smoothing

Fibre channel elastic FIFO delay controller and loop delay method h...

Method and circuit for differential clock pulse compensation betwee...

Method for reading out sensor data

Fibre channel elastic FIFO delay controller and loop delay method h...

Systems and methods for limiting the rates of data to/from a buffer

Digital clock smoothing apparatus and method

Data transmission controller and sampling frequency converter

Synchronizing method

PLL/DLL dual loop data synchronization utilizing a granular FIFO fi...

Method and device for the clocked output of asynchronously received...

First-in-first-out (FIFO) memory for buffering packet fragments thr...

Jitter and wander reduction apparatus

Systems and methods for limiting the rates of data to/from a buffer

Patents Applicationslast 30 patents

METHODS AND APPARATUS FOR SYNCHRONIZING DATA TRANSFERS ACROSS CLOCK...

FIFO Clock and Power Management

CLOCK RATE CONTROLLER AND METHOD THEREOF AND ELECTRONIC DEVICE THEREOF

APPARATUS FOR SYNCHRONIZING A DATA HANDOVER BETWEEN A FIRST CLOCK D...

ASYNCHRONOUS FIRST IN FIRST OUT INTERFACE, METHOD THEREOF AND INTEG...

Method of Controlling Spread-Spectrum Clock Generation

Circuit for correcting an output clock frequency in a receiving device

AUDIO PROCESSOR HAVING DYNAMIC AUTOMATIC CONTROL FUNCTION OF OPERAT...

Method for Reading Out Sensor Data

Serial Interface Device and Image Forming Apparatus

Method of Reducing Clock Differential in a Data Processing System

Method and circuit for differential clock pulse compensation betwee...

Buffer management system, digital audio receiver, headphones, louds...

Event buffering model for instrumentation providers

Method for setting data carrier speed in a data carrier drive appar...

Data transmission controller and sampling frequency converter

Clock synchroniser and clock and data recovery apparatus and method

Synchronizing method and apparatus

Method and device for the clocked output of asynchronously received...

Jitter and wander reduction apparatus

Clock reproducing method and receiving clock producing apparatus

Jitter attenuator fifo overflow-underflow protection using digital-...

Method of clock mismatch and drift compensation for packet networks

DS-3 desynchronizer

PLL/DLL dual loop data synchronization utillizing a granular FIFO f...

Method and apparatus for outputting a datastream processed by a pro...

System and method for clock synchronization for USB sink device

Synchronization control apparatus and method