Adding special bits or symbols to the coded information

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F11/00Error detection Error correction Monitoring

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G06F11/10Adding special bits or symbols to the coded information

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Patents Grantslast 30 patents

Information Patent Grant
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Adding special bits or symbols to the coded information

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Streaming engine with separately selectable element and group dupli...

Methods and devices for error correction

Bit efficient memory error correcting coding and decoding scheme

Dynamic parity scheme

Solid-state drive with multimode compression and error correction

Techniques for controlling small angle Mølmer-Sørensen gates and fo...

Memory system

Read replacement via data reconstruction based on access patterns

Memory device, memory control device and operating method of memory...

Data authentication for data compression

Distributed protocol endpoint services for data storage systems

ECC decoder and memory controller including the same

Data compression and decompression methods and systems

Polyhedron models and methods using computational operations for di...

Apparatuses, systems, and methods for module level error correction

Selective per die DRAM PPR for memory device

System and method for using interface protection parameters

Soft read operations with progressive data output

Memory device including flexible column repair circuit

Efficient memory use to support soft information in bit flipping de...

Methods and apparatus for data processing and management in erasure...

Verification process for bit spreading error resistant memory system

Memory controller, storage device including the memory controller,...

Ingesting and storing data in a massive data ingestion system

Application aware memory patrol scrubbing techniques

Method and system for media error recovery

Operating and testing semiconductor devices

Memory controller architecture

Buffer that supports burst transfers having parallel CRC and data t...

Memory controller performing error correction and operating method...

Patents Applicationslast 30 patents

FLASH MEMORY APPARATUS AND STORAGE MANAGEMENT METHOD FOR FLASH MEMORY

MEMORY MAINTENANCE OPERATIONS

CIRCUITRY AND METHODS FOR PROBABILISTIC DATA MANIPULATION DETECTION...

BIT ERROR DETECTION IN A COMPUTE-IN-MEMORY SYSTEM, METHOD OF OPERAT...

ERROR INJECTION ARCHITECTURE IN A PROCESSING ENVIRONMENT

DECODING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT

DATA CORRUPTION INDICATION

ERROR CORRECTION CODE ENGINE OF SEMICONDUCTOR MEMORY DEVICE AND SEM...

STORAGE DEVICE AND AN OPERATION METHOD OF A STORAGE CONTROLLER INCL...

MULTI-STAGE DECODER WITH ADAPTIVE LEARNING

HARDWARE EFFICIENT OUT-OF-ORDER SYNDROME CALCULATION

MEMORY SYSTEM AND INFORMATION PROCESSING SYSTEM

Buffer Checker for Task Processing Fault Detection

MEMORY DEVICE AND OPERATION METHOD FOR GENERATING CHECK POINTS BASE...

MEMORY SYSTEM GENERATING PARITY CHECK CODES USING A RANDOMIZER

Multilevel Memory System with Copied Error Detection Bits

DRAM RETENTION TEST METHOD FOR DYNAMIC ERROR CORRECTION

Tile Region Protection Using Multiple GPUs

METHOD AND APPARATUS FOR FLEXIBLE ON-CHIP MEMORY CONFIGURATION TO S...

METHOD AND SYSTEM FOR ON-ASIC ERROR CONTROL ENCODING

MEMORY SYSTEM SUPPORTING MULTI-CHANNEL INTERFACE

Distributed Erasure Coded Virtual File System

SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF

STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE AND OPERATING ME...

Efficient Networking for a Distributed Storage System

Resiliency Schemes for Distributed Storage Systems

SEMICONDUCTOR DEVICE AND DATA TRANSFERRING METHOD FOR SEMICONDUCTOR...

Channel Circuit with Zero Force Equalizer

METHODS AND APPARATUS FOR MULTI-BANKED VICTIM CACHE WITH DUAL DATAPATH

SEMICONDUCTOR DEVICE