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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F9/00Arrangements for programme control

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G06F9/32Address formation of the next instruction

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Patents Grantslast 30 patents

Information Patent Grant
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Address formation of the next instruction

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Entering protected pipeline mode with clearing

Task synchronization for accelerated deep learning

Branch prediction method, branch prediction apparatus, processor, m...

Hardware verification of dynamically generated code

Streaming engine with stream metadata saving for context switching

Advanced processor architecture

Efficient processing of nested loops for computing device with mult...

Illegal address mask method and device for cores of DSP

Prediction of number of iterations of a fetching process

Vector processor with vector data buffer

Cryptographic computing using encrypted base addresses and used in...

Changing program behavior at runtime

Automated runtime configuration for dataflows

Methods and apparatus for task relocation based on memory access pa...

Domain transition disable configuration parameter

Configurable vector compute engine

Loop driven region based frontend translation control for performan...

Two address translations from a single table look-aside buffer read

Reverse engineering detection by counting consecutive incremental b...

Atomic operation predictor to predict whether an atomic operation w...

Lightweight encryption

Facilitating per-CPU reference counting for multi-core systems with...

Processors, methods, systems, and instructions to protect shadow st...

Implicit global pointer relative addressing for global memory access

Inserting predefined pad values into a stream of vectors

Monitoring performance cost of events

Cooperative garbage collection barrier elision

Systems and methods for computing dot products of nibbles in two ti...

Systems and methods for distributed decision-making and scheduling

Circuit enabling device, non-transitory computer readable medium, a...

Patents Applicationslast 30 patents

SECURING COMPUTING SYSTEMS AGAINST MICROARCHITECTURAL REPLAY ATTACKS

SEPARATE BRANCH TARGET BUFFERS FOR DIFFERENT LEVELS OF CALLS

INSERTING PREDEFINED PAD VALUES INTO A STREAM OF VECTORS

Implicit Global Pointer Relative Addressing for Global Memory Access

TRACKING STREAMING ENGINE VECTOR PREDICATES TO CONTROL PROCESSOR EX...

STORAGE OF PREDICTION-RELATED DATA

EXPLICIT SCHEDULING OF ON-CHIP OPERATIONS

INTERRUPT-PROHIBITED SECTION MEASUREMENT METHOD AND SYSTEM

PADDING IN A STREAM OF MATRIX ELEMENTS

Measuring Performance Associated with Processing Instructions

MECHANISM FOR EFFICIENT MASSIVELY-CONCURRENT CONDITIONAL COMPUTATION

METHOD FOR EXECUTION OF BUS CONTROLLER, COMPUTER DEVICE AND STORAGE...

POLARITY-BASED DATA PREFETCHER WITH UNDERLYING STRIDE DETECTION

INSTRUCTION TRANSLATION METHOD AND RELATED DEVICE THEREOF

CONTROLLING WHICH MEMORY SOURCE IS UTILIZED FOR FETCHING INSTRUCTIO...

METHOD AND APPARATUS FOR VECTOR PERMUTATION

ARRAY PROCESSOR HAVING AN INSTRUCTION SEQUENCER INCLUDING A PROGRAM...

CACHE CONTROL CIRCUIT WITH FETCH HYSTERESIS

PROCESSOR ARCHITECTURE WITH MEMORY ACCESS CIRCUIT

VARIABLE LATENCY INSTRUCTIONS

SECURE PROCESSOR FOR DETECTING AND PREVENTING EXPLOITS OF SOFTWARE...

DUAL DATA STREAMS SHARING DUAL CACHE ACCESS PORTS

SYSTEMS AND METHODS FOR BALANCING COMPUTING RESOURCES

CACHE MANAGEMENT OPERATIONS USING STREAMING ENGINE

METHOD AND APPARATUS FOR PERMUTING STREAMED DATA ELEMENTS

STREAMING ENGINE WITH CACHE-LIKE STREAM DATA STORAGE AND LIFETIME T...

TWO-DIMENSIONAL ZERO PADDING IN A STREAM OF MATRIX ELEMENTS

STORAGE ORGANIZATION FOR TRANSPOSING A MATRIX USING A STREAMING ENGINE

SYSTEMS AND METHODS FOR DISTRIBUTED DECISION-MAKING AND SCHEDULING

SYSTEM, METHOD AND APPARATUS FOR CONDITIONALLY OFFLOADING INSTRUCTI...