and a circuit for adding and deleting pulses

Industry

CPC
H03L7/0993

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

HELECTRICITY H03Electronic circuits H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES H03L7/00Automatic control of frequency or phase Synchronisation

Current Industry

H03L7/0993and a circuit for adding and deleting pulses

Industries

Please log in for detailed analytics

Patents Grantslast 30 patents

Information Patent Grant
Phase-locked loop circuit and operation method thereof
- Patent number 12,028,082
- Issue date Jul 2, 2024
- Electronics and Telecommunications Research Institute
- Ja Yol Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-chip phase-locked loop response measurement
- Patent number 11,018,679
- Issue date May 25, 2021
- Silicon Laboratories Inc.
- Kannanthodath V. Jayakumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digitally controllable oscillator with high accuracy
- Patent number 10,979,060
- Issue date Apr 13, 2021
- Huawei Technologies Co., Ltd.
- Pasquale Lamanna
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock data recovery circuit
- Patent number 10,790,833
- Issue date Sep 29, 2020
- The Boeing Company
- Alfio Zanchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
On-chip measurement for phase-locked loop
- Patent number 10,295,580
- Issue date May 21, 2019
- Analog Devices Global
- Vamshi Krishna Chillara
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus, system and method for controlling temperature and power...
- Patent number 9,484,938
- Issue date Nov 1, 2016
- Intel Corporation
- Martin Vandepas
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reducing settling time in phase-locked loops
- Patent number 8,885,788
- Issue date Nov 11, 2014
- Intel IP Corporation
- Claudio Rey
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus, system, and method for controlling temperature and power...
- Patent number 8,836,389
- Issue date Sep 16, 2014
- Intel Corporation
- Martin Vandepas
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Synchronization of VoDSL of DSLAM connected only to ethernet
- Patent number 8,724,659
- Issue date May 13, 2014
- Telefonaktiebolaget L M Ericsson (Publ)
- Tore Andre
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Input/output circuit
- Patent number 8,290,028
- Issue date Oct 16, 2012
- Renesas Electronics Corporation
- Masahiro Takeuchi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital phase locked circuit capable of dealing with input clock si...
- Patent number 7,397,882
- Issue date Jul 8, 2008
- Fujitsu Limited
- Ichiro Yokokura
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Time division duplex system utilizing global positioning system tim...
- Patent number 7,133,397
- Issue date Nov 7, 2006
- L-3 Communications Corporation
- Delon K. Jones
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and method for PLL with equalizing pulse removal
- Patent number 6,998,886
- Issue date Feb 14, 2006
- National Semiconductor Company
- Hon K. Chiu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and system for adjusting the step clock of a delta-sigma tra...
- Patent number 6,940,435
- Issue date Sep 6, 2005
- Tellabs Oy
- Heikki Laamanen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor integrated circuit device
- Patent number 6,671,112
- Issue date Dec 30, 2003
- Fujitsu Limited
- Hiroko Murakami
- G11 - INFORMATION STORAGE
Information Patent Grant
Digital receive phase lock loop with cumulative phase error correction
- Patent number 6,636,092
- Issue date Oct 21, 2003
- 3COM Corporation
- Eric Stine
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Phase control circuit and phase control method
- Patent number 6,608,876
- Issue date Aug 19, 2003
- Oki Electric Industry Co., Ltd.
- Kiyohiko Yamazaki
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low-jitter data transmission apparatus
- Patent number 6,493,408
- Issue date Dec 10, 2002
- NEC Corporation
- Eiichi Kobayashi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Signal generator, and method
- Patent number 6,380,811
- Issue date Apr 30, 2002
- Motorola, Inc.
- Michael Zarubinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electrical signal synchronization
- Patent number 6,380,776
- Issue date Apr 30, 2002
- LSI Logic Corporation
- Robert L. Yocom
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
A/D with digital PLL
- Patent number 6,377,416
- Issue date Apr 23, 2002
- Fujitsu Limited
- Kazuyoshi Kikuta
- G11 - INFORMATION STORAGE
Information Patent Grant
Low deviation synchronization clock
- Patent number 6,236,277
- Issue date May 22, 2001
- Rockwell Technologies, LLC
- Lawrence W. Esker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Plesiochronous digital hierarchy low speed signal switching digital...
- Patent number 6,233,297
- Issue date May 15, 2001
- NEC Coporation
- Masaaki Itoh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Phase alignment of frames in computer telephony busses
- Patent number 6,219,395
- Issue date Apr 17, 2001
- Natural MicroSystems, Corp.
- Jonathan D. Pollack
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Discrete phase locked loop
- Patent number 6,081,571
- Issue date Jun 27, 2000
- Telefonaktiebolaget LM Ericsson
- Johan Jansson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High-speed internal clock synchronizing method and circuit
- Patent number 6,021,504
- Issue date Feb 1, 2000
- Mitsubishi Denki Kabushiki Kaisha
- Takashi Yamasaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Syncronizing a data acquisition device with a host
- Patent number 5,914,991
- Issue date Jun 22, 1999
- Siemens Medical Systems, Inc.
- Scott Gigandet
- A61 - MEDICAL OR VETERINARY SCIENCE HYGIENE
Information Patent Grant
A/D with digital PLL
- Patent number 5,870,591
- Issue date Feb 9, 1999
- Fujitsu Limited
- Masaru Sawada
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronization and battery saving technique
- Patent number 5,812,617
- Issue date Sep 22, 1998
- Silcom Research Limited
- John Benjamin Heckman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital phase locked loop having adaptive bandwidth for pulse stuff...
- Patent number 5,793,824
- Issue date Aug 11, 1998
- Adtran, Inc.
- Richard A. Burch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
PHASE-LOCKED LOOP CIRCUIT AND OPERATION METHOD THEREOF
- Publication number 20230119518
- Publication date Apr 20, 2023
- ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
- Ja Yol LEE
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ON-CHIP PHASE-LOCKED LOOP RESPONSE MEASUREMENT
- Publication number 20210159904
- Publication date May 27, 2021
- Silicon Laboratories Inc.
- Kannanthodath V. Jayakumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITALLY CONTROLLABLE OSCILLATOR WITH HIGH ACCURACY
- Publication number 20190312581
- Publication date Oct 10, 2019
- Huawei Technologies Co., Ltd
- Pasquale LAMANNA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ON-CHIP MEASUREMENT FOR PHASE-LOCKED LOOP
- Publication number 20180095119
- Publication date Apr 5, 2018
- ANALOG DEVICES GLOBAL
- Vamshi Krishna Chillara
- G01 - MEASURING TESTING
Information Patent Application
CIRCUIT, A TIME-TO-DIGITAL CONVERTER, AN INTEGRATED CIRCUIT, A TRAN...
- Publication number 20150372690
- Publication date Dec 24, 2015
- Intel IP Corporation
- Stefan Tertinek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYNTHESIZING METHOD OF SIGNAL HAVING VARIABLE FREQUENCY AND SYNTHES...
- Publication number 20150214960
- Publication date Jul 30, 2015
- SNU R&DB Foundation
- Jae Ha KIM
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUS, SYSTEM AND METHOD FOR CONTROLLING TEMPERATURE AND POWER...
- Publication number 20150002505
- Publication date Jan 1, 2015
- Martin Vandepas
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUS, SYSTEM, AND METHOD FOR CONTROLLING TEMPERATURE AND POWER...
- Publication number 20130249611
- Publication date Sep 26, 2013
- Martin Vandepas
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Input/output circuit
- Publication number 20080310569
- Publication date Dec 18, 2008
- NEC Electronics Corporation
- Masahiro Takeuchi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Synchronization of Vodsl of Dslam Connected Only to Ethernet
- Publication number 20080212574
- Publication date Sep 4, 2008
- Tore Andre
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Digital phase locked circuit capable of dealing with input clock si...
- Publication number 20040062337
- Publication date Apr 1, 2004
- FUJITSU LIMITED
- Ichiro Yokokura
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and system for adjusting the step clock of a delta-sigma tra...
- Publication number 20040037386
- Publication date Feb 26, 2004
- Heikki Laamanen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Semiconductor integrated circuit device
- Publication number 20030088834
- Publication date May 8, 2003
- Hiroko Murakami
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Time division duplex system utilizing global positioning system tim...
- Publication number 20030048758
- Publication date Mar 13, 2003
- Delon K. Jones
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PHASE CONTROL CIRCUIT AND PHASE CONTROL METHOD
- Publication number 20020051507
- Publication date May 2, 2002
- YAMAZAKI KIYOHIKO
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

and a circuit for adding and deleting pulses

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Phase-locked loop circuit and operation method thereof

On-chip phase-locked loop response measurement

Digitally controllable oscillator with high accuracy

Clock data recovery circuit

On-chip measurement for phase-locked loop

Apparatus, system and method for controlling temperature and power...

Reducing settling time in phase-locked loops

Apparatus, system, and method for controlling temperature and power...

Synchronization of VoDSL of DSLAM connected only to ethernet

Input/output circuit

Digital phase locked circuit capable of dealing with input clock si...

Time division duplex system utilizing global positioning system tim...

Apparatus and method for PLL with equalizing pulse removal

Method and system for adjusting the step clock of a delta-sigma tra...

Semiconductor integrated circuit device

Digital receive phase lock loop with cumulative phase error correction

Phase control circuit and phase control method

Low-jitter data transmission apparatus

Signal generator, and method

Electrical signal synchronization

A/D with digital PLL

Low deviation synchronization clock

Plesiochronous digital hierarchy low speed signal switching digital...

Phase alignment of frames in computer telephony busses

Discrete phase locked loop

High-speed internal clock synchronizing method and circuit

Syncronizing a data acquisition device with a host

A/D with digital PLL

Synchronization and battery saving technique

Digital phase locked loop having adaptive bandwidth for pulse stuff...

Patents Applicationslast 30 patents

PHASE-LOCKED LOOP CIRCUIT AND OPERATION METHOD THEREOF

ON-CHIP PHASE-LOCKED LOOP RESPONSE MEASUREMENT

DIGITALLY CONTROLLABLE OSCILLATOR WITH HIGH ACCURACY

ON-CHIP MEASUREMENT FOR PHASE-LOCKED LOOP

CIRCUIT, A TIME-TO-DIGITAL CONVERTER, AN INTEGRATED CIRCUIT, A TRAN...

SYNTHESIZING METHOD OF SIGNAL HAVING VARIABLE FREQUENCY AND SYNTHES...

APPARATUS, SYSTEM AND METHOD FOR CONTROLLING TEMPERATURE AND POWER...

APPARATUS, SYSTEM, AND METHOD FOR CONTROLLING TEMPERATURE AND POWER...

Input/output circuit

Synchronization of Vodsl of Dslam Connected Only to Ethernet

Digital phase locked circuit capable of dealing with input clock si...

Method and system for adjusting the step clock of a delta-sigma tra...

Semiconductor integrated circuit device

Time division duplex system utilizing global positioning system tim...

PHASE CONTROL CIRCUIT AND PHASE CONTROL METHOD