Avoiding asymmetry of delay for leading or trailing edge; Avoiding variations of delay due to threshold

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H03K2005/00136

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HELECTRICITY H03Electronic circuits H03KPULSE TECHNIQUE

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H03K2005/00136Avoiding asymmetry of delay for leading or trailing edge; Avoiding variations of delay due to threshold

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Patents Grantslast 30 patents

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Delay circuit including first and second internal delay circuits an...
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Methods of providing performance compensation for process variation...
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Patents Applicationslast 30 patents

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COMMUNICATION CIRCUIT APPARATUS AND TRANSCEIVER HAVING THE SAME
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DELAY-LOCKED LOOP HAVING A DELAY INDEPENDENT OF INPUT SIGNAL DUTY C...
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DELAY CIRCUIT
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LEVEL SHIFTER
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TRANSMISSION CIRCUIT
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Low power and duty cycle error free matched current phase locked loop
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Avoiding asymmetry of delay for leading or trailing edge; Avoiding variations of delay due to threshold

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Managing signal transfers in semiconductor devices

Techniques to reduce the effect of pad asymmetry and signal routing...

Low frequency variation calibration circuitry

Glitch free input transition detector

Delay circuit having reduced duty cycle distortion

NMOS buffer for high-speed low-resolution current steering digital-...

Pulse width adjusting circuit

Programmable delay circuit

Processing clock signals

Transmission circuit

Level shifter with balanced duty cycle

Input buffer

Delay-locked loop having a delay independent of input signal duty c...

Delay circuit including first and second internal delay circuits an...

Time delay compensation and pulse width correction

Digital delay circuit

Semiconductor integrated circuit having insulated gate field effect...

Buffer circuit, buffer tree, and semiconductor device

Ratio asymmetric inverters, and apparatus including one or more rat...

Edge-timing adjustment circuit

Differential line compensation apparatus, method and system

Programmable delay circuit

Duty detector and duty detection/correction circuit including the s...

Low power and duty cycle error free matched current phase locked loop

Differential line compensation apparatus, method and system

Methods of providing performance compensation for process variation...

Method and apparatus for temporally correcting a data signal

Tunable delay circuit

Closed-loop independent DLL-controlled rise/fall time control circuit

Buffer circuit, buffer tree, and semiconductor device

Patents Applicationslast 30 patents

TECHNIQUES TO REDUCE THE EFFECT OF PAD ASYMMETRY AND SIGNAL ROUTING...

COMMUNICATION CIRCUIT APPARATUS AND TRANSCEIVER HAVING THE SAME

NMOS Buffer for High-Speed Low-Resolution Current Steering Digital-...

PROCESSING CLOCK SIGNALS

VOLTAGE OUTPUT CIRCUT

Level Shifter with Balanced Duty Cycle

INTERNAL SUPPLY VOLTAGE CIRCUIT OF AN INTEGRATED CIRCUIT

DELAY-LOCKED LOOP HAVING A DELAY INDEPENDENT OF INPUT SIGNAL DUTY C...

INPUT BUFFER

Time Delay Compensation and Pulse Width Correction

SEMICONDUCTOR INTEGRATED CIRCUIT HAVING INSULATED GATE FIELD EFFECT...

WAVEFORM PROCESSING CIRCUIT

DELAY CIRCUIT

LEVEL SHIFTER

TRANSMISSION CIRCUIT

EDGE-TIMING ADJUSTMENT CIRCUIT

RATIO ASYMMETRIC INVERTERS, AND APPARATUS INCLUDING ONE OR MORE RAT...

Delay Circuit Having Reduced Duty Cycle Distortion

VOLTAGE CONTROLLED OSCILLATOR AND PHASE LOCKED LOOP CIRCUIT INCORPO...

MULTIPLE OUTPUT TIME-TO-DIGITAL CONVERTER

Digital delay circuit

Clock Input/Output Device

Low power and duty cycle error free matched current phase locked loop

Differential line compensation apparatus, method and system

Duty detector and duty detection/correction circuit including the s...

Semiconductor device and method for decreasing noise of output driver

Buffer having predriver to help improve symmetry of rise and fall t...

Closed-loop independent DLL-controlled rise/fall time control circuit

Buffer circuit, buffer tree, and semiconductor device

Tunable delay circuit