Bit-line or column circuits

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CPC
G11C13/0026

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C13/00Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00 - G11C25/00

Current Industry

G11C13/0026Bit-line or column circuits

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Three-dimensional structure of memories for in-memory computing
- Patent number 12,272,398
- Issue date Apr 8, 2025
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Théophile Dubreuil
- G11 - INFORMATION STORAGE
Information Patent Grant
Forming operation method of resistive random access memory
- Patent number 12,272,397
- Issue date Apr 8, 2025
- United Microelectronics Corp.
- Yi Ting Hung
- G11 - INFORMATION STORAGE
Information Patent Grant
Differential programming of two-terminal resistive switching memory...
- Patent number 12,272,399
- Issue date Apr 8, 2025
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Spike current suppression in a memory array
- Patent number 12,260,908
- Issue date Mar 25, 2025
- Micron Technology, Inc.
- Sundaravadivel Rajarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Encoding additional states in a three-dimensional crosspoint memory...
- Patent number 12,249,372
- Issue date Mar 11, 2025
- Intel Corporation
- Rouhollah Mousavi Iraei
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic inhibit voltage to reduce write power for random-access memory
- Patent number 12,230,320
- Issue date Feb 18, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Zheng-Jun Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal processing apparatus and signal processing method
- Patent number 12,226,216
- Issue date Feb 18, 2025
- Tsinghua University
- Huaqiang Wu
- A61 - MEDICAL OR VETERINARY SCIENCE HYGIENE
Information Patent Grant
Systems and methods for efficient matrix multiplication
- Patent number 12,223,009
- Issue date Feb 11, 2025
- Rain Neuromorphics Inc.
- Jack David Kendall
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and method of forming the same
- Patent number 12,217,817
- Issue date Feb 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jung-Piao Chiu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Overwrite read methods for resistance switching memory devices
- Patent number 12,205,640
- Issue date Jan 21, 2025
- SanDisk Technologies LLC
- Michael K. Grobis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable resistance non-volatile memory with a gate insulator film...
- Patent number 12,207,480
- Issue date Jan 21, 2025
- Kioxia Corporation
- Tomoki Chiba
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive change element arrays
- Patent number 12,176,028
- Issue date Dec 24, 2024
- Nantero, Inc.
- Jia Luo
- G11 - INFORMATION STORAGE
Information Patent Grant
Drift aware read operations
- Patent number 12,176,029
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Karthik Sarpatwari
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-referenced and regulated sensing solution for phase change mem...
- Patent number 12,176,030
- Issue date Dec 24, 2024
- Universite d'Aix-Marseille
- Jean-Michel Portal
- G11 - INFORMATION STORAGE
Information Patent Grant
Silicon-on-insulator (SOI) circuitry for low-voltage memory bit-lin...
- Patent number 12,170,110
- Issue date Dec 17, 2024
- Weebit Nano Ltd.
- Lior Dagan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 12,159,666
- Issue date Dec 3, 2024
- Samsung Electronics Co., Ltd.
- Sungkyu Jo
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-level memory programming and readout
- Patent number 12,153,823
- Issue date Nov 26, 2024
- Intel Corporation
- Davide Fugazza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ReRAM memory array that includes ReRAM memory cells having a ReRAM...
- Patent number 12,154,622
- Issue date Nov 26, 2024
- Microsemi SoC Corp.
- Victor Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Differential programming of two-terminal memory with program detect...
- Patent number 12,154,624
- Issue date Nov 26, 2024
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory based compute-in-memory cell
- Patent number 12,131,776
- Issue date Oct 29, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Zheng-Jun Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive random-access memory (ReRAM) cell optimized for reset and...
- Patent number 12,131,777
- Issue date Oct 29, 2024
- Weebit Nano Ltd.
- Lior Dagan
- G11 - INFORMATION STORAGE
Information Patent Grant
Partitioned memory architecture with single resistor or dual resist...
- Patent number 12,125,530
- Issue date Oct 22, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Venkatesh P. Gopinath
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple transistor architecture for three-dimensional memory arrays
- Patent number 12,119,056
- Issue date Oct 15, 2024
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Grant
Partitioned memory architecture with dual resistor memory elements...
- Patent number 12,106,804
- Issue date Oct 1, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Venkatesh P. Gopinath
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-selecting memory array with horizontal access lines
- Patent number 12,100,447
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and operating method thereof
- Patent number 12,087,361
- Issue date Sep 10, 2024
- Samsung Electronics Co., Ltd.
- Bilal Ahmad Janjua
- G11 - INFORMATION STORAGE
Information Patent Grant
Differential programming of two-terminal resistive switching memory...
- Patent number 12,080,347
- Issue date Sep 3, 2024
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including a plurality of stacked memory cells
- Patent number 12,080,345
- Issue date Sep 3, 2024
- SK hynix Inc.
- Dong Keun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, integrated circuit device and method
- Patent number 12,080,346
- Issue date Sep 3, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Access to a memory
- Patent number 12,073,880
- Issue date Aug 27, 2024
- Infineon Technologies AG
- Thomas Kern
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Drift Aware Read Operations
- Publication number 20250118366
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Karthik Sarpatwari
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-STEP PROGRAMMING SCHEMES FOR PROGRAMMING CROSSBAR CIRCUITS
- Publication number 20250111877
- Publication date Apr 3, 2025
- TetraMem Inc.
- Gong Lei
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND INITIALIZING METHOD THEREOF
- Publication number 20250095732
- Publication date Mar 20, 2025
- Samsung Electronics Co., Ltd.
- KYUDONG PARK
- G11 - INFORMATION STORAGE
Information Patent Application
CHALCOGENIDE-BASED MEMORY MATERIAL, AND MEMORY DEVICE AND ELECTRONI...
- Publication number 20250098558
- Publication date Mar 20, 2025
- Samsung Electronics Co., Ltd.
- Hajun SUNG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL ARRAY UNIT
- Publication number 20250087267
- Publication date Mar 13, 2025
- Sony Semiconductor Solutions Corporation
- NOBUKAZU MURATA
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLE TRANSISTOR ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS
- Publication number 20250087266
- Publication date Mar 13, 2025
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Application
IN-MEMORY COMPUTATION SYSTEM USING A SEGMENTED MEMORY ARCHITECTURE...
- Publication number 20250078922
- Publication date Mar 6, 2025
- STMicroelectronics International N.V.
- Marcella CARISSIMI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING METHOD BASED ON MEMRISTOR ARRAY, AND ELECTRONIC APP...
- Publication number 20250078924
- Publication date Mar 6, 2025
- TSINGHUA UNIVERSITY
- Huaqiang WU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIT-SERIAL INPUT SCHEMES FOR CROSSBAR CIRCUITS
- Publication number 20250069655
- Publication date Feb 27, 2025
- TetraMem Inc.
- Hengfang Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
SELF-SELECTING MEMORY ARRAY WITH HORIZONTAL ACCESS LINES
- Publication number 20250061943
- Publication date Feb 20, 2025
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Application
Assembly for carrying out a discrete Fourier transform
- Publication number 20250054542
- Publication date Feb 13, 2025
- SEMRON GMBH
- Kai-Uwe DEMASIUS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ANALOG HARDWARE REALIZATION OF NEURAL NETWORKS HAVING VARIABLE WEIGHTS
- Publication number 20250037762
- Publication date Jan 30, 2025
- Poly N Technology Limited
- DMITRII GODOVSKII
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ReRAM MEMORY ARRAY THAT INCLUDES ReRAM MEMORY CELLS HAVING A ReRAM...
- Publication number 20250037764
- Publication date Jan 30, 2025
- Microsemi SoC Corp.
- Victor Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
TRANSIMPEDANCE AMPLIFIERS FOR CROSSBAR CIRCUITS
- Publication number 20250037763
- Publication date Jan 30, 2025
- TetraMem Inc.
- Wenbo Yin
- G11 - INFORMATION STORAGE
Information Patent Application
DECODER ARCHITECTURE FOR MEMORY DEVICE
- Publication number 20250014640
- Publication date Jan 9, 2025
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE, OPERATING METHOD OF THE SEMICONDUCTOR DEVICE,...
- Publication number 20250006259
- Publication date Jan 2, 2025
- SK HYNIX INC.
- Jae Yeon Lee
- G11 - INFORMATION STORAGE
Information Patent Application
COMPENSATING NON-IDEALITY OF A NEUROMORPHIC MEMORY DEVICE
- Publication number 20240420762
- Publication date Dec 19, 2024
- International Business Machines Corporation
- Benedikt Kersting
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT COMPRISING ELECTRONIC CELLS AND A CONTROL CIRCUIT
- Publication number 20240422992
- Publication date Dec 19, 2024
- STMicroelectronics International N.V.
- Andrea REDAELLI
- G11 - INFORMATION STORAGE
Information Patent Application
VERTICAL MEMORY DEVICE INCLUDING SELECTOR WITH VARIABLE RESISTIVE M...
- Publication number 20240422991
- Publication date Dec 19, 2024
- Samsung Electronics Co., Ltd.
- Youngsun Song
- G11 - INFORMATION STORAGE
Information Patent Application
SENSE AMPLIFIER CIRCUIT, CORRESPONDING MEMORY DEVICE AND METHOD OF...
- Publication number 20240404595
- Publication date Dec 5, 2024
- STMicroelectronics International N.V.
- Antonino CONTE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY AND OPERATION METHOD THEREOF
- Publication number 20240386953
- Publication date Nov 21, 2024
- SK HYNIX INC.
- Kyu Sung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY BASED COMPUTE-IN-MEMORY CELL
- Publication number 20240379155
- Publication date Nov 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Zheng-Jun LIN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY AND READING, WRITING AND ERASING METHODS THEREOF
- Publication number 20240379158
- Publication date Nov 14, 2024
- Shanghai IC R&D Center Co., Ltd.
- Lingyi GUO
- G11 - INFORMATION STORAGE
Information Patent Application
CROSSBAR CIRCUITS UTILIZING CURRENT-MODE DIGITAL-TO-ANALOG CONVERTERS
- Publication number 20240379140
- Publication date Nov 14, 2024
- TetraMem Inc.
- Hengfang Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
CONFIGURABLE RESISTIVITY FOR LINES IN A MEMORY DEVICE
- Publication number 20240379157
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Koushik Banerjee
- G11 - INFORMATION STORAGE
Information Patent Application
RANDOM ACCESS MEMORY APPARATUS, MEMORY SYSTEM, AND METHOD FOR OPERA...
- Publication number 20240371439
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- JUI-JEN WU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY MODULE
- Publication number 20240363160
- Publication date Oct 31, 2024
- Sony Semiconductor Solutions Corporation
- YOTARO MORI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE, INTEGRATED CIRCUIT DEVICE AND METHOD
- Publication number 20240363159
- Publication date Oct 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Jen WU
- G11 - INFORMATION STORAGE
Information Patent Application
IN-MEMORY COMPUTING (IMC) MEMORY DEVICE AND IN-MEMORY COMPUTING METHOD
- Publication number 20240355387
- Publication date Oct 24, 2024
- Macronix International Co., Ltd.
- Yu-Yu Lin
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE MEMORY WITH LOW VOLTAGE OPERATION
- Publication number 20240355389
- Publication date Oct 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Zheng-Jun Lin
- G11 - INFORMATION STORAGE

Bit-line or column circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Three-dimensional structure of memories for in-memory computing

Forming operation method of resistive random access memory

Differential programming of two-terminal resistive switching memory...

Spike current suppression in a memory array

Encoding additional states in a three-dimensional crosspoint memory...

Dynamic inhibit voltage to reduce write power for random-access memory

Signal processing apparatus and signal processing method

Systems and methods for efficient matrix multiplication

Memory device and method of forming the same

Overwrite read methods for resistance switching memory devices

Variable resistance non-volatile memory with a gate insulator film...

Resistive change element arrays

Drift aware read operations

Self-referenced and regulated sensing solution for phase change mem...

Silicon-on-insulator (SOI) circuitry for low-voltage memory bit-lin...

Memory device

Multi-level memory programming and readout

ReRAM memory array that includes ReRAM memory cells having a ReRAM...

Differential programming of two-terminal memory with program detect...

Non-volatile memory based compute-in-memory cell

Resistive random-access memory (ReRAM) cell optimized for reset and...

Partitioned memory architecture with single resistor or dual resist...

Multiple transistor architecture for three-dimensional memory arrays

Partitioned memory architecture with dual resistor memory elements...

Self-selecting memory array with horizontal access lines

Memory device and operating method thereof

Differential programming of two-terminal resistive switching memory...

Memory device including a plurality of stacked memory cells

Memory device, integrated circuit device and method

Access to a memory

Patents Applicationslast 30 patents

Drift Aware Read Operations

MULTI-STEP PROGRAMMING SCHEMES FOR PROGRAMMING CROSSBAR CIRCUITS

MEMORY DEVICE AND INITIALIZING METHOD THEREOF

CHALCOGENIDE-BASED MEMORY MATERIAL, AND MEMORY DEVICE AND ELECTRONI...

MEMORY CELL ARRAY UNIT

MULTIPLE TRANSISTOR ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS

IN-MEMORY COMPUTATION SYSTEM USING A SEGMENTED MEMORY ARCHITECTURE...

DATA PROCESSING METHOD BASED ON MEMRISTOR ARRAY, AND ELECTRONIC APP...

BIT-SERIAL INPUT SCHEMES FOR CROSSBAR CIRCUITS

SELF-SELECTING MEMORY ARRAY WITH HORIZONTAL ACCESS LINES

Assembly for carrying out a discrete Fourier transform

ANALOG HARDWARE REALIZATION OF NEURAL NETWORKS HAVING VARIABLE WEIGHTS

ReRAM MEMORY ARRAY THAT INCLUDES ReRAM MEMORY CELLS HAVING A ReRAM...

TRANSIMPEDANCE AMPLIFIERS FOR CROSSBAR CIRCUITS

DECODER ARCHITECTURE FOR MEMORY DEVICE

SEMICONDUCTOR DEVICE, OPERATING METHOD OF THE SEMICONDUCTOR DEVICE,...

COMPENSATING NON-IDEALITY OF A NEUROMORPHIC MEMORY DEVICE

MEMORY CIRCUIT COMPRISING ELECTRONIC CELLS AND A CONTROL CIRCUIT

VERTICAL MEMORY DEVICE INCLUDING SELECTOR WITH VARIABLE RESISTIVE M...

SENSE AMPLIFIER CIRCUIT, CORRESPONDING MEMORY DEVICE AND METHOD OF...

MEMORY AND OPERATION METHOD THEREOF

NON-VOLATILE MEMORY BASED COMPUTE-IN-MEMORY CELL

MEMORY AND READING, WRITING AND ERASING METHODS THEREOF

CROSSBAR CIRCUITS UTILIZING CURRENT-MODE DIGITAL-TO-ANALOG CONVERTERS

CONFIGURABLE RESISTIVITY FOR LINES IN A MEMORY DEVICE

RANDOM ACCESS MEMORY APPARATUS, MEMORY SYSTEM, AND METHOD FOR OPERA...

MEMORY MODULE

MEMORY DEVICE, INTEGRATED CIRCUIT DEVICE AND METHOD

IN-MEMORY COMPUTING (IMC) MEMORY DEVICE AND IN-MEMORY COMPUTING METHOD

RESISTIVE MEMORY WITH LOW VOLTAGE OPERATION