by changing characteristics of the charge pump

Industry

CPC
H03L7/1072

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Parent Industries

HELECTRICITY H03Electronic circuits H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES H03L7/00Automatic control of frequency or phase Synchronisation

Current Industry

H03L7/1072by changing characteristics of the charge pump

Industries

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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
Phase-rotating phase locked loop and method of controlling operatio...
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- Issue date May 16, 2017
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- Junhan Bae
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Information Patent Grant
Transceiver using technique for improvement of phase noise and swit...
- Patent number 9,647,609
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- Samsung Electronics Co., Ltd.
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Information Patent Grant
Phase frequency detector (PFD) circuit with improved lock time
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- Issue date Nov 22, 2016
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- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory storage device having clock and data recovery circuit
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Frequency control system with dual-input bias generator to separate...
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Autoconfigurable phase-locked loop which automatically maintains a...
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Information Patent Grant
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Phase locked loop (PLL) circuit with compensated bandwidth across p...
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Information Patent Grant
Phase frequency detector and charge pump for phase lock loop fast-l...
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Information Patent Grant
Apparatus and methods for adjusting phase-locked loop gain
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- Issue date Jun 9, 2015
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Information Patent Grant
Control method for selecting frequency band and related clock data...
- Patent number 9,008,253
- Issue date Apr 14, 2015
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- Tzu-Chien Tzeng
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

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PHASE-LOCKED LOOP WITH ADJUSTABLE BANDWIDTH
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PHYSIOLOGICAL INFORMATION COLLECTING SYSTEM AND TRANSCEIVER DEVICE...
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- H03 - BASIC ELECTRONIC CIRCUITRY

by changing characteristics of the charge pump

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

High gain detector techniques for low bandwidth low noise phase-loc...

High gain detector techniques for high bandwidth low noise phase-lo...

Apparatus and methods for timing offset compensation in frequency s...

Clock generator

Phase-locked loop with adjustable bandwidth

Spread spectrum clock generation apparatus and method, and display...

Physiological information collecting system and transceiver device...

Phase locked loop sampler and restorer

Adaptive bandwidth systems and methods

Reducing transient response in a phase-locked loop circuit

Digital phase locked loop circuit adjusting digital gain to maintai...

Clock recovery device and method

Phase locked loop circuit with charge pump up-down current mismatch...

Calibration and/or adjusting gain associated with voltage-controlle...

Reception circuit

Phase lock method

Clock and data recovery circuit module and phase lock method

Phase-rotating phase locked loop and method of controlling operatio...

Transceiver using technique for improvement of phase noise and swit...

Phase frequency detector (PFD) circuit with improved lock time

Memory storage device having clock and data recovery circuit

Frequency control system with dual-input bias generator to separate...

Adjusting voltage controlled oscillator gain

Autoconfigurable phase-locked loop which automatically maintains a...

Capacitive load PLL with calibration loop

Phase-rotating phase locked loop and method of controlling operatio...

Phase locked loop (PLL) circuit with compensated bandwidth across p...

Phase frequency detector and charge pump for phase lock loop fast-l...

Apparatus and methods for adjusting phase-locked loop gain

Control method for selecting frequency band and related clock data...

Patents Applicationslast 30 patents

FAST-LOCKING PHASE-LOCKED LOOP, FREQUENCY DIVIDER, AND COMMUNICATIO...

High Gain Detector Techniques for Low Bandwidth Low Noise Phase-Loc...

High Gain Detector Techniques for High Bandwidth Low Noise Phase-Lo...

RETIMER WITH SLICER LEVEL ADJUSTMENT

High Gain Detector Techniques for High Bandwidth Low Noise Phase-Lo...

Chirp linearity detector for radar

PHASE-LOCKED LOOP WITH ADJUSTABLE BANDWIDTH

Chirp linearity detector for radar

PHYSIOLOGICAL INFORMATION COLLECTING SYSTEM AND TRANSCEIVER DEVICE...

SPREAD SPECTRUM CLOCK GENERATION APPARATUS AND METHOD, AND DISPLAY...

PHASE LOCKED LOOP SAMPLER AND RESTORER

Clock Generator

DIGITAL PHASE LOCKED LOOP CIRCUIT ADJUSTING DIGITAL GAIN TO MAINTAI...

Phase Locked Loop Circuit With Charge Pump Up-Down Current Mismatch...

RECEPTION CIRCUIT

CALIBRATION AND/OR ADJUSTING GAIN ASSOCIATED WITH VOLTAGE-CONTROLLE...

MEMORY STORAGE DEVICE HAVING CLOCK AND DATA RECOVERY CIRCUIT

CAPACITIVE LOAD PLL WITH CALIBRATION LOOP

DELAY-LOCKED LOOP (DLL) CIRCUIT APPARATUS AND METHOD FOR LOCKING TH...

FREQUENCY CONTROL SYSTEM WITH DUAL-INPUT BIAS GENERATOR TO SEPARATE...

PHASE-ROTATING PHASE LOCKED LOOP AND METHOD OF CONTROLLING OPERATIO...

PLL FREQUENCY SYNTHESIZER WITH MULTI-CURVE VCO IMPLEMENTING CLOSED...

PHASE FREQUENCY DETECTOR AND CHARGE PUMP FOR PHASE LOCK LOOP FAST-L...

CONTROL METHOD FOR SELECTING FREQUENCY BAND AND RELATED CLOCK DATA...

HYBRID PHASE-LOCKED LOOP ARCHITECTURES

HYBRID PHASE-LOCKED LOOP ARCHITECTURES

CLOCK AND DATA RECOVERY CIRCUIT SELECTIVELY CONFIGURED TO OPERATE I...

CAPACTIVE LOAD PLL WITH CALIBRATION LOOP

TRANSCEIVER USING TECHNIQUE FOR IMPROVEMENT OF PHASE NOISE AND SWIT...

APPARATUS AND METHODS FOR ADJUSTING PHASE-LOCKED LOOP GAIN