Caching of specific data in cache memory

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CPC
G06F2212/45

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures

Current Industry

G06F2212/45Caching of specific data in cache memory

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Patents Grantslast 30 patents

Information Patent Grant
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Hybrid victim cache and write miss buffer with fence operation
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Two address translations from a single table look-aside buffer read
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Process-in-memory architecture based on resistive random access mem...
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Caching of specific data in cache memory

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Systems, methods, and apparatuses for dot production operations

Multi-indexed micro-operations cache for a processor

Address generator using memory access operation type for a computer...

Affinity groups in a micro-operations cache of a processor

Streaming engine with stream metadata saving for context switching

Write merging on stores with different privilege levels

Photographing method and related apparatus

Stream data unit with multiple head registers

Instruction execution scheduling using a hit/miss predictor

Systems and methods for bootstrap management

Systems, methods, and apparatus for tile configuration

Searching a subset of a database having search tokens

Graph memory engine

Thread replay to preserve state in a barrel processor

Method and apparatus for multi-learning rates of substitution in ne...

Macro-op cache data entry pointers distributed as initial pointers...

Method for migrating CPU state from an inoperable core to a spare core

Maintaining cache validity

Hybrid victim cache and write miss buffer with fence operation

Processing device and method of sharing storage between cache memor...

Methods and apparatus for multi-banked victim cache with dual datapath

Centralized access control for cloud relational database management...

System and method for a scalable pricing engine

Apparatus and method for managing data bias in a graphics processin...

Systems, methods, and apparatuses for matrix add, subtract, and mul...

Processing apparatus, method and system for executing data processi...

Data initialization techniques

Two address translations from a single table look-aside buffer read

System and method for improved performance in a multidimensional da...

Process-in-memory architecture based on resistive random access mem...

Patents Applicationslast 30 patents

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

INSERTING PREDEFINED PAD VALUES INTO A STREAM OF VECTORS

DATA INITIALIZATION TECHNIQUES

AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE

MACHINE-LEARNING-BASED UNSUPERVISED DATA CORRECTION

COMPUTING SYSTEM AND METHOD FOR POWER-SAVING COMPUTE-IN-MEMORY DESIGN

ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM

MULTI-TILE MEMORY MANAGEMENT

METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM

SYSTEMS, METHODS, AND APPARATUSES FOR TILE TRANSPOSE

SYSTEMS, METHODS, AND APPARATUSES FOR TILE MATRIX MULTIPLICATION AN...

BUILDING MANAGEMENT SYSTEM WITH SELF-IDENTIFIED NON-REDUNDANT DATA

SYSTEMS AND METHODS FOR DISTRIBUTED SCALABLE RAY PROCESSING

SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION

CACHE STRUCTURE AND UTILIZATION

ZERO LATENCY PREFETCHING IN CACHES

TRACKING STREAMING ENGINE VECTOR PREDICATES TO CONTROL PROCESSOR EX...

SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE

Incremental Stack Walking

FULLY PIPELINED READ-MODIFY-WRITE SUPPORT

MULTICORE SHARED CACHE OPERATION ENGINE

METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...

CONFIGURABLE CACHE FOR COHERENT SYSTEM

HOST DEVICE CACHING OF FLASH MEMORY ADDRESS MAPPINGS

SYSTEMS AND METHODS FOR POLICY EXECUTION PROCESSING

METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...

PADDING IN A STREAM OF MATRIX ELEMENTS

Biased Indirect Control Transfer Prediction

GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY

VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES