Clock disabling

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CPC
Y02B60/1221

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YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y02Climate change prevention Y02BINDEXING SCHEME RELATING TO CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS Y02B60/00Information and communication technologies [ICT] aiming at the reduction of own energy use

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Y02B60/1221Clock disabling

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Patents Grantslast 30 patents

Information Patent Grant
Information processing device and semiconductor device
- Patent number 10,203,740
- Issue date Feb 12, 2019
- TOSHIBA MEMORY CORPORATION
- Junichi Segawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective designation of multiple cores as bootstrap processor in a...
- Patent number 9,971,605
- Issue date May 15, 2018
- Via Technologies, Inc.
- G. Glenn Henry
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method to process signals having a common component
- Patent number 9,946,331
- Issue date Apr 17, 2018
- Samsung Electronics Co., Ltd.
- Karthik Ramani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power automatic calibration method for high frequency oscillators
- Patent number 9,939,839
- Issue date Apr 10, 2018
- Ambiq Micro, Inc.
- Stephen James Sheafor
- G05 - CONTROLLING REGULATING
Information Patent Grant
Semiconductor device comprising power gating device
- Patent number 9,915,993
- Issue date Mar 13, 2018
- Semiconductor Energy Laboratory Co., Ltd.
- Hikaru Tamura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Field device
- Patent number 9,904,347
- Issue date Feb 27, 2018
- Vega Grieshaber KG
- Volker Allgaier
- G05 - CONTROLLING REGULATING
Information Patent Grant
Multi-core hardware semaphore in non-architectural address space
- Patent number 9,898,303
- Issue date Feb 20, 2018
- Via Technologies, Inc.
- G. Glenn Henry
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Integrated circuit power supply regulator
- Patent number 9,891,639
- Issue date Feb 13, 2018
- STMicroelectronics (Rousset) SAS
- Jimmy Fort
- G05 - CONTROLLING REGULATING
Information Patent Grant
Propagation of updates to per-core-instantiated architecturally-vis...
- Patent number 9,891,928
- Issue date Feb 13, 2018
- Via Technologies, Inc.
- G. Glenn Henry
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Inter-core communication via uncore RAM
- Patent number 9,891,927
- Issue date Feb 13, 2018
- Via Technologies, Inc.
- G. Glenn Henry
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Semiconductor integrated circuit that determines power saving mode...
- Patent number 9,891,689
- Issue date Feb 13, 2018
- Kabushiki Kaisha Toshiba
- Yoshihisa Kohara
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Bus system in SoC
- Patent number 9,886,414
- Issue date Feb 6, 2018
- Samsung Electronics Co., Ltd.
- Jaegeun Yun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power autonomous peripheral management
- Patent number 9,880,583
- Issue date Jan 30, 2018
- Ambiq Micro, Inc.
- Stephen James Sheafor
- G05 - CONTROLLING REGULATING
Information Patent Grant
Power management
- Patent number 9,880,609
- Issue date Jan 30, 2018
- Micron Technology, Inc.
- Chang Wan Ha
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and memory chip
- Patent number 9,880,767
- Issue date Jan 30, 2018
- TOSHIBA MEMORY CORPORATION
- Hiroshi Sukegawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for security processor control over CPU power states
- Patent number 9,870,473
- Issue date Jan 16, 2018
- Advanced Micro Devices, Inc.
- Benjamin Tsien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage regulator control system
- Patent number 9,851,768
- Issue date Dec 26, 2017
- Hewlett Packard Enterprise Development LP
- Chanh V Hua
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selecting method, computer product, selecting apparatus, and record...
- Patent number 9,846,480
- Issue date Dec 19, 2017
- Fujitsu Limited
- Yukihito Kawabe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock gating using a delay circuit
- Patent number 9,837,995
- Issue date Dec 5, 2017
- QUALCOMM Incorporated
- Fadi Adel Hamdan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Approach to power reduction in floating-point operations
- Patent number 9,829,956
- Issue date Nov 28, 2017
- NVIDIA Corporation
- David Conrad Tannenbaum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handshake signaling for interface clock management
- Patent number 9,824,056
- Issue date Nov 21, 2017
- Rambus Inc.
- Yuanlong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating clock on demand
- Patent number 9,811,111
- Issue date Nov 7, 2017
- Atmel Corporation
- Sebastien Jouin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Core ID designation system for dynamically designated bootstrap pro...
- Patent number 9,811,344
- Issue date Nov 7, 2017
- Via Technologies, Inc.
- G. Glenn Henry
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and apparatus for a secure sleep state
- Patent number 9,811,475
- Issue date Nov 7, 2017
- Intel Corporation
- Krystof C. Zmudzinski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power distribution network (PDN) droop/overshoot mitigation
- Patent number 9,798,376
- Issue date Oct 24, 2017
- QUALCOMM Incorporated
- Dipti Ranjan Pal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Independent power collapse methodology
- Patent number 9,785,211
- Issue date Oct 10, 2017
- QUALCOMM Incorporated
- Christopher Edward Koob
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interconnect to communicate information uni-directionally
- Patent number 9,766,683
- Issue date Sep 19, 2017
- Intel Corporation
- Shaun M. Conrad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatuses for controlling thread contention
- Patent number 9,715,397
- Issue date Jul 25, 2017
- Intel Corporation
- Andrew Herdrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor power management based on class and content of instructions
- Patent number 9,710,277
- Issue date Jul 18, 2017
- Intel Corporation
- Venkateswara R. Madduri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory component with staggered power-down exit
- Patent number 9,704,560
- Issue date Jul 11, 2017
- Rambus Inc.
- Ian Shaeffer
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
INTERFACE CLOCK MANAGEMENT
- Publication number 20180107623
- Publication date Apr 19, 2018
- RAMBUS INC.
- Yuanlong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STAGGERED EXIT FROM MEMORY POWER-DOWN
- Publication number 20170372768
- Publication date Dec 28, 2017
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods And Apparatuses For Controlling Thread Contention
- Publication number 20170351534
- Publication date Dec 7, 2017
- Intel Corporation
- Andrew Herdrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interconnect To Communicate Information Uni-Directionally
- Publication number 20170010648
- Publication date Jan 12, 2017
- Intel Corporation
- Shaun M. Conrad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Detecting Full-System Idle State In Adaptive-Tick Kernels
- Publication number 20140380084
- Publication date Dec 25, 2014
- Paul E. McKenney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE REGULATOR CONTROL SYSTEM
- Publication number 20140380070
- Publication date Dec 25, 2014
- Hewlett-Packard Development Company, L.P.
- Chanh V. Hua
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OUT-OF-BAND SIGNAL DETECTION BY HOST INTERFACES OF STORAGE MODULES
- Publication number 20140380083
- Publication date Dec 25, 2014
- Tal Sharifie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMAGE PROCESSING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
- Publication number 20140347374
- Publication date Nov 27, 2014
- Masashi Hoshino
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR MANAGING CURRENT CONSUMPTION BY AN ELECTRON...
- Publication number 20140337647
- Publication date Nov 13, 2014
- Xicheng JIANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE PROCESSOR INSTRUCTION THROTTLING
- Publication number 20140317425
- Publication date Oct 23, 2014
- Apple Inc.
- Wei-Han Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interrupt Based Power State Management
- Publication number 20140310540
- Publication date Oct 16, 2014
- Apple Inc.
- Gilbert H. Herbeck
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTRONIC APPARATUS AND ASSOCIATED POWER MANAGEMENT METHOD
- Publication number 20140298059
- Publication date Oct 2, 2014
- Wistron Corporation
- Chia-Wei Kao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING CLOCK ON DEMAND
- Publication number 20140266333
- Publication date Sep 18, 2014
- Sebastien Jouin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHANGING SETTINGS FOR A TRANSIENT PERIOD ASSOCIATED WITH A DETERMIN...
- Publication number 20140258768
- Publication date Sep 11, 2014
- Yu Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods And Apparatuses For Reducing Power Consumption Of Processor...
- Publication number 20140258757
- Publication date Sep 11, 2014
- Ethan Schuchman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LSI AND INFORMATION PROCESSING SYSTEM
- Publication number 20140245048
- Publication date Aug 28, 2014
- RENESAS ELECTRONICS CORPORATION
- Yoshio SATO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INFORMATION PROCESSING APPARATUS, DEVICE CONTROL METHOD, AND COMPUT...
- Publication number 20140245039
- Publication date Aug 28, 2014
- Kabushiki Kaisha Toshiba
- Junichi Segawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INFORMATION PROCESSING APPARATUS, CONTROL METHOD FOR INFORMATION PR...
- Publication number 20140237225
- Publication date Aug 21, 2014
- Canon Kabushiki Kaisha
- Nobuaki Matsui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods And Apparatuses For Controlling Thread Contention
- Publication number 20140215240
- Publication date Jul 31, 2014
- Andrew Herdrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20140208142
- Publication date Jul 24, 2014
- Semiconductor Energy Laboratory Co., Ltd.
- HIKARU TAMURA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANAGEMENT
- Publication number 20140195734
- Publication date Jul 10, 2014
- Micron Technology, Inc.
- Chang Wan HA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT POWER SUPPLY REGULATOR
- Publication number 20140191578
- Publication date Jul 10, 2014
- STMicroelectronics (Rousset) SAS
- Jimmy Fort
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Idle Phase Prediction For Integrated Circuits
- Publication number 20140181553
- Publication date Jun 26, 2014
- Advanced Micro Devices, Inc.
- Yasuko Eckert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COARSE GATING OF CLOCK TREE ELEMENTS
- Publication number 20140176190
- Publication date Jun 26, 2014
- Advanced Micro Devices, Inc.
- Eric Quinnell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECT TO COMMUNICATE INFORMATION UNI-DIRECTIONALLY
- Publication number 20140181352
- Publication date Jun 26, 2014
- Shaun M. Conrad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic Clock and Power Gating with Decentralized Wake-Ups
- Publication number 20140167840
- Publication date Jun 19, 2014
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER STATE SYNCHRONIZATION IN A MULTI-CORE PROCESSOR
- Publication number 20140173301
- Publication date Jun 19, 2014
- VIA TECHNOLOGIES, INC.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK TERMINAL, METHOD FOR CONTROLLING THE SAME, AND NETWORK SYSTEM
- Publication number 20140157023
- Publication date Jun 5, 2014
- PANASONIC CORPORATION
- Osamu KATOU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING SYSTEM FREQUENCY TARGET MONITOR
- Publication number 20140149769
- Publication date May 29, 2014
- International Business Machines Corporation
- Bishop Brock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK FREQUENCY ADJUSTMENT FOR SEMI-CONDUCTOR DEVICES
- Publication number 20140140457
- Publication date May 22, 2014
- Imagination Technologies Limited
- Paul Rowland
- G06 - COMPUTING CALCULATING COUNTING

Clock disabling

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Information processing device and semiconductor device

Selective designation of multiple cores as bootstrap processor in a...

System and method to process signals having a common component

Low power automatic calibration method for high frequency oscillators

Semiconductor device comprising power gating device

Field device

Multi-core hardware semaphore in non-architectural address space

Integrated circuit power supply regulator

Propagation of updates to per-core-instantiated architecturally-vis...

Inter-core communication via uncore RAM

Semiconductor integrated circuit that determines power saving mode...

Bus system in SoC

Low power autonomous peripheral management

Power management

Memory system and memory chip

System and method for security processor control over CPU power states

Voltage regulator control system

Selecting method, computer product, selecting apparatus, and record...

Clock gating using a delay circuit

Approach to power reduction in floating-point operations

Handshake signaling for interface clock management

Generating clock on demand

Core ID designation system for dynamically designated bootstrap pro...

Methods and apparatus for a secure sleep state

Power distribution network (PDN) droop/overshoot mitigation

Independent power collapse methodology

Interconnect to communicate information uni-directionally

Methods and apparatuses for controlling thread contention

Processor power management based on class and content of instructions

Memory component with staggered power-down exit

Patents Applicationslast 30 patents

INTERFACE CLOCK MANAGEMENT

STAGGERED EXIT FROM MEMORY POWER-DOWN

Methods And Apparatuses For Controlling Thread Contention

Interconnect To Communicate Information Uni-Directionally

Detecting Full-System Idle State In Adaptive-Tick Kernels

VOLTAGE REGULATOR CONTROL SYSTEM

OUT-OF-BAND SIGNAL DETECTION BY HOST INTERFACES OF STORAGE MODULES

IMAGE PROCESSING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT

SYSTEMS AND METHODS FOR MANAGING CURRENT CONSUMPTION BY AN ELECTRON...

MULTI-CORE PROCESSOR INSTRUCTION THROTTLING

Interrupt Based Power State Management

ELECTRONIC APPARATUS AND ASSOCIATED POWER MANAGEMENT METHOD

GENERATING CLOCK ON DEMAND

CHANGING SETTINGS FOR A TRANSIENT PERIOD ASSOCIATED WITH A DETERMIN...

Methods And Apparatuses For Reducing Power Consumption Of Processor...

LSI AND INFORMATION PROCESSING SYSTEM

INFORMATION PROCESSING APPARATUS, DEVICE CONTROL METHOD, AND COMPUT...

INFORMATION PROCESSING APPARATUS, CONTROL METHOD FOR INFORMATION PR...

Methods And Apparatuses For Controlling Thread Contention

SEMICONDUCTOR DEVICE

POWER MANAGEMENT

INTEGRATED CIRCUIT POWER SUPPLY REGULATOR

Idle Phase Prediction For Integrated Circuits

COARSE GATING OF CLOCK TREE ELEMENTS

INTERCONNECT TO COMMUNICATE INFORMATION UNI-DIRECTIONALLY

Dynamic Clock and Power Gating with Decentralized Wake-Ups

POWER STATE SYNCHRONIZATION IN A MULTI-CORE PROCESSOR

NETWORK TERMINAL, METHOD FOR CONTROLLING THE SAME, AND NETWORK SYSTEM

COMPUTING SYSTEM FREQUENCY TARGET MONITOR

CLOCK FREQUENCY ADJUSTMENT FOR SEMI-CONDUCTOR DEVICES