controlled by a single instruction

Industry

CPC
G06F9/3887

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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F9/00Arrangements for programme control

Current Industry

G06F9/3887controlled by a single instruction

Industries

Patents Grantslast 30 patents

Information Patent Grant
Controlling the number of powered vector lanes via a register field
- Patent number 12,366,906
- Issue date Jul 22, 2025
- Texas Instruments Incorporated
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scheduling tasks using swap flags
- Patent number 12,367,046
- Issue date Jul 22, 2025
- Imagination Technologies Limited
- Simon Nield
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coalescing adjacent gather/scatter operations
- Patent number 12,360,774
- Issue date Jul 15, 2025
- Intel Corporation
- Andrew T. Forsyth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable accelerator for data-dependent, irregular operations
- Patent number 12,353,887
- Issue date Jul 8, 2025
- Google LLC
- Rahul Nagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjusting instruction execution for enhanced security
- Patent number 12,353,886
- Issue date Jul 8, 2025
- QUALCOMM Incorporated
- Fabrice Marinet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sparse SIMD cross-lane processing unit
- Patent number 12,340,227
- Issue date Jun 24, 2025
- Google LLC
- Rahul Nagarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Base plus offset addressing for load/store messages
- Patent number 12,333,310
- Issue date Jun 17, 2025
- Intel Corporation
- John Wiegert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vertical and horizontal broadcast of shared operands
- Patent number 12,327,124
- Issue date Jun 10, 2025
- Advanced Micro Devices, Inc.
- Sateesh Lagudu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions and logic to provide SIMD SM4 cryptographic block ciph...
- Patent number 12,323,515
- Issue date Jun 3, 2025
- Intel Corporation
- Sean M. Gulley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implicit fence for write messages
- Patent number 12,321,310
- Issue date Jun 3, 2025
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Task synchronization for accelerated deep learning
- Patent number 12,314,218
- Issue date May 27, 2025
- Cerebras Systems Inc.
- Sean Lie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Garbage collecting wavefront
- Patent number 12,314,760
- Issue date May 27, 2025
- Advanced Micro Devices, Inc.
- Anthony Gutierrez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-performance multi-literal matching algorithm
- Patent number 12,307,248
- Issue date May 20, 2025
- Intel Corporation
- Hao Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient data sharing for graphics data processing operations
- Patent number 12,306,771
- Issue date May 20, 2025
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual vector arithmetic logic unit
- Patent number 12,299,413
- Issue date May 13, 2025
- Advanced Micro Devices, Inc.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Streaming engine with stream metadata saving for context switching
- Patent number 12,299,446
- Issue date May 13, 2025
- Texas Instruments Incorporated
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing native support for generic pointers in a graphics process...
- Patent number 12,299,766
- Issue date May 13, 2025
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sparse optimizations for a matrix accelerator architecture
- Patent number 12,293,431
- Issue date May 6, 2025
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Analytical model to optimize deep learning models
- Patent number 12,293,299
- Issue date May 6, 2025
- Amazon Technologies, Inc.
- Vinod Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions for fused multiply-add operations with variable precis...
- Patent number 12,288,062
- Issue date Apr 29, 2025
- Intel Corporation
- Dipankar Das
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pair merge execution units for microinstructions
- Patent number 12,271,737
- Issue date Apr 8, 2025
- Marvell Asia Pte, Ltd.
- David Kravitz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing device and method of sharing storage between cache memor...
- Patent number 12,265,484
- Issue date Apr 1, 2025
- Advanced Micro Devices, Inc.
- Maxim V. Kazakov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Forming constant extensions in the same execute packet in a VLIW pr...
- Patent number 12,265,827
- Issue date Apr 1, 2025
- Texas Instruments Incorporated
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generative AI accelerator apparatus using in-memory compute chiplet...
- Patent number 12,260,223
- Issue date Mar 25, 2025
- d-MATRIX CORPORATION
- Sudeep Bhoja
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector processor architectures
- Patent number 12,254,316
- Issue date Mar 18, 2025
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Frequency scaling for per-core accelerator assignments
- Patent number 12,248,783
- Issue date Mar 11, 2025
- Intel Corporation
- Stephen T. Palermo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wavefront selection and execution
- Patent number 12,248,789
- Issue date Mar 11, 2025
- Advanced Micro Devices, Inc.
- Maxim V. Kazakov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Software compilation for networked processing system
- Patent number 12,242,828
- Issue date Mar 4, 2025
- Advanced Micro Devices, Inc.
- Norman Vernon Douglas Stewart
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware optimized string table for accelerated relational database...
- Patent number 12,242,481
- Issue date Mar 4, 2025
- Oracle International Corporation
- James Kearney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data initialization techniques
- Patent number 12,242,414
- Issue date Mar 4, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
LARGE INTEGER MULTIPLICATION ENHANCEMENTS FOR GRAPHICS ENVIRONMENT
- Publication number 20250231764
- Publication date Jul 17, 2025
- Intel Corporation
- Supratim Pal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISMS FOR CONTROLLING CO-EXECUTION OF HETEROGENEOUS COOPERATIV...
- Publication number 20250231796
- Publication date Jul 17, 2025
- NVIDIA Corp.
- Neal Clayton Crago
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK ACCELERATOR WITH PARAMETERS RESIDENT ON CHIP
- Publication number 20250232164
- Publication date Jul 17, 2025
- Google LLC
- Olivier Temam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTING INSTRUCTION EXECUTION FOR ENHANCED SECURITY
- Publication number 20250224962
- Publication date Jul 10, 2025
- QUALCOMM Incorporated
- Fabrice MARINET
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAMING ENGINE WITH MULTI DIMENSIONAL CIRCULAR ADDRESSING SELECTA...
- Publication number 20250217301
- Publication date Jul 3, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGHER RADIX FAST FOURIER TRANSFORM IMPLEMENTATION ON GRAPHICS PROC...
- Publication number 20250218102
- Publication date Jul 3, 2025
- QUALCOMM Incorporated
- Skyler SZOT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTIONS FOR FUSED MULTIPLY-ADD OPERATIONS WITH VARIABLE PRECIS...
- Publication number 20250217142
- Publication date Jul 3, 2025
- Intel Corporation
- Dipankar DAS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPARSE OPTIMIZATIONS FOR A MATRIX ACCELERATOR ARCHITECTURE
- Publication number 20250209564
- Publication date Jun 26, 2025
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR STALLED ROUTING ASSOCIATED WITH NUMBER-THEORETIC- TR...
- Publication number 20250208879
- Publication date Jun 26, 2025
- Intel Corporation
- Raghavan KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR ORCHESTRATING STAGES OF THREAD SYNCHRONIZATION
- Publication number 20250181427
- Publication date Jun 5, 2025
- NVIDIA Corporation
- Harold Carter Edwards
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR DATA ACCESS AND SHARING
- Publication number 20250173308
- Publication date May 29, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE FOR BLOCK SPARSE OPERATIONS ON A SYSTOLIC ARRAY
- Publication number 20250166114
- Publication date May 22, 2025
- Intel Corporation
- Abhishek Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LIGHTWEIGHT OUT OF ORDER SCHEDULER FOR PROCESSING UNITS
- Publication number 20250165257
- Publication date May 22, 2025
- The Trustees of Princeton University
- Ishita Chaturvedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING INSTRUCTIONS AT A PROCESSING UNIT CONFIGURED TO PERFORM...
- Publication number 20250165368
- Publication date May 22, 2025
- Imagination Technologies Limited
- Daniel Wilkinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Forming Constant Extensions in the Same Execute Packet in a VLIW Pr...
- Publication number 20250156186
- Publication date May 15, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA INITIALIZATION TECHNIQUES
- Publication number 20250156371
- Publication date May 15, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Group Thread Dispatch for Graph Streaming Processor
- Publication number 20250156190
- Publication date May 15, 2025
- Blaize Inc.
- Kota Vamsi Krishna Darsi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADVANCED WAVELET FILTERING FOR ACCELERATED DEEP LEARNING
- Publication number 20250131237
- Publication date Apr 24, 2025
- Cerebras Systems Inc.
- Michael MORRISON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR TRANSFORMATION IN PARALLEL WITH ARITHMETIC OPERATION
- Publication number 20250130808
- Publication date Apr 24, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Mujibur Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BARRIER STATE SAVE AND RESTORE FOR PREEMPTION IN A GRAPHICS ENVIRON...
- Publication number 20250130848
- Publication date Apr 24, 2025
- Intel Corporation
- Vasanth Ranganathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR UNIT WITH OPPORTUNISTIC INTER-PATH RECONVERGENCE
- Publication number 20250131525
- Publication date Apr 24, 2025
- Purdue Research Foundation
- Milind Kulkarni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR HETEROGENEOUS COMPUTING
- Publication number 20250123881
- Publication date Apr 17, 2025
- Intel Corporation
- Rajesh M. SANKARAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AI ACCELERATOR APPARATUS USING FULL MESH CONNECTIVITY CHIPLET DEVIC...
- Publication number 20250123984
- Publication date Apr 17, 2025
- d-MATRIX CORPORATION
- Jayaprakash BALACHANDRAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Tiled Processor Communication Fabric
- Publication number 20250124643
- Publication date Apr 17, 2025
- Apple Inc.
- Adam J. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXCEPTION HANDLING FOR DEBUGGING IN A GRAPHICS ENVIRONMENT
- Publication number 20250118003
- Publication date Apr 10, 2025
- Intel Corporation
- John Wiegert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-CORE IMPLEMENTATION OF ADVANCED REDUCED INSTRUCTION SET COMPUTER...
- Publication number 20250117220
- Publication date Apr 10, 2025
- Microsoft Technology Licensing, LLC
- Skand HURKAT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PERFORMING INSTRUCTIONS TO CONVERT TO 16-BI...
- Publication number 20250117217
- Publication date Apr 10, 2025
- Intel Corporation
- Alexander F. HEINECKE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Updated Origin Coordinates for Traversal of Ray Tracing Acceleratio...
- Publication number 20250111591
- Publication date Apr 3, 2025
- Apple Inc.
- Ali Rabbani Rankouhi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR HAVING MULTIPLE CORES, SHARED CORE EXTENSION LOGIC, AND S...
- Publication number 20250110737
- Publication date Apr 3, 2025
- Intel Corporation
- Eran SHIFER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONVERSION OPERATIONS AND SPECIAL VALUE USE CASES SUPPORTING 8-BIT...
- Publication number 20250110733
- Publication date Apr 3, 2025
- Intel Corporation
- Jorge Eduardo Parra Osorio
- G06 - COMPUTING CALCULATING COUNTING

controlled by a single instruction

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Controlling the number of powered vector lanes via a register field

Scheduling tasks using swap flags

Coalescing adjacent gather/scatter operations

Programmable accelerator for data-dependent, irregular operations

Adjusting instruction execution for enhanced security

Sparse SIMD cross-lane processing unit

Base plus offset addressing for load/store messages

Vertical and horizontal broadcast of shared operands

Instructions and logic to provide SIMD SM4 cryptographic block ciph...

Implicit fence for write messages

Task synchronization for accelerated deep learning

Garbage collecting wavefront

High-performance multi-literal matching algorithm

Efficient data sharing for graphics data processing operations

Dual vector arithmetic logic unit

Streaming engine with stream metadata saving for context switching

Providing native support for generic pointers in a graphics process...

Sparse optimizations for a matrix accelerator architecture

Analytical model to optimize deep learning models

Instructions for fused multiply-add operations with variable precis...

Pair merge execution units for microinstructions

Processing device and method of sharing storage between cache memor...

Forming constant extensions in the same execute packet in a VLIW pr...

Generative AI accelerator apparatus using in-memory compute chiplet...

Vector processor architectures

Frequency scaling for per-core accelerator assignments

Wavefront selection and execution

Software compilation for networked processing system

Hardware optimized string table for accelerated relational database...

Data initialization techniques

Patents Applicationslast 30 patents

LARGE INTEGER MULTIPLICATION ENHANCEMENTS FOR GRAPHICS ENVIRONMENT

MECHANISMS FOR CONTROLLING CO-EXECUTION OF HETEROGENEOUS COOPERATIV...

NEURAL NETWORK ACCELERATOR WITH PARAMETERS RESIDENT ON CHIP

ADJUSTING INSTRUCTION EXECUTION FOR ENHANCED SECURITY

STREAMING ENGINE WITH MULTI DIMENSIONAL CIRCULAR ADDRESSING SELECTA...

HIGHER RADIX FAST FOURIER TRANSFORM IMPLEMENTATION ON GRAPHICS PROC...

INSTRUCTIONS FOR FUSED MULTIPLY-ADD OPERATIONS WITH VARIABLE PRECIS...

SPARSE OPTIMIZATIONS FOR A MATRIX ACCELERATOR ARCHITECTURE

TECHNIQUES FOR STALLED ROUTING ASSOCIATED WITH NUMBER-THEORETIC- TR...

TECHNIQUES FOR ORCHESTRATING STAGES OF THREAD SYNCHRONIZATION

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

ARCHITECTURE FOR BLOCK SPARSE OPERATIONS ON A SYSTOLIC ARRAY

LIGHTWEIGHT OUT OF ORDER SCHEDULER FOR PROCESSING UNITS

PROCESSING INSTRUCTIONS AT A PROCESSING UNIT CONFIGURED TO PERFORM...

Forming Constant Extensions in the Same Execute Packet in a VLIW Pr...

DATA INITIALIZATION TECHNIQUES

Group Thread Dispatch for Graph Streaming Processor

ADVANCED WAVELET FILTERING FOR ACCELERATED DEEP LEARNING

VECTOR TRANSFORMATION IN PARALLEL WITH ARITHMETIC OPERATION

BARRIER STATE SAVE AND RESTORE FOR PREEMPTION IN A GRAPHICS ENVIRON...

GRAPHICS PROCESSOR UNIT WITH OPPORTUNISTIC INTER-PATH RECONVERGENCE

SYSTEMS, METHODS, AND APPARATUSES FOR HETEROGENEOUS COMPUTING

AI ACCELERATOR APPARATUS USING FULL MESH CONNECTIVITY CHIPLET DEVIC...

Tiled Processor Communication Fabric

EXCEPTION HANDLING FOR DEBUGGING IN A GRAPHICS ENVIRONMENT

IN-CORE IMPLEMENTATION OF ADVANCED REDUCED INSTRUCTION SET COMPUTER...

SYSTEMS AND METHODS FOR PERFORMING INSTRUCTIONS TO CONVERT TO 16-BI...

Updated Origin Coordinates for Traversal of Ray Tracing Acceleratio...

PROCESSOR HAVING MULTIPLE CORES, SHARED CORE EXTENSION LOGIC, AND S...

CONVERSION OPERATIONS AND SPECIAL VALUE USE CASES SUPPORTING 8-BIT...