Controlling the number of delay elements connected in series in the ring oscillator

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H03L7/0997

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HELECTRICITY H03Electronic circuits H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES H03L7/00Automatic control of frequency or phase Synchronisation

Current Industry

H03L7/0997Controlling the number of delay elements connected in series in the ring oscillator

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Patents Grantslast 30 patents

Information Patent Grant
Adaptive oscillator for clock generation
- Patent number 11,936,382
- Issue date Mar 19, 2024
- Advanced Micro Devices, Inc.
- Joyce Cheuk Wai Wong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage droop monitoring circuits, system-on chips and methods of o...
- Patent number 11,531,385
- Issue date Dec 20, 2022
- Samsung Electronics Co., Ltd.
- Yong-Hwan Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage controlled oscillator structure and phase-locked loop
- Patent number 11,509,318
- Issue date Nov 22, 2022
- Shanghai Huali Microelectronics Corporation
- Yuchun Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Time-to-digital converter
- Patent number 11,435,702
- Issue date Sep 6, 2022
- Mitsubishi Electric Corporation
- Yoshiaki Morino
- G04 - HOROLOGY
Information Patent Grant
Calibration of sampling-based multiplying delay-locked loop (MDLL)
- Patent number 11,411,569
- Issue date Aug 9, 2022
- QUALCOMM Incorporated
- Masoud Moslehi Bajestan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-stage clock generator using mutual injection for multi-phase...
- Patent number 11,063,600
- Issue date Jul 13, 2021
- Apple Inc.
- Wenbo Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Time to digital converter with increased range and sensitivity
- Patent number 11,003,142
- Issue date May 11, 2021
- INNOPHASE INC.
- Nicolo Testi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital phase locked loop for low jitter applications
- Patent number 10,958,276
- Issue date Mar 23, 2021
- International Business Machines Corporation
- Jingdong Deng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase-locked loop and method for the same
- Patent number 10,944,409
- Issue date Mar 9, 2021
- Intel Corporation
- Igal Kushnir
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
DLL circuit having variable clock divider
- Patent number 10,931,289
- Issue date Feb 23, 2021
- Micron Technology, Inc.
- Yasuo Satoh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Access schemes for section-based data protection in a memory device
- Patent number 10,855,295
- Issue date Dec 1, 2020
- Micron Technology, Inc.
- Richard E. Fackenthal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Adaptive clocking scheme
- Patent number 10,804,906
- Issue date Oct 13, 2020
- Avago Technologies International Sales Pte. Limited
- Paul Penzes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Maintaining a digitally controlled oscillator at an ideal state by...
- Patent number 10,797,712
- Issue date Oct 6, 2020
- International Business Machines Corporation
- Pawel Owczarczyk
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Self-tuning digital clock generator
- Patent number 10,790,837
- Issue date Sep 29, 2020
- QUALCOMM Incorporated
- Touqeer Azam
- G01 - MEASURING TESTING
Information Patent Grant
Intermittent tuning of an oscillator
- Patent number 10,778,235
- Issue date Sep 15, 2020
- Nuvoton Technology Corporation
- Yuval Kirschner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital phase locked loop for low jitter applications
- Patent number 10,693,471
- Issue date Jun 23, 2020
- International Business Machines Corporation
- Jingdong Deng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital phase locked loop for low jitter applications
- Patent number 10,686,452
- Issue date Jun 16, 2020
- International Business Machines Corporation
- Jingdong Deng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Divider-less fractional PLL architecture
- Patent number 10,659,061
- Issue date May 19, 2020
- Intel Corporation
- Elias Nassar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital phase locked loop for low jitter applications
- Patent number 10,615,806
- Issue date Apr 7, 2020
- International Business Machines Corporation
- Jingdong Deng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Locked loop circuit with configurable second error input
- Patent number 10,587,275
- Issue date Mar 10, 2020
- Movellus Circuits, Inc.
- Jeffrey Fredenburg
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital phase locked loop for low jitter applications
- Patent number 10,566,981
- Issue date Feb 18, 2020
- International Business Machines Corporation
- Jingdong Deng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Time measuring circuitry and distance measuring apparatus
- Patent number 10,558,171
- Issue date Feb 11, 2020
- Kabushiki Kaisha Toshiba
- Satoshi Kondo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Time to digital converter with increased range and sensitivity
- Patent number 10,503,122
- Issue date Dec 10, 2019
- INNOPHASE, INC.
- Nicolo Testi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Phase-locked loop, phase-locking method, and communication unit
- Patent number 10,483,989
- Issue date Nov 19, 2019
- SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Takashi Masuda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Ring oscillator-based timer
- Patent number 10,483,953
- Issue date Nov 19, 2019
- Texas Instruments Incorporated
- George Reitsma
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
DLL circuit having variable clock divider
- Patent number 10,461,759
- Issue date Oct 29, 2019
- Micron Technology, Inc.
- Yasuo Satoh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Adaptive oscillator for clock generation
- Patent number 10,382,014
- Issue date Aug 13, 2019
- ATI Technologies ULC
- Joyce Cheuk Wai Wong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reference-locked clock generator
- Patent number 10,326,457
- Issue date Jun 18, 2019
- INNOPHASE, INC.
- Roc Berenguer Perez
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital phase locked loop for low jitter applications
- Patent number 10,164,647
- Issue date Dec 25, 2018
- International Business Machines Corporation
- Jingdong Deng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital, reconfigurable frequency and delay generator with phase me...
- Patent number 10,158,365
- Issue date Dec 18, 2018
- Movellus Circuits, Inc.
- Muhammad Faisal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
DELAY LINE, A DELAY LOCKED LOOP CIRCUIT AND A SEMICONDUCTOR APPARAT...
- Publication number 20230051365
- Publication date Feb 16, 2023
- SK HYNIX INC.
- Kyeong Min KIM
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
VOLTAGE CONTROLLED OSCILLATOR STRUCTURE AND PHASE-LOCKED LOOP
- Publication number 20220029628
- Publication date Jan 27, 2022
- SHANGHAI HUALI MICROELECTRONICS CORPORATION
- Yuchun Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Calibration of Sampling-Based Multiplying Delay-Locked Loop (MDLL)
- Publication number 20210409029
- Publication date Dec 30, 2021
- QUALCOMM Incorporated
- Masoud Moslehi Bajestan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DELAY LINE, A DELAY LOCKED LOOP CIRCUIT AND A SEMICONDUCTOR APPARAT...
- Publication number 20210152166
- Publication date May 20, 2021
- SK HYNIX INC.
- Kyeong Min KIM
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DELAY LINE, A DELAY LOCKED LOOP CIRCUIT AND A SEMICONDUCTOR APPARAT...
- Publication number 20210143807
- Publication date May 13, 2021
- SK HYNIX INC.
- Kyeong Min KIM
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ACCESS SCHEMES FOR SECTION-BASED DATA PROTECTION IN A MEMORY DEVICE
- Publication number 20200259497
- Publication date Aug 13, 2020
- Micron Technology, Inc.
- Richard E. Fackenthal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHASE-LOCKED LOOP AND METHOD FOR THE SAME
- Publication number 20200235744
- Publication date Jul 23, 2020
- Intel IP Corporation
- Igal KUSHNIR
- G04 - HOROLOGY
Information Patent Application
GENERATION OF PULSE WIDTH MODULATED (PWM) PULSES
- Publication number 20200177169
- Publication date Jun 4, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Subrahmanya Bharathi AKONDY
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS
- Publication number 20200145012
- Publication date May 7, 2020
- International Business Machines Corporation
- Jingdong DENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Intermittent Tuning of an Oscillator
- Publication number 20200136629
- Publication date Apr 30, 2020
- Nuvoton Technology Corporation
- Yuval Kirschner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TIME TO DIGITAL CONVERTER WITH INCREASED RANGE AND SENSITIVITY
- Publication number 20200110369
- Publication date Apr 9, 2020
- Innophase, Inc.
- Nicolo Testi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
VOLTAGE DROOP MONITORING CIRCUITS, SYSTEM-ON CHIPS AND METHODS OF O...
- Publication number 20200089299
- Publication date Mar 19, 2020
- Samsung Electronics Co., Ltd.
- Yong-Hwan KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DLL CIRCUIT HAVING VARIABLE CLOCK DIVIDER
- Publication number 20190363724
- Publication date Nov 28, 2019
- Micron Technology, Inc.
- Yasuo Satoh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIVIDER-LESS FRACTIONAL PLL ARCHITECTURE
- Publication number 20190334533
- Publication date Oct 31, 2019
- Intel Corporation
- Elias Nassar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ADAPTIVE OSCILLATOR FOR CLOCK GENERATION
- Publication number 20190319609
- Publication date Oct 17, 2019
- ATI Technologies ULC
- Joyce Cheuk Wai WONG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RING OSCILLATOR-BASED TIMER
- Publication number 20190245528
- Publication date Aug 8, 2019
- TEXAS INSTRUMENTS INCORPORATED
- George REITSMA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOCKED LOOP CIRCUIT WITH CONFIGURABLE SECOND ERROR INPUT
- Publication number 20190190525
- Publication date Jun 20, 2019
- Movellus Circuits Incorporated
- Jeffrey Fredenburg
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TIME TO DIGITAL CONVERTER WITH INCREASED RANGE AND SENSITIVITY
- Publication number 20190056698
- Publication date Feb 21, 2019
- Innophase Inc.
- Nicolo Testi
- G04 - HOROLOGY
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REFERENCE-LOCKED CLOCK GENERATOR
- Publication number 20190052280
- Publication date Feb 14, 2019
- Innophase, Inc.
- Roc Berenguer Perez
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS
- Publication number 20190036534
- Publication date Jan 31, 2019
- International Business Machines Corporation
- Jingdong DENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS FOR COMPENSATION OF SIGNAL PATH DELAY VARIATION
- Publication number 20190007055
- Publication date Jan 3, 2019
- Analog Devices, Inc.
- Reuben P. Nelson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS
- Publication number 20180316358
- Publication date Nov 1, 2018
- International Business Machines Corporation
- Jingdong DENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS
- Publication number 20180316357
- Publication date Nov 1, 2018
- International Business Machines Corporation
- Jingdong DENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE CLOCKING SCHEME
- Publication number 20180309455
- Publication date Oct 25, 2018
- Avago Technologies General IP (Singapore) PTE. LTD.
- Paul PENZES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS
- Publication number 20180278258
- Publication date Sep 27, 2018
- International Business Machines Corporation
- Jingdong DENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIME MEASURING CIRCUITRY AND DISTANCE MEASURING APPARATUS
- Publication number 20180267481
- Publication date Sep 20, 2018
- Kabushiki Kaisha Toshiba
- Satoshi KONDO
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHASE-LOCKED LOOP, PHASE-LOCKING METHOD, AND COMMUNICATION UNIT
- Publication number 20180234098
- Publication date Aug 16, 2018
- Sony Semiconductor Solution Corporation
- Takashi Masuda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ADAPTIVE OSCILLATOR FOR CLOCK GENERATION
- Publication number 20180183413
- Publication date Jun 28, 2018
- ATI Technologies ULC
- Joyce Cheuk Wai Wong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS
- Publication number 20180083640
- Publication date Mar 22, 2018
- International Business Machines Corporation
- Jingdong DENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS
- Publication number 20180048321
- Publication date Feb 15, 2018
- International Business Machines Corporation
- Jingdong DENG
- G06 - COMPUTING CALCULATING COUNTING

Controlling the number of delay elements connected in series in the ring oscillator

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Adaptive oscillator for clock generation

Voltage droop monitoring circuits, system-on chips and methods of o...

Voltage controlled oscillator structure and phase-locked loop

Time-to-digital converter

Calibration of sampling-based multiplying delay-locked loop (MDLL)

Multi-stage clock generator using mutual injection for multi-phase...

Time to digital converter with increased range and sensitivity

Digital phase locked loop for low jitter applications

Phase-locked loop and method for the same

DLL circuit having variable clock divider

Access schemes for section-based data protection in a memory device

Adaptive clocking scheme

Maintaining a digitally controlled oscillator at an ideal state by...

Self-tuning digital clock generator

Intermittent tuning of an oscillator

Digital phase locked loop for low jitter applications

Digital phase locked loop for low jitter applications

Divider-less fractional PLL architecture

Digital phase locked loop for low jitter applications

Locked loop circuit with configurable second error input

Digital phase locked loop for low jitter applications

Time measuring circuitry and distance measuring apparatus

Time to digital converter with increased range and sensitivity

Phase-locked loop, phase-locking method, and communication unit

Ring oscillator-based timer

DLL circuit having variable clock divider

Adaptive oscillator for clock generation

Reference-locked clock generator

Digital phase locked loop for low jitter applications

Digital, reconfigurable frequency and delay generator with phase me...

Patents Applicationslast 30 patents

DELAY LINE, A DELAY LOCKED LOOP CIRCUIT AND A SEMICONDUCTOR APPARAT...

VOLTAGE CONTROLLED OSCILLATOR STRUCTURE AND PHASE-LOCKED LOOP

Calibration of Sampling-Based Multiplying Delay-Locked Loop (MDLL)

DELAY LINE, A DELAY LOCKED LOOP CIRCUIT AND A SEMICONDUCTOR APPARAT...

DELAY LINE, A DELAY LOCKED LOOP CIRCUIT AND A SEMICONDUCTOR APPARAT...

ACCESS SCHEMES FOR SECTION-BASED DATA PROTECTION IN A MEMORY DEVICE

PHASE-LOCKED LOOP AND METHOD FOR THE SAME

GENERATION OF PULSE WIDTH MODULATED (PWM) PULSES

DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS

Intermittent Tuning of an Oscillator

TIME TO DIGITAL CONVERTER WITH INCREASED RANGE AND SENSITIVITY

VOLTAGE DROOP MONITORING CIRCUITS, SYSTEM-ON CHIPS AND METHODS OF O...

DLL CIRCUIT HAVING VARIABLE CLOCK DIVIDER

DIVIDER-LESS FRACTIONAL PLL ARCHITECTURE

ADAPTIVE OSCILLATOR FOR CLOCK GENERATION

RING OSCILLATOR-BASED TIMER

LOCKED LOOP CIRCUIT WITH CONFIGURABLE SECOND ERROR INPUT

TIME TO DIGITAL CONVERTER WITH INCREASED RANGE AND SENSITIVITY

REFERENCE-LOCKED CLOCK GENERATOR

DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS

APPARATUS AND METHODS FOR COMPENSATION OF SIGNAL PATH DELAY VARIATION

DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS

DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS

ADAPTIVE CLOCKING SCHEME

DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS

TIME MEASURING CIRCUITRY AND DISTANCE MEASURING APPARATUS

PHASE-LOCKED LOOP, PHASE-LOCKING METHOD, AND COMMUNICATION UNIT

ADAPTIVE OSCILLATOR FOR CLOCK GENERATION

DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS

DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS