Details of time redundant execution on a single processing unit

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F11/00Error detection Error correction Monitoring

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G06F11/1497Details of time redundant execution on a single processing unit

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Patents Grantslast 30 patents

Information Patent Grant
Buffer checker for task processing fault detection
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- Imagination Technologies Limited
- Wei Shao
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Information Patent Grant
Information processing device, control method, and non-transitory c...
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Information Patent Grant
Buffer checker for task processing fault detection
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System and method for event-driven live migration of multi-process...
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Redundant communications for multi-chip systems
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- Sriramakrishnan Govindarajan
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Information Patent Grant
Buffer checker for task processing fault detection
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- Wei Shao
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Information Patent Grant
Method, apparatus, and computer-readable storage medium having inst...
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- Volkswagen Aktiengesellschaft
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Information Patent Grant
System and method for event-driven live migration of multi-process...
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Information Patent Grant
Cache protection through cache
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Information Patent Grant
Memory and data reading method including performing N read operatio...
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- Issue date Aug 11, 2020
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Information Patent Grant
Method and device for recognizing hardware errors in microprocessors
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Information Patent Grant
Automated test generation for multi-interface enterprise virtualiza...
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- International Business Machines Corporation
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Information Patent Grant
System and methods for hardware-software cooperative pipeline error...
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Information Patent Grant
Railway safety critical systems with task redundancy and asymmetric...
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Apparatus and method for enhancing reliability of watchdog circuit...
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Automated test generation for multi-interface and multi-platform en...
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Information Patent Grant
Automated test generation for multi-interface and multi-platform en...
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- International Business Machines Corporation
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Information Patent Grant
Fault tolerant processor for real-time systems
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Information Patent Grant
System and method for event-driven live migration of multi-process...
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- Issue date May 7, 2019
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Information Patent Grant
Railway safety critical systems with task redundancy and asymmetric...
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Method for performing failsafe calculations
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Microprocessor device with reset timer
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Metric payload ingestion and replay
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Automated test generation for multi-interface enterprise virtualiza...
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Information Patent Grant
Redundant transactions for detection of timing sensitive errors
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- International Business Machines Corporation
- Harold W. Cain
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Information Patent Grant
Automated test generation for multi-interface enterprise virtualiza...
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Information Patent Grant
Electronic fault detection unit
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Information Patent Grant
Railway safety critical systems with task redundancy and asymmetric...
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Information Patent Grant
Fault-tolerant system and fault-tolerant operating method capable o...
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- Issue date Dec 6, 2016
- Industrial Technology Research Institute
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- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power reduction in thyristor random access memory
- Patent number 9,496,021
- Issue date Nov 15, 2016
- Kilopass Technology, Inc.
- Harry Luan
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Buffer Checker for Task Processing Fault Detection
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- Publication date Jun 19, 2025
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- Wei Shao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUFFER CHECKER FOR TASK PROCESSING FAULT DETECTION
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DEVICE AND METHOD FOR COMPUTING DRIVING PARAMETERS
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- Publication date Feb 22, 2024
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- B60 - VEHICLES IN GENERAL
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REDUNDANT COMMUNICATIONS FOR MULTI-CHIP SYSTEMS
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- Publication date May 25, 2023
- TEXAS INSTRUMENTS INCORPORATED
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- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Buffer Checker for Task Processing Fault Detection
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- Publication date Nov 3, 2022
- Imagination Technologies Limited
- Wei Shao
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Information Patent Application
REDUNDANT COMMUNICATIONS FOR MULTI-CHIP SYSTEMS
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METHOD, APPARATUS, AND COMPUTER-READABLE STORAGE MEDIUM HAVING INST...
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RAILWAY SAFETY CRITICAL SYSTEMS WITH TASK REDUNDANCY AND ASYMMETRIC...
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Information Patent Application
DATA REPLICATION BASED ON DATA-DRIVEN RECOVERY OBJECTIVES
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- International Business Machines Corporation
- Ravindra R. Sure
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Information Patent Application
APPARATUS AND METHOD FOR ENHANCING RELIABILITY OF WATCHDOG CIRCUIT...
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- Publication date Mar 14, 2019
- Hyundai Motor Company
- Chang Seok You
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATED TEST GENERATION FOR MULTI-INTERFACE ENTERPRISE VIRTUALIZA...
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- Publication date Mar 22, 2018
- International Business Machines Corporation
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UTILIZING A PROCESSOR WITH A TIME OF DAY CLOCK ERROR
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- Publication date Sep 29, 2016
- International Business Machines Corporation
- Sachin Gupta
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Information Patent Application
SYNCHRONIZATION AND ORDER DETECTION IN A MEMORY SYSTEM
- Publication number 20160188423
- Publication date Jun 30, 2016
- International Business Machines Corporation
- Patrick J. Meaney
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Information Patent Application
CONTROL OF MICROPROCESSORS
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- Publication date Nov 26, 2015
- NORDIC SEMICONDUCTOR ASA
- Lasse OLSEN
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Information Patent Application
Adaptive Operation of Three Dimensional Memory
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- Publication date Dec 4, 2014
- SANDISK TECHNOLOGIES INC.
- Chris Avila
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Adaptive Operation of Three Dimensional Memory
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- Chris Nga Yee Avila
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FAULT-TOLERANT SYSTEM AND FAULT-TOLERANT OPERATING METHOD
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- Publication date Oct 2, 2014
- Industrial Technology Research Institute
- Yung-Chang Chang
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Information Patent Application
SYNCHRONIZATION AND ORDER DETECTION IN A MEMORY SYSTEM
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- Publication date Sep 18, 2014
- International Business Machines Corporation
- Patrick J. Meaney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RAILWAY SAFETY CRITICAL SYSTEMS WITH TASK REDUNDANCY AND ASYMMETRIC...
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- Siemens Industry, Inc.
- Claus Weber
- B61 - RAILWAYS
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REDUNDANT EXECUTION FOR RELIABILITY IN A SUPER FMA ALU
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- Publication date Jul 3, 2014
- Brian J. Hickmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND SYSTEM USING THE SAME
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- Publication date Sep 26, 2013
- RENESAS ELECTRONICS CORPORATION
- Hiromichi YAMADA
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Information Patent Application
HARDWARE RECOVERY IN MULTI-THREADED PROCESSOR
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- Publication date Jul 25, 2013
- International Business Machines Corporation
- Fadi Y. Busaba
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Information Patent Application
ERROR RECOVERY IN A DATA PROCESSING APPARATUS
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- Publication date Jun 27, 2013
- ARM Limited
- Guillaume SCHON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING APPARATUS WITH AN EXECUTION PIPELINE AND ERROR RECO...
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- ARM Limited
- Guillaume Schon
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DATA MIGRATION MANAGEMENT APPARATUS AND INFORMATION PROCESSING SYSTEM
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- Publication date Jan 3, 2013
- Hitachi, Ltd.
- Akihiko SAKAGUCHI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RFID TAG, TAG READER/WRITER, DATA MANAGEMENT SYSTEM AND DATA MANAGE...
- Publication number 20120278676
- Publication date Nov 1, 2012
- JAPAN NUS CO., LTD
- Nobuyuki Teraura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA MIGRATION MANAGEMENT APPARATUS AND INFORMATION PROCESSING SYSTEM
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- Publication date Sep 6, 2012
- Hitachi, Ltd.
- Akihiko SAKAGUCHI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Device for Performing Failsafe Hardware-Independent Floa...
- Publication number 20120221897
- Publication date Aug 30, 2012
- Siemens Aktiengesellschaft
- Jan Richter
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Information Patent Application
CONTROL SYSTEM
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- Publication date Mar 1, 2012
- Mitsubishi Electric Corporation
- Toshinori MATSUI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Detecting Soft Errors Via Selective Re-Execution
- Publication number 20120047398
- Publication date Feb 23, 2012
- Xavier Vera
- G06 - COMPUTING CALCULATING COUNTING

Details of time redundant execution on a single processing unit

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Buffer checker for task processing fault detection

Information processing device, control method, and non-transitory c...

Buffer checker for task processing fault detection

System and method for event-driven live migration of multi-process...

Redundant communications for multi-chip systems

Buffer checker for task processing fault detection

Method, apparatus, and computer-readable storage medium having inst...

System and method for event-driven live migration of multi-process...

Cache protection through cache

Memory and data reading method including performing N read operatio...

Method and device for recognizing hardware errors in microprocessors

Automated test generation for multi-interface enterprise virtualiza...

System and methods for hardware-software cooperative pipeline error...

Railway safety critical systems with task redundancy and asymmetric...

Apparatus and method for enhancing reliability of watchdog circuit...

Automated test generation for multi-interface and multi-platform en...

Automated test generation for multi-interface and multi-platform en...

Fault tolerant processor for real-time systems

System and method for event-driven live migration of multi-process...

Railway safety critical systems with task redundancy and asymmetric...

Method for performing failsafe calculations

Microprocessor device with reset timer

Metric payload ingestion and replay

Automated test generation for multi-interface enterprise virtualiza...

Redundant transactions for detection of timing sensitive errors

Automated test generation for multi-interface enterprise virtualiza...

Electronic fault detection unit

Railway safety critical systems with task redundancy and asymmetric...

Fault-tolerant system and fault-tolerant operating method capable o...

Power reduction in thyristor random access memory

Patents Applicationslast 30 patents

Buffer Checker for Task Processing Fault Detection

BUFFER CHECKER FOR TASK PROCESSING FAULT DETECTION

DEVICE AND METHOD FOR COMPUTING DRIVING PARAMETERS

REDUNDANT COMMUNICATIONS FOR MULTI-CHIP SYSTEMS

Buffer Checker for Task Processing Fault Detection

REDUNDANT COMMUNICATIONS FOR MULTI-CHIP SYSTEMS

METHOD, APPARATUS, AND COMPUTER-READABLE STORAGE MEDIUM HAVING INST...

RAILWAY SAFETY CRITICAL SYSTEMS WITH TASK REDUNDANCY AND ASYMMETRIC...

DATA REPLICATION BASED ON DATA-DRIVEN RECOVERY OBJECTIVES

APPARATUS AND METHOD FOR ENHANCING RELIABILITY OF WATCHDOG CIRCUIT...

AUTOMATED TEST GENERATION FOR MULTI-INTERFACE ENTERPRISE VIRTUALIZA...

UTILIZING A PROCESSOR WITH A TIME OF DAY CLOCK ERROR

SYNCHRONIZATION AND ORDER DETECTION IN A MEMORY SYSTEM

CONTROL OF MICROPROCESSORS

Adaptive Operation of Three Dimensional Memory

Adaptive Operation of Three Dimensional Memory

FAULT-TOLERANT SYSTEM AND FAULT-TOLERANT OPERATING METHOD

SYNCHRONIZATION AND ORDER DETECTION IN A MEMORY SYSTEM

RAILWAY SAFETY CRITICAL SYSTEMS WITH TASK REDUNDANCY AND ASYMMETRIC...

REDUNDANT EXECUTION FOR RELIABILITY IN A SUPER FMA ALU

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND SYSTEM USING THE SAME

HARDWARE RECOVERY IN MULTI-THREADED PROCESSOR

ERROR RECOVERY IN A DATA PROCESSING APPARATUS

DATA PROCESSING APPARATUS WITH AN EXECUTION PIPELINE AND ERROR RECO...

DATA MIGRATION MANAGEMENT APPARATUS AND INFORMATION PROCESSING SYSTEM

RFID TAG, TAG READER/WRITER, DATA MANAGEMENT SYSTEM AND DATA MANAGE...

DATA MIGRATION MANAGEMENT APPARATUS AND INFORMATION PROCESSING SYSTEM

Method and Device for Performing Failsafe Hardware-Independent Floa...

CONTROL SYSTEM

Detecting Soft Errors Via Selective Re-Execution