Details of translation look-aside buffer [TLB]

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures

Current Industry

G06F2212/68Details of translation look-aside buffer [TLB]

Industries

Patents Grantslast 30 patents

Information Patent Grant
Translation lookaside buffer prewarming
- Patent number 11,954,044
- Issue date Apr 9, 2024
- Texas Instruments Incorporated
- Daniel Brad Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer overflow trapping
- Patent number 11,947,465
- Issue date Apr 2, 2024
- International Business Machines Corporation
- Michael Peter Lyons
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling memory requests
- Patent number 11,941,430
- Issue date Mar 26, 2024
- Imagination Technologies Limited
- Mark Landers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dual multiplication units in a data path
- Patent number 11,921,643
- Issue date Mar 5, 2024
- Texas Instruments Incorporated
- Mujibur Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for shared virtual memory to manage data coher...
- Patent number 11,921,635
- Issue date Mar 5, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtualized-in-hardware input output memory management
- Patent number 11,907,542
- Issue date Feb 20, 2024
- MIPS Tech, LLC
- Sanjay Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tracking memory block access frequency in processor-based devices
- Patent number 11,868,269
- Issue date Jan 9, 2024
- Microsoft Technology Licensing, LLC
- Andrew Joseph Rushing
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mapping non-typed memory access to typed memory access
- Patent number 11,868,268
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Kenneth Marion Curewitz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serdes link training
- Patent number 11,860,812
- Issue date Jan 2, 2024
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Software-hardware memory management modes
- Patent number 11,853,225
- Issue date Dec 26, 2023
- Texas Instruments Incorporated
- Timothy D. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile storage controller with partial logical-to-physical (L...
- Patent number 11,836,092
- Issue date Dec 5, 2023
- INNOGRIT TECHNOLOGIES CO., LTD.
- Bo Fu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing mapping data structures to minimize sequentially writt...
- Patent number 11,836,076
- Issue date Dec 5, 2023
- Micron Technology, Inc.
- Naveen Bolisetty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for vector sorting using vector permutation logic
- Patent number 11,829,300
- Issue date Nov 28, 2023
- Texas Instruments Incorporated
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible storage and optimized search for multiple page sizes in a...
- Patent number 11,822,487
- Issue date Nov 21, 2023
- Ampere Computing LLC
- George Van Horn Leming
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory management unit for multi-threaded architecture
- Patent number 11,822,472
- Issue date Nov 21, 2023
- Ceremorphic, Inc.
- Radhika Ponnamaneni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
History-based selective cache line invalidation requests
- Patent number 11,822,479
- Issue date Nov 21, 2023
- Advanced Micro Devices, Inc.
- Paul J. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Process dedicated in-memory translation lookaside buffers (TLBs) (m...
- Patent number 11,803,482
- Issue date Oct 31, 2023
- Microsoft Technology Licensing, LLC
- Madhavan Thirukkurungudi Venkataraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory scanning methods and apparatus
- Patent number 11,797,678
- Issue date Oct 24, 2023
- Intel Corporation
- Michael LeMay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural processing device and method for using shared page table the...
- Patent number 11,789,791
- Issue date Oct 17, 2023
- Rebellions Inc.
- Seokju Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation support for a virtual cache
- Patent number 11,775,445
- Issue date Oct 3, 2023
- International Business Machines Corporation
- Markus Helms
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Supervisory memory management unit
- Patent number 11,775,443
- Issue date Oct 3, 2023
- Hewlett Packard Enterprise Development LP
- Derek Alan Sherlock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for broadcast cache invalidation
- Patent number 11,775,436
- Issue date Oct 3, 2023
- Open Text SA ULC
- Michael Gerard Jaskiewicz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for memory management in a graphics processing...
- Patent number 11,768,781
- Issue date Sep 26, 2023
- Intel Corporation
- Niranjan L. Cooray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache tuning device, cache tuning method, and cache tuning program
- Patent number 11,748,269
- Issue date Sep 5, 2023
- Nippon Telegraph and Telephone Corporation
- Tetsuro Nakamura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tracking streaming engine vector predicates to control processor ex...
- Patent number 11,748,270
- Issue date Sep 5, 2023
- Texas Instruments Incorporated
- Duc Quang Bui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power aware translation lookaside buffer invalidation optimization
- Patent number 11,741,017
- Issue date Aug 29, 2023
- Apple Inc.
- Kutty Banerjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for efficient process-based compartmentalization
- Patent number 11,741,018
- Issue date Aug 29, 2023
- Intel Corporation
- David M. Durham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dual issue multiply instructions
- Patent number 11,734,194
- Issue date Aug 22, 2023
- Texas Instruments Incorporated
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, system for early page granular hints from a PCIe...
- Patent number 11,726,927
- Issue date Aug 15, 2023
- Intel Corporation
- Ishwar Agarwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory address translation
- Patent number 11,709,782
- Issue date Jul 25, 2023
- ARM Limited
- Paolo Monti
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
HYBRID SCHEME FOR PERFORMING TRANSLATION LOOKASIDE BUFFER (TLB) SHO...
- Publication number 20240152465
- Publication date May 9, 2024
- VMware LLC
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SHARED VIRTUAL MEMORY TO MANAGE DATA COHER...
- Publication number 20240152457
- Publication date May 9, 2024
- Intel Corporation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAPPING NON-TYPED MEMORY ACCESS TO TYPED MEMORY ACCESS
- Publication number 20240152464
- Publication date May 9, 2024
- Micron Technology, Inc.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC TUNING OF LARGER PAGES DURING RUNTIME
- Publication number 20240134805
- Publication date Apr 25, 2024
- International Business Machines Corporation
- Naijie Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOFTWARE-HARDWARE MEMORY MANAGEMENT MODES
- Publication number 20240126703
- Publication date Apr 18, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy D. ANDERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Translating Virtual Memory Addresses to Physical Memory Addresses
- Publication number 20240111687
- Publication date Apr 4, 2024
- MIPS Tech, LLC
- James Robinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESS DEDICATED IN-MEMORY TRANSLATION LOOKASIDE BUFFERS (TLBs) (m...
- Publication number 20240028522
- Publication date Jan 25, 2024
- Microsoft Technology Licensing, LLC
- Madhavan Thirukkurungudi VENKATARAMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL PROCESSING DEVICE AND METHOD FOR USING SHARED PAGE TABLE THE...
- Publication number 20230418695
- Publication date Dec 28, 2023
- Rebellions Inc.
- Seokju Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION LOOKASIDE BUFFER (TLB) PREFETCHER WITH MULTI- LEVEL TLB...
- Publication number 20230418763
- Publication date Dec 28, 2023
- Benoy Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ARRAY PAGE TABLE WALK
- Publication number 20230401158
- Publication date Dec 14, 2023
- Micron Technology, Inc.
- Perry V. Lea
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR AVOIDANCE FOR PARTIALLY PROGRAMMED BLOCKS OF A MEMORY DEVICE
- Publication number 20230393991
- Publication date Dec 7, 2023
- Li-Te Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR BROADCAST CACHE INVALIDATION
- Publication number 20230367714
- Publication date Nov 16, 2023
- Open Text SA ULC
- Michael Gerard Jaskiewicz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR ADDRESS TRANSLATION
- Publication number 20230333990
- Publication date Oct 19, 2023
- Samsung Electronics Co., Ltd.
- Daniel Lee HELMICK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING FINE GRAIN ACCESS TO PACKAGE MEMORY
- Publication number 20230315334
- Publication date Oct 5, 2023
- Intel Corporation
- Abhishek Anil SHARMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Storage Array Invalidation Maintenance
- Publication number 20230305965
- Publication date Sep 28, 2023
- Apple Inc.
- Sreevathsa Ramachandra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCAL MEMORY TRANSLATION TABLE
- Publication number 20230298128
- Publication date Sep 21, 2023
- Intel Corporation
- David Puffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-STALLING, NON-BLOCKING TRANSLATION LOOKASIDE BUFFER INVALIDATION
- Publication number 20230259461
- Publication date Aug 17, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Brad WU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ACCESS COMPRESSION USING CLEAR CODE FOR TILE PIXELS
- Publication number 20230244610
- Publication date Aug 3, 2023
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reducing Translation Lookaside Buffer Searches for Splintered Pages
- Publication number 20230236988
- Publication date Jul 27, 2023
- Apple Inc.
- John D. Pape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Management Unit for Multi-Threaded Architecture
- Publication number 20230222059
- Publication date Jul 13, 2023
- Ceremorphic, Inc.
- Radhika PONNAMANENI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS OF OPERATING HOST DEVICE AND STORAGE DEVICE, AND ELECTRONIC...
- Publication number 20230195648
- Publication date Jun 22, 2023
- Samsung Electronics Co., Ltd.
- Daejun PARK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE PROCESSOR AND STORAGE DEVICE
- Publication number 20230195688
- Publication date Jun 22, 2023
- Samsung Electronics Co., Ltd.
- Hyungjin KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLEMENTING MAPPING DATA STRUCTURES TO MINIMIZE SEQUENTIALLY WRITT...
- Publication number 20230185712
- Publication date Jun 15, 2023
- Micron Technology, Inc.
- Naveen Bolisetty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ADDRESS TRANSLATION
- Publication number 20230135599
- Publication date May 4, 2023
- ARM Limited
- Paolo MONTI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COALESCING ADJACENT GATHER/SCATTER OPERATIONS
- Publication number 20230137812
- Publication date May 4, 2023
- Intel Corporation
- Andrew T. Forsyth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HISTORY-BASED SELECTIVE CACHE LINE INVALIDATION REQUESTS
- Publication number 20230137467
- Publication date May 4, 2023
- ADVANCED MICRO DEVICES, INC.
- Paul J. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Handling Memory Requests
- Publication number 20230119485
- Publication date Apr 20, 2023
- Imagination Technologies Limited
- Mark Landers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRACKING MEMORY BLOCK ACCESS FREQUENCY IN PROCESSOR-BASED DEVICES
- Publication number 20230107660
- Publication date Apr 6, 2023
- Microsoft Technology Licensing, LLC
- Andrew Joseph RUSHING
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUALIZED-IN-HARDWARE INPUT OUTPUT MEMORY MANAGEMENT
- Publication number 20230105881
- Publication date Apr 6, 2023
- MIPS Tech, LLC
- Sanjay Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION LOOKASIDE BUFFER ENTRY ALLOCATION SYSTEM AND METHOD
- Publication number 20230103230
- Publication date Mar 30, 2023
- Edwin Pang
- G06 - COMPUTING CALCULATING COUNTING

Details of translation look-aside buffer [TLB]

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Translation lookaside buffer prewarming

Buffer overflow trapping

Handling memory requests

Method and apparatus for dual multiplication units in a data path

Method and apparatus for shared virtual memory to manage data coher...

Virtualized-in-hardware input output memory management

Tracking memory block access frequency in processor-based devices

Mapping non-typed memory access to typed memory access

Serdes link training

Software-hardware memory management modes

Non-volatile storage controller with partial logical-to-physical (L...

Implementing mapping data structures to minimize sequentially writt...

Method and apparatus for vector sorting using vector permutation logic

Flexible storage and optimized search for multiple page sizes in a...

Memory management unit for multi-threaded architecture

History-based selective cache line invalidation requests

Process dedicated in-memory translation lookaside buffers (TLBs) (m...

Memory scanning methods and apparatus

Neural processing device and method for using shared page table the...

Translation support for a virtual cache

Supervisory memory management unit

System and method for broadcast cache invalidation

Apparatus and method for memory management in a graphics processing...

Cache tuning device, cache tuning method, and cache tuning program

Tracking streaming engine vector predicates to control processor ex...

Power aware translation lookaside buffer invalidation optimization

Apparatus and method for efficient process-based compartmentalization

Method and apparatus for dual issue multiply instructions

Method, apparatus, system for early page granular hints from a PCIe...

Memory address translation

Patents Applicationslast 30 patents

HYBRID SCHEME FOR PERFORMING TRANSLATION LOOKASIDE BUFFER (TLB) SHO...

METHOD AND APPARATUS FOR SHARED VIRTUAL MEMORY TO MANAGE DATA COHER...

MAPPING NON-TYPED MEMORY ACCESS TO TYPED MEMORY ACCESS

DYNAMIC TUNING OF LARGER PAGES DURING RUNTIME

SOFTWARE-HARDWARE MEMORY MANAGEMENT MODES

Translating Virtual Memory Addresses to Physical Memory Addresses

PROCESS DEDICATED IN-MEMORY TRANSLATION LOOKASIDE BUFFERS (TLBs) (m...

NEURAL PROCESSING DEVICE AND METHOD FOR USING SHARED PAGE TABLE THE...

TRANSLATION LOOKASIDE BUFFER (TLB) PREFETCHER WITH MULTI- LEVEL TLB...

MEMORY ARRAY PAGE TABLE WALK

ERROR AVOIDANCE FOR PARTIALLY PROGRAMMED BLOCKS OF A MEMORY DEVICE

SYSTEM AND METHOD FOR BROADCAST CACHE INVALIDATION

SYSTEMS AND METHODS FOR ADDRESS TRANSLATION

PROVIDING FINE GRAIN ACCESS TO PACKAGE MEMORY

Storage Array Invalidation Maintenance

LOCAL MEMORY TRANSLATION TABLE

NON-STALLING, NON-BLOCKING TRANSLATION LOOKASIDE BUFFER INVALIDATION

MEMORY ACCESS COMPRESSION USING CLEAR CODE FOR TILE PIXELS

Reducing Translation Lookaside Buffer Searches for Splintered Pages

Memory Management Unit for Multi-Threaded Architecture

METHODS OF OPERATING HOST DEVICE AND STORAGE DEVICE, AND ELECTRONIC...

MULTI-CORE PROCESSOR AND STORAGE DEVICE

IMPLEMENTING MAPPING DATA STRUCTURES TO MINIMIZE SEQUENTIALLY WRITT...

MEMORY ADDRESS TRANSLATION

COALESCING ADJACENT GATHER/SCATTER OPERATIONS

HISTORY-BASED SELECTIVE CACHE LINE INVALIDATION REQUESTS

Handling Memory Requests

TRACKING MEMORY BLOCK ACCESS FREQUENCY IN PROCESSOR-BASED DEVICES

VIRTUALIZED-IN-HARDWARE INPUT OUTPUT MEMORY MANAGEMENT

TRANSLATION LOOKASIDE BUFFER ENTRY ALLOCATION SYSTEM AND METHOD