Digit-parallel adding or subtracting

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G06F2207/4924

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled

Current Industry

G06F2207/4924Digit-parallel adding or subtracting

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Patents Grantslast 30 patents

Information Patent Grant
Overlap propagation operation
- Patent number 9,928,031
- Issue date Mar 27, 2018
- ARM Limited
- Neil Burgess
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Binary and decimal adder unit
- Patent number 6,292,819
- Issue date Sep 18, 2001
- International Business Machines Corporation
- Wolfgang Bultmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit arrangement for decimal arithmetic
- Patent number 5,086,406
- Issue date Feb 4, 1992
- NEC Corporation
- Shinichi Okugawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Predetermination of result conditions of decimal operations
- Patent number 4,890,253
- Issue date Dec 26, 1989
- International Business Machines Corporation
- John D. Jabusch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-speed binary and decimal arithmetic logic unit
- Patent number 4,866,656
- Issue date Sep 12, 1989
- American Telephone and Telegraph Company, AT&T Bell Laboratories
- InSeok S. Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
BCD adder circuit
- Patent number 4,805,131
- Issue date Feb 14, 1989
- Digital Equipment Corporation
- Matthew J. Adiletta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for performing addition and subtraction
- Patent number 4,719,590
- Issue date Jan 12, 1988
- James A. Aman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Intermediate decimal correction for sequential addition
- Patent number 4,718,033
- Issue date Jan 5, 1988
- Hewlett-Packard Company
- Terrence C. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bit sliced decimal adding/subtracting unit for multi-digit decimal...
- Patent number 4,707,799
- Issue date Nov 17, 1987
- Kabushiki Kaisha Toshiba
- Tadashi Ishikawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Equal nine apparatus for supporting absolute value subtracts on dec...
- Patent number 4,638,450
- Issue date Jan 20, 1987
- Honeywell Information Systems Inc.
- Brian L. Stoffers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Central processing unit having built-in BCD operation
- Patent number 4,638,300
- Issue date Jan 20, 1987
- Advanced Micro Devices, Inc.
- Michael J. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic logic unit
- Patent number 4,559,608
- Issue date Dec 17, 1985
- Harris Corporation
- William R. Young
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decimal arithmetic unit
- Patent number 4,536,854
- Issue date Aug 20, 1985
- Hitachi, Ltd.
- Tomoatsu Yanagita
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Expandable arithmetic logic unit
- Patent number 4,263,660
- Issue date Apr 21, 1981
- Motorola, Inc.
- Jerry E. Prioste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Correction circuit for arithmetic operations with non-hexadecimal o...
- Patent number 4,197,587
- Issue date Apr 8, 1980
- Siemens Aktiengesellschaft
- Helmut Stettmaier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Binary or BCD adder with precorrected result
- Patent number 4,172,288
- Issue date Oct 23, 1979
- Motorola, Inc.
- Jack L. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-digit arithmetic logic circuit for fast parallel execution
- Patent number 4,139,894
- Issue date Feb 13, 1979
- U.S. Philips Corporation
- Jogchum Reitsma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed binary and binary coded decimal adder
- Patent number 4,138,731
- Issue date Feb 6, 1979
- Fujitsu Limited
- Shigemi Kamimoto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and means for tracking digit significance in arithmetic oper...
- Patent number 4,110,831
- Issue date Aug 29, 1978
- International Business Machines Corporation
- Glen G. Langdon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprogram controlled binary decimal coded byte operator device
- Patent number 4,041,290
- Issue date Aug 9, 1977
- Compagnie Internationale Pour L'Informatique
- Jean-Louis Fressineau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit arrangement for adding and subtracting
- Patent number 4,010,359
- Issue date Mar 1, 1977
- Olympia Werke AG
- Gerald Weber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic unit for a digital data processor
- Patent number 4,001,570
- Issue date Jan 4, 1977
- International Business Machines Corporation
- David N. Gooding
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit microprocessor with parallel binary adder having...
- Patent number 3,991,307
- Issue date Nov 9, 1976
- MOS Technology, Inc.
- Charles Ingerham Peddle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for packed BCD sign arithmetic employing a two...
- Patent number 3,937,941
- Issue date Feb 10, 1976
- Signetics Corporation
- David Larry Zemel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decimal adder
- Patent number 3,935,438
- Issue date Jan 27, 1976
- Vereinigte Flugtechnische Werke-Fokker GmbH.
- Ulrich Grupe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3752394
- Patent number 3,752,394
- Issue date Aug 14, 1973
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3751650
- Patent number 3,751,650
- Issue date Aug 7, 1973
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3707621
- Patent number 3,707,621
- Issue date Dec 26, 1972
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3683163
- Patent number 3,683,163
- Issue date Aug 8, 1972
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3648244
- Patent number 3,648,244
- Issue date Mar 7, 1972
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Highly parallel structure for fast multi cycle binary and decimal a...
- Publication number 20060031279
- Publication date Feb 9, 2006
- International Business Machines Corporation
- Wilhelm Haller
- G06 - COMPUTING CALCULATING COUNTING

Digit-parallel adding or subtracting

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Overlap propagation operation

Binary and decimal adder unit

Circuit arrangement for decimal arithmetic

Predetermination of result conditions of decimal operations

High-speed binary and decimal arithmetic logic unit

BCD adder circuit

Apparatus and method for performing addition and subtraction

Intermediate decimal correction for sequential addition

Bit sliced decimal adding/subtracting unit for multi-digit decimal...

Equal nine apparatus for supporting absolute value subtracts on dec...

Central processing unit having built-in BCD operation

Arithmetic logic unit

Decimal arithmetic unit

Expandable arithmetic logic unit

Correction circuit for arithmetic operations with non-hexadecimal o...

Binary or BCD adder with precorrected result

Multi-digit arithmetic logic circuit for fast parallel execution

High speed binary and binary coded decimal adder

Method and means for tracking digit significance in arithmetic oper...

Microprogram controlled binary decimal coded byte operator device

Circuit arrangement for adding and subtracting

Arithmetic unit for a digital data processor

Integrated circuit microprocessor with parallel binary adder having...

Method and apparatus for packed BCD sign arithmetic employing a two...

Decimal adder

3752394

3751650

3707621

3683163

3648244

Patents Applicationslast 30 patents

Highly parallel structure for fast multi cycle binary and decimal a...