each bitgroup having two new bits

Industry

CPC
G06F7/5338

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled

Current Industry

G06F7/5338each bitgroup having two new bits

Industries

Please log in for detailed analytics

Patents Grantslast 30 patents

Information Patent Grant
Full adder cell with improved power efficiency
- Patent number 11,294,631
- Issue date Apr 5, 2022
- NVIDIA Corp.
- Ilyas Elkin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Full adder cell with improved power efficiency
- Patent number 11,169,779
- Issue date Nov 9, 2021
- NVIDIA Corp.
- Ilyas Elkin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for processing an instruction matrix specifyin...
- Patent number 11,163,720
- Issue date Nov 2, 2021
- Intel Corporation
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable multiply-add array hardware
- Patent number 10,970,043
- Issue date Apr 6, 2021
- Alibaba Group Holding Limited
- Liang Han
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable multiply-add array hardware
- Patent number 10,678,507
- Issue date Jun 9, 2020
- Alibaba Group Holding Limited
- Liang Han
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing circuitry
- Patent number 10,649,732
- Issue date May 12, 2020
- Cirrus Logic, Inc.
- John Paul Lesso
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for processing an instruction matrix specifyin...
- Patent number 10,289,605
- Issue date May 14, 2019
- Intel Corporation
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for processing an instruction matrix specifyin...
- Patent number 9,886,416
- Issue date Feb 6, 2018
- Intel Corporation
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Montgomery multiplication method for performing final modular reduc...
- Patent number 9,811,318
- Issue date Nov 7, 2017
- Samsung Electronics Co., Ltd.
- Jonghoon Shin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified computation systems and methods for iterative multiplicatio...
- Patent number 9,804,998
- Issue date Oct 31, 2017
- Intel Corporation
- Alexander Sergeevich Rumyantsev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Extensible iterative multiplier
- Patent number 9,563,401
- Issue date Feb 7, 2017
- Wave Computing, Inc.
- Samit Chaudhuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fused multiply add pipeline
- Patent number 9,430,190
- Issue date Aug 30, 2016
- International Business Machines Corporation
- Son Dao Trong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Formal verification of booth multipliers
- Patent number 9,384,167
- Issue date Jul 5, 2016
- Mentor Graphics Corporation
- Michael L. Case
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for generating partial product for polynomial...
- Patent number 9,354,843
- Issue date May 31, 2016
- Samsung Electronics Co., Ltd.
- Hyeong-Seok Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fused booth encoder multiplexer
- Patent number 9,274,751
- Issue date Mar 1, 2016
- International Business Machines Corporation
- Wendy Ann Belluomini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared integer, floating point, polynomial, and vector multiplier
- Patent number 9,176,709
- Issue date Nov 3, 2015
- Apple Inc.
- Junji Sugisawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor executing super instruction matrix with register file con...
- Patent number 9,053,292
- Issue date Jun 9, 2015
- Soft Machines, Inc.
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for multiply instructions in data processors
- Patent number 8,996,601
- Issue date Mar 31, 2015
- Advanced Micro Devices, Inc.
- Scott A. Hilker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method to implement a matrix multiply unit of a broadban...
- Patent number 8,943,119
- Issue date Jan 27, 2015
- MicroUnity Systems Engineering, Inc.
- Craig Hansen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for synthesising a sum of addends operation an...
- Patent number 8,943,447
- Issue date Jan 27, 2015
- Imagination Technologies, Limited
- Theo Alan Drane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing multiplication in a processor
- Patent number 8,868,634
- Issue date Oct 21, 2014
- Advanced Micro Devices, Inc.
- Srikanth Arekapudi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,793,299
- Issue date Jul 29, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,745,119
- Issue date Jun 3, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,725,787
- Issue date May 13, 2014
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of bypassing unrounded results in a multiply-add...
- Patent number 8,671,129
- Issue date Mar 11, 2014
- Oracle International Corporation
- Jeffrey S. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for carryless multiplication that employs booth encoding
- Patent number 8,667,040
- Issue date Mar 4, 2014
- Via Technologies, Inc.
- Timothy A. Elliott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Carryless multiplication unit
- Patent number 8,645,448
- Issue date Feb 4, 2014
- Via Technologies, Inc.
- Timothy A. Elliott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Carryless multiplication preformatting apparatus and method
- Patent number 8,635,262
- Issue date Jan 21, 2014
- Via Technologies, Inc.
- Timothy A. Elliott
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing multiply-add operations on pack...
- Patent number 8,626,814
- Issue date Jan 7, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,495,123
- Issue date Jul 23, 2013
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR PERFORMING DEEP LEARNING OPERATIONS
- Publication number 20220035629
- Publication date Feb 3, 2022
- Samsung Electronics Co., Ltd.
- Hyung-Dal KWON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULL ADDER CELL WITH IMPROVED POWER EFFICIENCY
- Publication number 20210124559
- Publication date Apr 29, 2021
- NVIDIA Corp.
- Ilyas Elkin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE MULTIPLY-ADD ARRAY HARDWARE
- Publication number 20200293283
- Publication date Sep 17, 2020
- ALIBABA GROUP HOLDING LIMITED
- Liang HAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING CIRCUITRY
- Publication number 20200042288
- Publication date Feb 6, 2020
- Cirrus Logic International Semiconductor Ltd.
- John Paul LESSO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR PROCESSING AN INSTRUCTION MATRIX SPECIFYIN...
- Publication number 20190227982
- Publication date Jul 25, 2019
- Intel Corporation
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE MULTIPLY-ADD ARRAY HARDWARE
- Publication number 20190196788
- Publication date Jun 27, 2019
- ALIBABA GROUP HOLDING LIMITED
- Liang HAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR PROCESSING AN INSTRUCTION MATRIX SPECIFYIN...
- Publication number 20180137081
- Publication date May 17, 2018
- Intel Corporation
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FUSED MULTIPLY ADD PIPELINE
- Publication number 20140244704
- Publication date Aug 28, 2014
- International Business Machines Corporation
- SON DAO TRONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENSIBLE ITERATIVE MULTIPLIER
- Publication number 20140164457
- Publication date Jun 12, 2014
- WAVE SEMICONDUCTOR, INC.
- Samit Chaudhuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FORMAL VERIFICATION OF BOOTH MULTIPLIERS
- Publication number 20140067897
- Publication date Mar 6, 2014
- CALYPTO DESIGN SYSTEMS, INC.
- Michael L. Case
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIFIED COMPUTATION SYSTEMS AND METHODS FOR ITERATIVE MULTIPLICATIO...
- Publication number 20140046996
- Publication date Feb 13, 2014
- Intel Corporation
- Alexander Sergeevich Rumyantsev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SYNTHESISING A SUM OF ADDENDS OPERATION AN...
- Publication number 20130346927
- Publication date Dec 26, 2013
- Imagination Technologies Limited
- Theo Alan Drane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MULTIPLY INSTRUCTIONS IN DATA PROCESSORS
- Publication number 20130346463
- Publication date Dec 26, 2013
- Advanced Micro Devices, Inc.
- Scott A. Hilker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130262547
- Publication date Oct 3, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARITHMETIC CIRCUIT AND ARITHMETIC METHOD
- Publication number 20130262549
- Publication date Oct 3, 2013
- Kenichi KITAMURA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTRONIC MULTIPLIER AND DIGITAL SIGNAL PROCESSOR INCLUDING THE SAME
- Publication number 20130262544
- Publication date Oct 3, 2013
- Samsung Electronics Co., Ltd.
- Yong-Ki Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130262836
- Publication date Oct 3, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR GENERATING PARTIAL PRODUCT FOR POLYNOMIAL...
- Publication number 20130226982
- Publication date Aug 29, 2013
- Samsung Electronics Co., Ltd.
- Hyeong-Seok YU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130219151
- Publication date Aug 22, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130198254
- Publication date Aug 1, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PERFORMING MULTIPLICATION IN A PROCESSOR
- Publication number 20130144927
- Publication date Jun 6, 2013
- Advanced Micro Devices, Inc.
- Srikanth Arekapudi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED INTEGER, FLOATING POINT, POLYNOMIAL, AND VECTOR MULTIPLIER
- Publication number 20130138711
- Publication date May 30, 2013
- Junji Sugisawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Method for Processing an Instruction Matrix Specifyin...
- Publication number 20130091340
- Publication date Apr 11, 2013
- SOFT MACHINES, INC.
- Mohammad A. Abdallah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130091190
- Publication date Apr 11, 2013
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20120331028
- Publication date Dec 27, 2012
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARITHMETIC OPERATION CIRCUIT AND METHOD OF CONVERTING BINARY NUMBER
- Publication number 20120254271
- Publication date Oct 4, 2012
- Fujitsu Limited
- Kenichi KITAMURA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD OF BYPASSING UNROUNDED RESULTS IN A MULTIPLY-ADD...
- Publication number 20120233234
- Publication date Sep 13, 2012
- Jeffrey S. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD TO IMPLEMENT A MATRIX MULTIPLY UNIT OF A BROADBAN...
- Publication number 20120215826
- Publication date Aug 23, 2012
- MicroUnity Systems Engineering, Inc.
- Craig HANSEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20120216018
- Publication date Aug 23, 2012
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING POWER CONSUMPTION IN MULTI-PRECISION FLOATING POINT MULTIP...
- Publication number 20120151191
- Publication date Jun 14, 2012
- Brent R. Boswell
- G06 - COMPUTING CALCULATING COUNTING

each bitgroup having two new bits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Full adder cell with improved power efficiency

Full adder cell with improved power efficiency

Apparatus and method for processing an instruction matrix specifyin...

Programmable multiply-add array hardware

Programmable multiply-add array hardware

Processing circuitry

Apparatus and method for processing an instruction matrix specifyin...

Apparatus and method for processing an instruction matrix specifyin...

Montgomery multiplication method for performing final modular reduc...

Unified computation systems and methods for iterative multiplicatio...

Extensible iterative multiplier

Fused multiply add pipeline

Formal verification of booth multipliers

Apparatus and method for generating partial product for polynomial...

Fused booth encoder multiplexer

Shared integer, floating point, polynomial, and vector multiplier

Processor executing super instruction matrix with register file con...

Method and apparatus for multiply instructions in data processors

System and method to implement a matrix multiply unit of a broadban...

Method and apparatus for synthesising a sum of addends operation an...

Method and apparatus for performing multiplication in a processor

Processor for performing multiply-add operations on packed data

Processor for performing multiply-add operations on packed data

Processor for performing multiply-add operations on packed data

System and method of bypassing unrounded results in a multiply-add...

Mechanism for carryless multiplication that employs booth encoding

Carryless multiplication unit

Carryless multiplication preformatting apparatus and method

Method and apparatus for performing multiply-add operations on pack...

Processor for performing multiply-add operations on packed data

Patents Applicationslast 30 patents

METHOD AND APPARATUS FOR PERFORMING DEEP LEARNING OPERATIONS

FULL ADDER CELL WITH IMPROVED POWER EFFICIENCY

PROGRAMMABLE MULTIPLY-ADD ARRAY HARDWARE

PROCESSING CIRCUITRY

APPARATUS AND METHOD FOR PROCESSING AN INSTRUCTION MATRIX SPECIFYIN...

PROGRAMMABLE MULTIPLY-ADD ARRAY HARDWARE

APPARATUS AND METHOD FOR PROCESSING AN INSTRUCTION MATRIX SPECIFYIN...

FUSED MULTIPLY ADD PIPELINE

EXTENSIBLE ITERATIVE MULTIPLIER

FORMAL VERIFICATION OF BOOTH MULTIPLIERS

UNIFIED COMPUTATION SYSTEMS AND METHODS FOR ITERATIVE MULTIPLICATIO...

METHOD AND APPARATUS FOR SYNTHESISING A SUM OF ADDENDS OPERATION AN...

METHOD AND APPARATUS FOR MULTIPLY INSTRUCTIONS IN DATA PROCESSORS

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

ARITHMETIC CIRCUIT AND ARITHMETIC METHOD

ELECTRONIC MULTIPLIER AND DIGITAL SIGNAL PROCESSOR INCLUDING THE SAME

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

APPARATUS AND METHOD FOR GENERATING PARTIAL PRODUCT FOR POLYNOMIAL...

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

METHOD AND APPARATUS FOR PERFORMING MULTIPLICATION IN A PROCESSOR

SHARED INTEGER, FLOATING POINT, POLYNOMIAL, AND VECTOR MULTIPLIER

Apparatus and Method for Processing an Instruction Matrix Specifyin...

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

ARITHMETIC OPERATION CIRCUIT AND METHOD OF CONVERTING BINARY NUMBER

SYSTEM AND METHOD OF BYPASSING UNROUNDED RESULTS IN A MULTIPLY-ADD...

SYSTEM AND METHOD TO IMPLEMENT A MATRIX MULTIPLY UNIT OF A BROADBAN...

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

REDUCING POWER CONSUMPTION IN MULTI-PRECISION FLOATING POINT MULTIP...