Error catch memory

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G11C2029/1208

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GPHYSICS G11Information storage G11CSTATIC STORES

Current Industry

G11C2029/1208Error catch memory

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Detect whether die or channel is defective to confirm temperature data
- Patent number 12,148,495
- Issue date Nov 19, 2024
- Micron Technology, Inc.
- Venkata Naga Lakshman Pasala
- G11 - INFORMATION STORAGE
Information Patent Grant
Health scan for content addressable memory
- Patent number 12,142,334
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Tomoko Ogura Iwasaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for detecting a state of a bus
- Patent number 12,046,316
- Issue date Jul 23, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices and methods for managing error regions
- Patent number 11,915,774
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Joe M. Jeddeloh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fail bit repair solution determination method and device
- Patent number 11,776,654
- Issue date Oct 3, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Yui-Lang Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Control circuit, memory system and control method
- Patent number 11,756,645
- Issue date Sep 12, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Win-San Khwa
- G11 - INFORMATION STORAGE
Information Patent Grant
Detect whether die or channel is defective to confirm temperature data
- Patent number 11,621,049
- Issue date Apr 4, 2023
- Micron Technology, Inc.
- Venkata Naga Lakshman Pasala
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for direct access hybrid testing
- Patent number 11,581,056
- Issue date Feb 14, 2023
- Micron Technology, Inc.
- Chiaki Dono
- G11 - INFORMATION STORAGE
Information Patent Grant
Calibration for integrated memory assembly
- Patent number 11,488,682
- Issue date Nov 1, 2022
- SanDisk Technologies LLC
- Tomer Eliash
- G11 - INFORMATION STORAGE
Information Patent Grant
Runtime identification of bad memory cells based on difference betw...
- Patent number 11,404,135
- Issue date Aug 2, 2022
- Amazon Technologies, Inc.
- Jonathan Parker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block quality classification at testing for non-volatile memory, an...
- Patent number 11,397,635
- Issue date Jul 26, 2022
- SanDisk Technologies LLC
- Shih-Chung Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared error detection and correction memory
- Patent number 11,222,708
- Issue date Jan 11, 2022
- Micron Technology, Inc.
- Tomoyuki Shibata
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices and methods for managing error regions
- Patent number 11,145,384
- Issue date Oct 12, 2021
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Grant
Data processing apparatus for handling page fault using predefind b...
- Patent number 10,970,227
- Issue date Apr 6, 2021
- Huawei Technologies Co., Ltd.
- Jani Kokkonen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods to encode column plane compression data
- Patent number 10,937,517
- Issue date Mar 2, 2021
- Micron Technology, Inc.
- Eric J. Rich-Plotkin
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for direct access hybrid testing
- Patent number 10,896,738
- Issue date Jan 19, 2021
- Micron Technology, Inc.
- Chiaki Dono
- G11 - INFORMATION STORAGE
Information Patent Grant
Layered semiconductor device, and production method therefor
- Patent number 10,714,151
- Issue date Jul 14, 2020
- ULTRAMEMORY INC.
- Yasutoshi Yamada
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit and testing method thereof
- Patent number 10,679,720
- Issue date Jun 9, 2020
- Nuvoton Technology Corporation
- Cheng-Chih Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit fault detection
- Patent number 10,613,926
- Issue date Apr 7, 2020
- NXP B.V.
- Jan-Peter Schat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory test system and an operating method thereof
- Patent number 10,599,540
- Issue date Mar 24, 2020
- SK Hynix Inc.
- In Ho Choi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test mode control circuit
- Patent number 10,566,074
- Issue date Feb 18, 2020
- SK hynix Inc.
- Haeng Seon Chae
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory and logic lifetime simulation systems and methods
- Patent number 10,514,973
- Issue date Dec 24, 2019
- Georgia Tech Research Corporation
- Linda Milor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System architecture method and apparatus for adaptive hardware faul...
- Patent number 10,495,691
- Issue date Dec 3, 2019
- NXP USA, INC.
- Xiao Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for selective determination of data error r...
- Patent number 10,437,669
- Issue date Oct 8, 2019
- Micron Technology, Inc.
- Ryan S. Laity
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared error detection and correction memory
- Patent number 10,395,748
- Issue date Aug 27, 2019
- Micron Technology, Inc.
- Tomoyuki Shibata
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices and methods for managing error regions
- Patent number 10,347,356
- Issue date Jul 9, 2019
- Micron Technology, Inc.
- Joe M. Jeddeloh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
On-chip diagnostic circuitry monitoring multiple cycles of signal s...
- Patent number 10,311,966
- Issue date Jun 4, 2019
- International Business Machines Corporation
- Anthony G. Aipperspach
- G01 - MEASURING TESTING
Information Patent Grant
Data processing
- Patent number 10,311,963
- Issue date Jun 4, 2019
- ARM Limited
- Mark Gerald LaVine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for estimating remaining life of integrated circuits u...
- Patent number 10,303,541
- Issue date May 28, 2019
- Georgia Tech Research Corporation
- Linda Milor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory with bit line short circuit detection and masking of groups...
- Patent number 10,269,444
- Issue date Apr 23, 2019
- SanDisk Technologies LLC
- Anurag Nigam
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
TECHNIQUES FOR DETECTING A STATE OF A BUS
- Publication number 20240412801
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING PARITY AND ECC LOGIC USING MBIST
- Publication number 20240221854
- Publication date Jul 4, 2024
- ADVANCED MICRO DEVICES, INC.
- Balatripura S. Chavali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Verification Using Processing-in-Memory
- Publication number 20240212777
- Publication date Jun 27, 2024
- ADVANCED MICRO DEVICES, INC.
- Robin Conradine Knauerhase
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROL CIRCUIT, MEMORY SYSTEM AND CONTROL METHOD
- Publication number 20230360717
- Publication date Nov 9, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Win-San Khwa
- G11 - INFORMATION STORAGE
Information Patent Application
DETECT WHETHER DIE OR CHANNEL IS DEFECTIVE TO CONFIRM TEMPERATURE DATA
- Publication number 20230207042
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Venkata Naga Lakshman Pasala
- G11 - INFORMATION STORAGE
Information Patent Application
HEALTH SCAN FOR CONTENT ADDRESSABLE MEMORY
- Publication number 20220359033
- Publication date Nov 10, 2022
- Micron Technology, Inc.
- Tomoko Ogura Iwasaki
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROL CIRCUIT, MEMORY SYSTEM AND CONTROL METHOD
- Publication number 20220359031
- Publication date Nov 10, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Win-San Khwa
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR DETECTING A STATE OF A BUS
- Publication number 20220139487
- Publication date May 5, 2022
- Micron Technology, Inc.
- Scott E. Schaefer
- G11 - INFORMATION STORAGE
Information Patent Application
DETECT WHETHER DIE OR CHANNEL IS DEFECTIVE TO CONFIRM TEMPERATURE DATA
- Publication number 20220101940
- Publication date Mar 31, 2022
- Micron Technology, Inc.
- Venkata Naga Lakshman Pasala
- G11 - INFORMATION STORAGE
Information Patent Application
FAIL BIT REPAIR SOLUTION DETERMINATION METHOD AND DEVICE
- Publication number 20220084620
- Publication date Mar 17, 2022
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Yui-Lang CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
BLOCK QUALITY CLASSIFICATION AT TESTING FOR NON-VOLATILE MEMORY, AN...
- Publication number 20210173734
- Publication date Jun 10, 2021
- SANDISK TECHNOLOGIES LLC
- Shih-Chung Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR DIRECT ACCESS HYBRID TESTING
- Publication number 20210104293
- Publication date Apr 8, 2021
- Micron Technology, Inc.
- Chiaki Dono
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE CONTROLLER
- Publication number 20200066367
- Publication date Feb 27, 2020
- International Business Machines Corporation
- Anil B. Lingambudi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FUSE-BLOWING SYSTEM AND METHOD FOR OPERATING THE SAME
- Publication number 20190019568
- Publication date Jan 17, 2019
- NANYA TECHNOLOGY CORPORATION
- Ting-Shuo HSU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES AND METHODS FOR MANAGING ERROR REGIONS
- Publication number 20180374557
- Publication date Dec 27, 2018
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Application
FAILURE PREVENTION OF BUS MONITOR
- Publication number 20180277234
- Publication date Sep 27, 2018
- MEDIATEK INC.
- Jeendar HUANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING APPARATUS AND A METHOD OF OPERATING A DATA PROCESSI...
- Publication number 20180225223
- Publication date Aug 9, 2018
- Huawei Technologies Co., Ltd
- Jani Kokkonen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE
- Publication number 20180033469
- Publication date Feb 1, 2018
- Hitachi, Ltd
- Naoki MORITOKI
- G01 - MEASURING TESTING
Information Patent Application
MEMORY TESTING AND FAILURE DATA FILTERING
- Publication number 20150255175
- Publication date Sep 10, 2015
- Advantest Corporation
- Matt HYDER
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF TESTING SEMICONDUCTO...
- Publication number 20140340975
- Publication date Nov 20, 2014
- Keigo NAKATANI
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR TESTING PAGES OF DATA STORED IN A MEMORY MO...
- Publication number 20140289575
- Publication date Sep 25, 2014
- Marvell World Trade Ltd.
- Sehat Sutardja
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MRAM SELF-REPAIR WITH BIST LOGIC
- Publication number 20140211551
- Publication date Jul 31, 2014
- QUALCOMM Incorporated
- Jung Pill Kim
- G11 - INFORMATION STORAGE
Information Patent Application
Storage Medium and Transmittal System Utilizing the Same
- Publication number 20140036603
- Publication date Feb 6, 2014
- Hsu-Ping Ou
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS, SYSTEM, AND METHOD FOR WEAR MANAGEMENT
- Publication number 20130232289
- Publication date Sep 5, 2013
- Hao Zhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES AND METHODS FOR MANAGING ERROR REGIONS
- Publication number 20130179740
- Publication date Jul 11, 2013
- Micron Technology, Inc.
- Joe M. Jeddeloh
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF TESTING SEMICONDUCTO...
- Publication number 20130163356
- Publication date Jun 27, 2013
- Fujitsu Limited
- Masahiro Yanagida
- G11 - INFORMATION STORAGE
Information Patent Application
FULLY-BUFFERED DUAL IN-LINE MEMORY MODULE WITH FAULT CORRECTION
- Publication number 20130031432
- Publication date Jan 31, 2013
- Marvell World Trade Ltd.
- Sehat Sutardja
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES AND METHOD FOR ERROR TEST, RECORDATION AND REPAIR
- Publication number 20120297257
- Publication date Nov 22, 2012
- Micron Technology, Inc.
- Christian N. Mohr
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF OPERATING MEMORY CONTROLLER, MEMORY CONTROLLER, MEMORY DE...
- Publication number 20120265927
- Publication date Oct 18, 2012
- Kyoung-Lae Cho
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT, FAILURE DIAGNOSIS SYSTEM AND FAIL...
- Publication number 20120229155
- Publication date Sep 13, 2012
- Kabushiki Kaisha Toshiba
- Kenichi Anzou
- G11 - INFORMATION STORAGE

Error catch memory

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Detect whether die or channel is defective to confirm temperature data

Health scan for content addressable memory

Techniques for detecting a state of a bus

Memory devices and methods for managing error regions

Fail bit repair solution determination method and device

Control circuit, memory system and control method

Detect whether die or channel is defective to confirm temperature data

Apparatuses and methods for direct access hybrid testing

Calibration for integrated memory assembly

Runtime identification of bad memory cells based on difference betw...

Block quality classification at testing for non-volatile memory, an...

Shared error detection and correction memory

Memory devices and methods for managing error regions

Data processing apparatus for handling page fault using predefind b...

Apparatuses and methods to encode column plane compression data

Apparatuses and methods for direct access hybrid testing

Layered semiconductor device, and production method therefor

Memory circuit and testing method thereof

Integrated circuit fault detection

Memory test system and an operating method thereof

Test mode control circuit

Memory and logic lifetime simulation systems and methods

System architecture method and apparatus for adaptive hardware faul...

Apparatuses and methods for selective determination of data error r...

Shared error detection and correction memory

Memory devices and methods for managing error regions

On-chip diagnostic circuitry monitoring multiple cycles of signal s...

Data processing

Technologies for estimating remaining life of integrated circuits u...

Memory with bit line short circuit detection and masking of groups...

Patents Applicationslast 30 patents

TECHNIQUES FOR DETECTING A STATE OF A BUS

TESTING PARITY AND ECC LOGIC USING MBIST

Memory Verification Using Processing-in-Memory

CONTROL CIRCUIT, MEMORY SYSTEM AND CONTROL METHOD

DETECT WHETHER DIE OR CHANNEL IS DEFECTIVE TO CONFIRM TEMPERATURE DATA

HEALTH SCAN FOR CONTENT ADDRESSABLE MEMORY

CONTROL CIRCUIT, MEMORY SYSTEM AND CONTROL METHOD

TECHNIQUES FOR DETECTING A STATE OF A BUS

DETECT WHETHER DIE OR CHANNEL IS DEFECTIVE TO CONFIRM TEMPERATURE DATA

FAIL BIT REPAIR SOLUTION DETERMINATION METHOD AND DEVICE

BLOCK QUALITY CLASSIFICATION AT TESTING FOR NON-VOLATILE MEMORY, AN...

APPARATUSES AND METHODS FOR DIRECT ACCESS HYBRID TESTING

MEMORY DEVICE CONTROLLER

FUSE-BLOWING SYSTEM AND METHOD FOR OPERATING THE SAME

MEMORY DEVICES AND METHODS FOR MANAGING ERROR REGIONS

FAILURE PREVENTION OF BUS MONITOR

DATA PROCESSING APPARATUS AND A METHOD OF OPERATING A DATA PROCESSI...

MEMORY DEVICE

MEMORY TESTING AND FAILURE DATA FILTERING

SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF TESTING SEMICONDUCTO...

SYSTEMS AND METHODS FOR TESTING PAGES OF DATA STORED IN A MEMORY MO...

MRAM SELF-REPAIR WITH BIST LOGIC

Storage Medium and Transmittal System Utilizing the Same

APPARATUS, SYSTEM, AND METHOD FOR WEAR MANAGEMENT

MEMORY DEVICES AND METHODS FOR MANAGING ERROR REGIONS

SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF TESTING SEMICONDUCTO...

FULLY-BUFFERED DUAL IN-LINE MEMORY MODULE WITH FAULT CORRECTION

MEMORY DEVICES AND METHOD FOR ERROR TEST, RECORDATION AND REPAIR

METHOD OF OPERATING MEMORY CONTROLLER, MEMORY CONTROLLER, MEMORY DE...

SEMICONDUCTOR INTEGRATED CIRCUIT, FAILURE DIAGNOSIS SYSTEM AND FAIL...