Error detection by comparing the memory output

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F11/00Error detection Error correction Monitoring

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G06F11/167Error detection by comparing the memory output

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Patents Grantslast 30 patents

Information Patent Grant
Reconstructing data segments in a storage network and methods for u...
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- Issue date Aug 13, 2024
- Purage Storage, Inc.
- Greg R. Dhuse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verifiable rebuilding of an appended encoded data slice
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- Issue date Aug 13, 2024
- PURE STORAGE, INC.
- Ravi V. Khadiwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lock-stepping asynchronous logic
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- Issue date Jun 25, 2024
- Xilinx, Inc.
- David Tran
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Information Patent Grant
Systems and methods for memory serviceability mitigation
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- Issue date Jun 4, 2024
- Dell Products, L.P.
- Balasingh Ponraj Samuel
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Information Patent Grant
Generating globally coherent timestamps
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- Issue date Apr 9, 2024
- Google LLC
- Peter Hochschild
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Information Patent Grant
Memory error detection
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- Issue date Mar 12, 2024
- RAMBUS INC.
- Ian Shaeffer
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Information Patent Grant
Distributing timing over metro transport networking
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- Issue date Feb 27, 2024
- Ciena Corporation
- Sebastien Gareau
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Information Patent Grant
Techniques for duty cycle correction
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- Intel Corporation
- Christopher P. Mozak
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Reducing memory inconsistencies between synchronized computing devices
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- Issue date Feb 27, 2024
- Red Hat, Inc.
- David A. Gilbert
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Information Patent Grant
Methods for managing communications involving a lockstep processing...
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- GE Aviation Systems LLC
- Melanie Sue-Hanson Graffy
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Error rate interrupts in hardware for high-speed signaling intercon...
- Patent number 11,880,265
- Issue date Jan 23, 2024
- NVIDIA Corporation
- Adithya Hrudhayan Krishnamurthy
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Information Patent Grant
Identification of optimal bit apportionments for digital functions...
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- Issue date Sep 12, 2023
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Information Patent Grant
Integrated circuit chip with cores asymmetrically oriented with res...
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Information Patent Grant
Simultaneous multi-processor apparatus applicable to achieving exas...
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Error detection circuit
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Techniques for determining timestamp inaccuracies in a transceiver
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- Han Hua Leong
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Execute in place architecture with integrity check
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- Issue date May 2, 2023
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- Sunanda Manjunath
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Information Patent Grant
Field programmable gate array (FPGA) for improving reliability of k...
- Patent number 11,604,696
- Issue date Mar 14, 2023
- WUXI ESIONTECH CO., LTD.
- Yueer Shan
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Information Patent Grant
Memory error detection
- Patent number 11,579,965
- Issue date Feb 14, 2023
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock-error estimation for two-clock electronic device
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- Issue date Feb 7, 2023
- BE SPOON SAS
- Pascal Fabre
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Redundant automation system, method for creating the automation sys...
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- Siemens Aktiengesellschaft
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Semiconductor device, control system, and control method of semicon...
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IPS SOC PLL monitoring and error reporting
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- Prashant D. Chaudhari
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Information Patent Grant
Memory system, memory controller, and method of operating memory sy...
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- Jung Ae Kim
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Memory module, error correction method of memory controller control...
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- Samsung Electronics Co., Ltd.
- Wonhyung Song
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Information Patent Grant
Error detection using vector processing circuitry
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- ARM Limited
- Matthias Lothar Boettcher
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Information processing apparatus and information processing method
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- Noriyuki Sato
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Information Patent Grant
Apparatus and method for handling error in volatile memory of memor...
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- Issue date Nov 1, 2022
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- Jong-Min Lee
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Information Patent Grant
Operating system-based systems and method of achieving fault tolerance
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- Issue date Aug 30, 2022
- STRATUS TECHNOLOGIES IRELAND LTD.
- Charles J. Horvath
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Information Patent Grant
Validating requests based on stored vault information
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- Issue date Aug 16, 2022
- Pure Storage, Inc.
- Sebastien Vas
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Patents Applicationslast 30 patents

Information Patent Application
Data Reconstruction in a Storage Network and Methods for Use Therewith
- Publication number 20240394146
- Publication date Nov 28, 2024
- PURE STORAGE, INC.
- Greg R. Dhuse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Generating a trusted rebuilt appended encoded data slice
- Publication number 20240393960
- Publication date Nov 28, 2024
- PURE STORAGE, INC.
- Ravi V. Khadiwala
- G06 - COMPUTING CALCULATING COUNTING
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SYSTEMS AND METHODS FOR OPTIMIZING POST PACKAGE REPAIR IN ASSOCIATI...
- Publication number 20240378124
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- Dell Products L.P.
- Balasingh P. SAMUEL
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CONTROL DEVICE AND METHOD FOR OPERATING CONTROL DEVICE
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- Publication date Oct 10, 2024
- Kabushiki Kaisha Toshiba
- Michitomo YAMAGUCHI
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Memory error detection
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- Rambus Inc.
- Ian Shaeffer
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SECURITY DEVICE AND SECURITY METHOD
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- Hitachi, Ltd
- Naohiro IKEDA
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TECHNIQUES FOR DUTY CYCLE CORRECTION
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- Intel Corporation
- Christopher P. MOZAK
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ERROR RATE INTERRUPTS IN HARDWARE FOR HIGH-SPEED SIGNALING INTERCON...
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- NVIDIA Corporation
- Adithya Hrudhayan Krishnamurthy
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SYSTEMS AND METHODS FOR MEMORY SERVICEABILITY MITIGATION
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- Publication date Mar 7, 2024
- DELL PRODUCTS, L.P.
- Balasingh Ponraj Samuel
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MULTICHANNEL APPARATUS FOR PERFORMING CHANNEL REPLACEMENT AND OPERA...
- Publication number 20240078159
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- Samsung Electronics Co., Ltd.
- Hyeokki HONG
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MEMORY CELL ARRAY UNIT
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- Publication date Nov 30, 2023
- Sony Semiconductor Solutions Corporation
- LUI SAKAI
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LOCK-STEPPING ASYNCHONOUS LOGIC
- Publication number 20230376389
- Publication date Nov 23, 2023
- Xilinx, Inc.
- David TRAN
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Memory Error Detection
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- Publication date Oct 19, 2023
- Rambus Inc.
- Ian Shaeffer
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Information Patent Application
Integrated Circuit Chip with Cores Asymmetrically Oriented With Res...
- Publication number 20230297480
- Publication date Sep 21, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Jasbir Singh Nayyar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IDENTIFICATION OF OPTIMAL BIT APPORTIONMENTS FOR DIGITAL FUNCTIONS...
- Publication number 20230205651
- Publication date Jun 29, 2023
- Raytheon Company
- Steven J. Manson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR RATE INTERRUPTS IN HARDWARE FOR HIGH-SPEED SIGNALING INTERCON...
- Publication number 20230195551
- Publication date Jun 22, 2023
- NVIDIA Corporation
- Adithya Hrudhayan Krishnamurthy
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METHOD AND SYSTEM FOR TRACING ERROR OF LOGIC SYSTEM DESIGN
- Publication number 20230176941
- Publication date Jun 8, 2023
- XEPIC CORPORATION LIMITED
- Yang-Trung LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXECUTE IN PLACE ARCHITECTURE WITH INTEGRITY CHECK
- Publication number 20230123080
- Publication date Apr 20, 2023
- INFINEON TECHNOLOGIES AG
- Sunanda Manjunath
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SEMICONDUCTOR DEVICE
- Publication number 20230064905
- Publication date Mar 2, 2023
- RENESAS ELECTRONICS CORPORATION
- Takayuki OOTANI
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Information Patent Application
Storage Unit Validating Requests for a Storage Vault
- Publication number 20220382634
- Publication date Dec 1, 2022
- PURE STORAGE, INC.
- Sebastien Vas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR MANAGING COMMUNICATIONS INVOLVING A LOCKSTEP PROCESSING...
- Publication number 20220276979
- Publication date Sep 1, 2022
- GE AVIATION SYSTEMS LLC
- Melanie Sue-Hanson Graffy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK-ERROR ESTIMATION FOR TWO-CLOCK ELECTRONIC DEVICE
- Publication number 20220276670
- Publication date Sep 1, 2022
- Be Spoon SAS
- Pascal Fabre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated Circuit Chip with Cores Asymmetrically Oriented With Res...
- Publication number 20220147424
- Publication date May 12, 2022
- TEXAS INSTRUMENTS INCORPORATED
- Jasbir Singh Nayyar
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Information Patent Application
Memory Error Detection
- Publication number 20220138042
- Publication date May 5, 2022
- Rambus Inc.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconstructing Data Segments in a Storage Network and Methods for U...
- Publication number 20220114053
- Publication date Apr 14, 2022
- PURE STORAGE, INC.
- Greg R. Dhuse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINATION OF A MATCH BETWEEN DATA VALUES STORED BY THREE OR MOR...
- Publication number 20220057942
- Publication date Feb 24, 2022
- Micron Technology, Inc.
- Aaron P. Boehm
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Information Patent Application
MEMORY MODULE, ERROR CORRECTION METHOD OF MEMORY CONTROLLER CONTROL...
- Publication number 20220012127
- Publication date Jan 13, 2022
- Samsung Electronics Co., Ltd.
- Wonhyung Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTION CIRCUIT
- Publication number 20210342233
- Publication date Nov 4, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Saya Goud LANGADI
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Information Patent Application
CRC ERROR ALERT SYNCHRONIZATION
- Publication number 20210326200
- Publication date Oct 21, 2021
- Micron Technology, Inc.
- Thanh K. Mai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK-ERROR ESTIMATION FOR TWO-CLOCK ELECTRONIC DEVICE
- Publication number 20210255660
- Publication date Aug 19, 2021
- Be Spoon SAS
- Pascal Fabre
- G06 - COMPUTING CALCULATING COUNTING

Error detection by comparing the memory output

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Reconstructing data segments in a storage network and methods for u...

Verifiable rebuilding of an appended encoded data slice

Lock-stepping asynchronous logic

Systems and methods for memory serviceability mitigation

Generating globally coherent timestamps

Memory error detection

Distributing timing over metro transport networking

Techniques for duty cycle correction

Reducing memory inconsistencies between synchronized computing devices

Methods for managing communications involving a lockstep processing...

Error rate interrupts in hardware for high-speed signaling intercon...

Identification of optimal bit apportionments for digital functions...

Integrated circuit chip with cores asymmetrically oriented with res...

Simultaneous multi-processor apparatus applicable to achieving exas...

Error detection circuit

Techniques for determining timestamp inaccuracies in a transceiver

Execute in place architecture with integrity check

Field programmable gate array (FPGA) for improving reliability of k...

Memory error detection

Clock-error estimation for two-clock electronic device

Redundant automation system, method for creating the automation sys...

Semiconductor device, control system, and control method of semicon...

IPS SOC PLL monitoring and error reporting

Memory system, memory controller, and method of operating memory sy...

Memory module, error correction method of memory controller control...

Error detection using vector processing circuitry

Information processing apparatus and information processing method

Apparatus and method for handling error in volatile memory of memor...

Operating system-based systems and method of achieving fault tolerance

Validating requests based on stored vault information

Patents Applicationslast 30 patents

Data Reconstruction in a Storage Network and Methods for Use Therewith

Generating a trusted rebuilt appended encoded data slice

SYSTEMS AND METHODS FOR OPTIMIZING POST PACKAGE REPAIR IN ASSOCIATI...

CONTROL DEVICE AND METHOD FOR OPERATING CONTROL DEVICE

Memory error detection

SECURITY DEVICE AND SECURITY METHOD

TECHNIQUES FOR DUTY CYCLE CORRECTION

ERROR RATE INTERRUPTS IN HARDWARE FOR HIGH-SPEED SIGNALING INTERCON...

SYSTEMS AND METHODS FOR MEMORY SERVICEABILITY MITIGATION

MULTICHANNEL APPARATUS FOR PERFORMING CHANNEL REPLACEMENT AND OPERA...

MEMORY CELL ARRAY UNIT

LOCK-STEPPING ASYNCHONOUS LOGIC

Memory Error Detection

Integrated Circuit Chip with Cores Asymmetrically Oriented With Res...

IDENTIFICATION OF OPTIMAL BIT APPORTIONMENTS FOR DIGITAL FUNCTIONS...

ERROR RATE INTERRUPTS IN HARDWARE FOR HIGH-SPEED SIGNALING INTERCON...

METHOD AND SYSTEM FOR TRACING ERROR OF LOGIC SYSTEM DESIGN

EXECUTE IN PLACE ARCHITECTURE WITH INTEGRITY CHECK

SEMICONDUCTOR DEVICE

Storage Unit Validating Requests for a Storage Vault

METHODS FOR MANAGING COMMUNICATIONS INVOLVING A LOCKSTEP PROCESSING...

CLOCK-ERROR ESTIMATION FOR TWO-CLOCK ELECTRONIC DEVICE

Integrated Circuit Chip with Cores Asymmetrically Oriented With Res...

Memory Error Detection

Reconstructing Data Segments in a Storage Network and Methods for U...

DETERMINATION OF A MATCH BETWEEN DATA VALUES STORED BY THREE OR MOR...

MEMORY MODULE, ERROR CORRECTION METHOD OF MEMORY CONTROLLER CONTROL...

ERROR DETECTION CIRCUIT

CRC ERROR ALERT SYNCHRONIZATION

CLOCK-ERROR ESTIMATION FOR TWO-CLOCK ELECTRONIC DEVICE