Formal methods

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions

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Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for obfuscating a circuit design
- Patent number 10,671,700
- Issue date Jun 2, 2020
- efavless corporation
- Bertrand Irissou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bandwidth test in networking System-on-Chip verification
- Patent number 10,664,566
- Issue date May 26, 2020
- Mentor Graphics Corporation
- Suresh Krishnamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for inter-die block level design
- Patent number 10,664,564
- Issue date May 26, 2020
- Xcelsis Corporation
- Javier A Delacruz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory access optimisation using per-layer computational mapping an...
- Patent number 10,664,310
- Issue date May 26, 2020
- Canon Kabushiki Kaisha
- Haseeb Bokhari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase noise reduction in voltage controlled oscillators
- Patent number 10,666,191
- Issue date May 26, 2020
- International Business Machines Corporation
- Alberto Valdes-Garcia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Concurrent testbench and software driven verification
- Patent number 10,664,563
- Issue date May 26, 2020
- Mentor Graphics Corporation
- Debdutta Bhattacharya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computing system and method of performing verification of circuit d...
- Patent number 10,657,209
- Issue date May 19, 2020
- Samsung Electronics Co., Ltd.
- Ho-young Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Slack time recycling
- Patent number 10,657,210
- Issue date May 19, 2020
- Mentor Graphics Corporation
- Brian Etscheid
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit generation based on zero wire load assertions
- Patent number 10,657,211
- Issue date May 19, 2020
- International Business Machines Corporation
- Limor Plotkin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Application- or algorithm-specific quantum circuit design
- Patent number 10,657,212
- Issue date May 19, 2020
- International Business Machines Corporation
- Dongbing Shao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Analyzing model based on design interest
- Patent number 10,657,208
- Issue date May 19, 2020
- The MathWorks, Inc.
- Zhi Han
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latency test in networking system-on-chip verification
- Patent number 10,657,217
- Issue date May 19, 2020
- Mentor Graphics Corporation
- Suresh Krishnamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Photonic circuit design systems
- Patent number 10,650,110
- Issue date May 12, 2020
- Hewlett Packard Enterprise Development LP
- Thomas Van Vaerenbergh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Boolean satisfiability (SAT) solver
- Patent number 10,650,109
- Issue date May 12, 2020
- Synopsys, Inc.
- William Clark Naylor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method and computer-accessible medium providing secure inte...
- Patent number 10,642,947
- Issue date May 5, 2020
- New York University
- Ozgur Sinanoglu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register pull-out for sequential circuit blocks in circuit designs
- Patent number 10,642,951
- Issue date May 5, 2020
- Xilinx, Inc.
- Govinda Keshavdas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for converting a single-threaded software program...
- Patent number 10,642,588
- Issue date May 5, 2020
- Global Supercomputing Corporation
- Kemal Ebcioglu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verifying planarization performance using electrical measures
- Patent number 10,642,950
- Issue date May 5, 2020
- International Business Machines Corporation
- Romain Lallement
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Glitch detection at clock domain crossing
- Patent number 10,635,767
- Issue date Apr 28, 2020
- Mentor Graphics Corporation
- Sulabh Kumar Khare
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method, and computer program product for displaying multipl...
- Patent number 10,635,768
- Issue date Apr 28, 2020
- Cadence Design Systems, Inc.
- Thiago Radicchi Roque
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware and software event tracing for a system-on-chip
- Patent number 10,635,769
- Issue date Apr 28, 2020
- Xilinx, Inc.
- Samuel A. Skalicky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for selecting integrated circuit device neural...
- Patent number 10,628,541
- Issue date Apr 21, 2020
- Peking University Shenzhen Graduate School
- Xinnan Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for estimating a power consumption of a registe...
- Patent number 10,628,543
- Issue date Apr 21, 2020
- Ansys, Inc.
- Renuka Vanukuri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for designing an integrated circuit, and method of manufactu...
- Patent number 10,628,550
- Issue date Apr 21, 2020
- Samsung Electronics Co., Ltd.
- Min-su Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flow control in networking system-on-chip verification
- Patent number 10,628,548
- Issue date Apr 21, 2020
- Mentor Graphics Corporation
- Suresh Krishnamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modulo hardware generator
- Patent number 10,628,125
- Issue date Apr 21, 2020
- Imagination Technologies Limited
- Samuel Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Core-only system management interrupt
- Patent number 10,628,542
- Issue date Apr 21, 2020
- Intel Corporation
- Tsvika Kurts
- G01 - MEASURING TESTING
Information Patent Grant
Computer implemented system and method of translation of verificati...
- Patent number 10,621,290
- Issue date Apr 14, 2020
- Zipalog, Inc.
- Felicia James
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Initial-state and next-state value folding
- Patent number 10,621,297
- Issue date Apr 14, 2020
- International Business Machines Coporation
- Jason R. Baumgartner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wafer trust via location locked circuit layout with measurable inte...
- Patent number 10,622,345
- Issue date Apr 14, 2020
- Honeywell International Inc.
- James L. Tucker
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
AUTOMATED DESIGN CLOSURE WITH ABUTTED HIERARCHY
- Publication number 20210165856
- Publication date Jun 3, 2021
- International Business Machines Corporation
- Michael Kazda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE PENALTY TERM DETERMINATIONS IN APPLICATIONS OF QUANTUM COM...
- Publication number 20210150001
- Publication date May 20, 2021
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF DEBUGGING HARDWARE AND FIRMWARE OF DATA STORAGE
- Publication number 20210124810
- Publication date Apr 29, 2021
- SK HYNIX INC.
- Andrey Kuyel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Via Coloring Methods and Systems
- Publication number 20210109999
- Publication date Apr 15, 2021
- ARM Limited
- Abhilash Velluridathil Thazhathidathil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTROSTATIC DISCHARGE PROTECTION FOR STACKED-DIE SYSTEM
- Publication number 20210098987
- Publication date Apr 1, 2021
- Priya Walimbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR EVENT-BASED PERFORMANCE MONITORING IN INTEGRATED CIRCUIT DE...
- Publication number 20210097146
- Publication date Apr 1, 2021
- International Business Machines Corporation
- Lahiruka Winter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CURRENT SENSOR
- Publication number 20210033648
- Publication date Feb 4, 2021
- International Business Machines Corporation
- Riduan Khaddam-Aljameh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CAD FRAMEWORK FOR POWER SIDE-CHANNEL VULNERABILITY ASSESSMENT
- Publication number 20210026994
- Publication date Jan 28, 2021
- University of Florida Research Foundation, Inc.
- Mark M. Tehranipoor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FEEDBACK-AWARE SLACK STEALING ACROSS TRANSPARENT LATCHES EMPOWERING...
- Publication number 20210011980
- Publication date Jan 14, 2021
- International Business Machines Corporation
- Chaitanya Ravindra Peddawad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINISTIC TEST PATTERN GENERATION FOR DESIGNS WITH TIMING EXCEP...
- Publication number 20200410065
- Publication date Dec 31, 2020
- Mentor Graphics Corporation
- Wu-Tung Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MESSAGE SELECTION FOR HARDWARE TRACING IN SYSTEM-ON-CHIP POST-SILIC...
- Publication number 20200401495
- Publication date Dec 24, 2020
- International Business Machines Corporation
- Flavio M De Paula
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL CLOCK TREE CONSTRUCTION BASED ON CONSTRAINTS
- Publication number 20200401179
- Publication date Dec 24, 2020
- Samsung Electronics Co., Ltd.
- Sridhar SUBRAMANIAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FUSE-BASED LOGIC REPAIR
- Publication number 20200394274
- Publication date Dec 17, 2020
- QUALCOMM Incorporated
- Samit SENGUPTA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVELY GROUNDING FILL WIRES
- Publication number 20200387580
- Publication date Dec 10, 2020
- International Business Machines Corporation
- Steven Joseph Kurtz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ITERATIVE APPROACH TO DETERMINE FAILURE THRESHOLD ASSOCIATED WITH D...
- Publication number 20200379041
- Publication date Dec 3, 2020
- International Business Machines Corporation
- Tong Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND PART DESIGN BASED ON STRUCTURED REQUIREMENTS
- Publication number 20200380079
- Publication date Dec 3, 2020
- The Boeing Company
- Timothy Blake Sanders
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMULATION METHOD FOR USE IN FUNCTIONAL EQUIVALENCE CHECK
- Publication number 20200356639
- Publication date Nov 12, 2020
- Yangtze Memory Technologies Co., Ltd.
- Lu Liao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATION OF DYNAMIC DESIGN FLOWS FOR INTEGRATED CIRCUITS
- Publication number 20200349236
- Publication date Nov 5, 2020
- SiFive, Inc.
- Han Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WAFER CHARACTERISTIC PREDICTION METHOD AND ELECTRONIC DEVICE
- Publication number 20200334338
- Publication date Oct 22, 2020
- DigWise Technology Corporation, LTD
- JingJie Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF USING SIMULATION SOFTWARE TO GENERATE CIRCUIT LAYOUT
- Publication number 20200334339
- Publication date Oct 22, 2020
- Realtek Semiconductor Corp.
- Chien-Cheng Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHIP HEALTH MONITOR
- Publication number 20200334118
- Publication date Oct 22, 2020
- NXP. B.V.
- Jurgen Geerlings
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transient Sensitivity Analysis
- Publication number 20200327207
- Publication date Oct 15, 2020
- ProPlus Electronics Co. Ltd.
- Yutao MA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR IMPLEMENTING FUNCTIONAL LOGICS OF VERIFICATIO...
- Publication number 20200311216
- Publication date Oct 1, 2020
- SILICONCH SYSTEMS PVT LTD
- Kaustubh KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CYCLE LATCH TREE SYNTHESIS
- Publication number 20200311221
- Publication date Oct 1, 2020
- International Business Machines Corporation
- Lakshmi N. Reddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE ERROR CORRECTION IN QUANTUM COMPUTING
- Publication number 20200311220
- Publication date Oct 1, 2020
- International Business Machines Corporation
- John A. Gunnels
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOFTWARE INTEGRATION INTO HARDWARE VERIFICATION
- Publication number 20200272701
- Publication date Aug 27, 2020
- BAE SYSTEMS INFORMATION AND ELECTRONIC SYSTEMS INTEGRATION INC
- Jeffrey E. Robertson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATIC COVER POINT GENERATION BASED ON REGISTER TRANSFER LEVEL A...
- Publication number 20200265123
- Publication date Aug 20, 2020
- International Business Machines Corporation
- Kousik Dan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DESIGN AND FABRICATION
- Publication number 20200250281
- Publication date Aug 6, 2020
- ARM Limited
- Sean James SALISBURY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRACKING REFERENCES TO INFORMATION STORAGE RESOURCES IN A QUANTUM C...
- Publication number 20200242207
- Publication date Jul 30, 2020
- IonQ, Inc.
- Omar Shehab
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR QUANTUM PERFORMANCE AND/OR ERROR CORRECTIO...
- Publication number 20200242208
- Publication date Jul 30, 2020
- Intel Corporation
- Sahar Daraeizadeh
- G06 - COMPUTING CALCULATING COUNTING

Formal methods

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Systems and methods for obfuscating a circuit design

Bandwidth test in networking System-on-Chip verification

Systems and methods for inter-die block level design

Memory access optimisation using per-layer computational mapping an...

Phase noise reduction in voltage controlled oscillators

Concurrent testbench and software driven verification

Computing system and method of performing verification of circuit d...

Slack time recycling

Circuit generation based on zero wire load assertions

Application- or algorithm-specific quantum circuit design

Analyzing model based on design interest

Latency test in networking system-on-chip verification

Photonic circuit design systems

Boolean satisfiability (SAT) solver

System, method and computer-accessible medium providing secure inte...

Register pull-out for sequential circuit blocks in circuit designs

Method and system for converting a single-threaded software program...

Verifying planarization performance using electrical measures

Glitch detection at clock domain crossing

System, method, and computer program product for displaying multipl...

Hardware and software event tracing for a system-on-chip

Method and apparatus for selecting integrated circuit device neural...

Systems and methods for estimating a power consumption of a registe...

Method for designing an integrated circuit, and method of manufactu...

Flow control in networking system-on-chip verification

Modulo hardware generator

Core-only system management interrupt

Computer implemented system and method of translation of verificati...

Initial-state and next-state value folding

Wafer trust via location locked circuit layout with measurable inte...

Patents Applicationslast 30 patents

AUTOMATED DESIGN CLOSURE WITH ABUTTED HIERARCHY

ADAPTIVE PENALTY TERM DETERMINATIONS IN APPLICATIONS OF QUANTUM COM...

METHOD OF DEBUGGING HARDWARE AND FIRMWARE OF DATA STORAGE

Via Coloring Methods and Systems

ELECTROSTATIC DISCHARGE PROTECTION FOR STACKED-DIE SYSTEM

MODULAR EVENT-BASED PERFORMANCE MONITORING IN INTEGRATED CIRCUIT DE...

CURRENT SENSOR

CAD FRAMEWORK FOR POWER SIDE-CHANNEL VULNERABILITY ASSESSMENT

FEEDBACK-AWARE SLACK STEALING ACROSS TRANSPARENT LATCHES EMPOWERING...

DETERMINISTIC TEST PATTERN GENERATION FOR DESIGNS WITH TIMING EXCEP...

MESSAGE SELECTION FOR HARDWARE TRACING IN SYSTEM-ON-CHIP POST-SILIC...

HIERARCHICAL CLOCK TREE CONSTRUCTION BASED ON CONSTRAINTS

FUSE-BASED LOGIC REPAIR

SELECTIVELY GROUNDING FILL WIRES

ITERATIVE APPROACH TO DETERMINE FAILURE THRESHOLD ASSOCIATED WITH D...

SYSTEM AND PART DESIGN BASED ON STRUCTURED REQUIREMENTS

SIMULATION METHOD FOR USE IN FUNCTIONAL EQUIVALENCE CHECK

GENERATION OF DYNAMIC DESIGN FLOWS FOR INTEGRATED CIRCUITS

WAFER CHARACTERISTIC PREDICTION METHOD AND ELECTRONIC DEVICE

METHOD OF USING SIMULATION SOFTWARE TO GENERATE CIRCUIT LAYOUT

CHIP HEALTH MONITOR

Transient Sensitivity Analysis

SYSTEM AND METHOD FOR IMPLEMENTING FUNCTIONAL LOGICS OF VERIFICATIO...

MULTI-CYCLE LATCH TREE SYNTHESIS

ADAPTIVE ERROR CORRECTION IN QUANTUM COMPUTING

SOFTWARE INTEGRATION INTO HARDWARE VERIFICATION

AUTOMATIC COVER POINT GENERATION BASED ON REGISTER TRANSFER LEVEL A...

INTEGRATED CIRCUIT DESIGN AND FABRICATION

TRACKING REFERENCES TO INFORMATION STORAGE RESOURCES IN A QUANTUM C...

APPARATUS AND METHOD FOR QUANTUM PERFORMANCE AND/OR ERROR CORRECTIO...