In system interconnect

Industry

CPC
G06F2212/306

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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures

Current Industry

G06F2212/306In system interconnect

Industries

Patents Grantslast 30 patents

Information Patent Grant
Intelligent hierarchical caching based on metrics for objects in di...
- Patent number 11,216,382
- Issue date Jan 4, 2022
- Amazon Technologies, Inc.
- Karthik Uthaman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identification of a computing device accessing a shared memory
- Patent number 11,163,681
- Issue date Nov 2, 2021
- International Business Machines Corporation
- Nobuyuki Ohba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation lookaside buffer (TLB) clustering system for checking m...
- Patent number 10,621,107
- Issue date Apr 14, 2020
- ARM Limited
- Paolo Monti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system and SoC including linear remapper and access window
- Patent number 10,503,637
- Issue date Dec 10, 2019
- Samsung Electronics Co., Ltd.
- Dongsik Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory descriptor list caching and pipeline processing
- Patent number 10,452,581
- Issue date Oct 22, 2019
- Microsoft Technology Licensing, LLC
- Mei L. Wilson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identification of a computing device accessing a shared memory
- Patent number 10,241,917
- Issue date Mar 26, 2019
- International Business Machines Corporation
- Nobuyuki Ohba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identification of a computing device accessing a shared memory
- Patent number 10,169,237
- Issue date Jan 1, 2019
- International Business Machines Corporation
- Nobuyuki Ohba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for copying data using cache
- Patent number 9,984,010
- Issue date May 29, 2018
- Samsung Electronics Co., Ltd.
- Jin Yong Jang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identification of a computing device accessing a shared memory
- Patent number 9,940,237
- Issue date Apr 10, 2018
- International Business Machines Corporation
- Nobuyuki Ohba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identification of a computing device accessing a shared memory
- Patent number 9,928,175
- Issue date Mar 27, 2018
- International Business Machines Corporation
- Nobuyuki Ohba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory descriptor list caching and pipeline processing
- Patent number 9,817,776
- Issue date Nov 14, 2017
- Microsoft Technology Licensing, LLC
- Mei L. Wilson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System on chip including memory management unit and memory address...
- Patent number 9,348,764
- Issue date May 24, 2016
- Samsung Electronics Co., Ltd.
- Seok Min Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing dynamic configuration
- Patent number 9,122,616
- Issue date Sep 1, 2015
- MediaTek Inc.
- You-Ming Tsao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Monitor implementation in a multicore processor with inclusive LLC
- Patent number 7,590,805
- Issue date Sep 15, 2009
- Intel Corporation
- Krishnakanth V. Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and arrangements for hybrid data storage
- Patent number 7,584,335
- Issue date Sep 1, 2009
- International Business Machines Corporation
- Scott L. Daniels
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor and method for utilizing disparity between bus clock...
- Patent number 7,313,658
- Issue date Dec 25, 2007
- VIA Technologies, Inc.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor and method for utilizing disparity between bus clock...
- Patent number 6,985,999
- Issue date Jan 10, 2006
- IP First, LLC
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for allowing PCI-PCI bridges to cache data without any co...
- Patent number 6,820,161
- Issue date Nov 16, 2004
- International Business Machines Corporation
- Michael Anthony Perez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disconnecting a device on a cache line boundary in response to a wr...
- Patent number 6,807,590
- Issue date Oct 19, 2004
- Hewlett-Packard Development Company, L.P.
- Jeff M. Carlson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for efficient tracking of bus coherency by usi...
- Patent number 6,496,904
- Issue date Dec 17, 2002
- Compaq Information Technologies Group, L.P.
- Robert L. Noonan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bridge method, bus bridge, and multiprocessor system
- Patent number 6,341,334
- Issue date Jan 22, 2002
- Mitsubishi Denki Kabushiki Kaisha
- Toshihisa Kamemaru
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus bridge and method for ordering read and write operations in a w...
- Patent number 6,157,977
- Issue date Dec 5, 2000
- Hewlett-Packard Company
- Derek A Sherlock
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEMS AND METHODS FOR TRANSFORMING DATA IN-LINE WITH READS AND WR...
- Publication number 20220327052
- Publication date Oct 13, 2022
- META PLATFORMS, INC.
- Narsing Krishna Vijayrao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IDENTIFICATION OF A COMPUTING DEVICE ACCESSING A SHARED MEMORY
- Publication number 20190146921
- Publication date May 16, 2019
- International Business Machines Corporation
- Nobuyuki Ohba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Descriptor List Caching and Pipeline Processing
- Publication number 20180173656
- Publication date Jun 21, 2018
- Microsoft Technology Licensing, LLC
- Mei L. Wilson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IDENTIFICATION OF A COMPUTING DEVICE ACCESSING A SHARED MEMORY
- Publication number 20180004665
- Publication date Jan 4, 2018
- International Business Machines Corporation
- Nobuyuki Ohba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IDENTIFICATION OF A COMPUTING DEVICE ACCESSING A SHARED MEMORY
- Publication number 20180004666
- Publication date Jan 4, 2018
- International Business Machines Corporation
- Nobuyuki Ohba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Descriptor List Caching and Pipeline Processing
- Publication number 20160210233
- Publication date Jul 21, 2016
- Microsoft Microsoft Technology Licensing, LLC
- Mei L. Wilson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM AND SoC INCLUDING LINEAR REMAPPER AND ACCESS WINDOW
- Publication number 20160124851
- Publication date May 5, 2016
- Dongsik Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ACCESS TRACING METHOD
- Publication number 20150331795
- Publication date Nov 19, 2015
- International Business Machines Corporation
- Nobuyuki Ohba
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Parallel, pipelined, integrated-circuit implementation of a computa...
- Publication number 20150012708
- Publication date Jan 8, 2015
- Bring Technology Inc.
- Jorge RUBINSTEIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PERFORMING DYNAMIC CONFIGURATION
- Publication number 20140365730
- Publication date Dec 11, 2014
- You-Ming Tsao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM ON CHIP INCLUDING MEMORY MANAGEMENT UNIT AND MEMORY ADDRESS...
- Publication number 20140195742
- Publication date Jul 10, 2014
- Seok Min KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and Arrangements for Hybrid Data Storage
- Publication number 20080126716
- Publication date May 29, 2008
- Scott L. Daniels
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Device with cache command forwarding
- Publication number 20070174470
- Publication date Jul 26, 2007
- Bridgeworks Limited
- Paul Burgess
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Monitor implementation in a multicore processor with inclusive LLC
- Publication number 20070156971
- Publication date Jul 5, 2007
- Krishnakanth V. Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enforcing global ordering using an inter-queue ordering mechanism
- Publication number 20070005865
- Publication date Jan 4, 2007
- Bryan L. Spry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Selectively prefetch method and bridge module
- Publication number 20060294316
- Publication date Dec 28, 2006
- Via Technologies, Inc.
- Kuan-Jui Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessor and method for utilizing disparity between bus clock...
- Publication number 20060031640
- Publication date Feb 9, 2006
- VIA Technologies, Inc.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessor and method for utilizing disparity between bus clock...
- Publication number 20030093636
- Publication date May 15, 2003
- IP-First, LLC
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING

In system interconnect

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Intelligent hierarchical caching based on metrics for objects in di...

Identification of a computing device accessing a shared memory

Translation lookaside buffer (TLB) clustering system for checking m...

Memory system and SoC including linear remapper and access window

Memory descriptor list caching and pipeline processing

Identification of a computing device accessing a shared memory

Identification of a computing device accessing a shared memory

Method and apparatus for copying data using cache

Identification of a computing device accessing a shared memory

Identification of a computing device accessing a shared memory

Memory descriptor list caching and pipeline processing

System on chip including memory management unit and memory address...

Method and apparatus for performing dynamic configuration

Monitor implementation in a multicore processor with inclusive LLC

Methods and arrangements for hybrid data storage

Microprocessor and method for utilizing disparity between bus clock...

Microprocessor and method for utilizing disparity between bus clock...

Mechanism for allowing PCI-PCI bridges to cache data without any co...

Disconnecting a device on a cache line boundary in response to a wr...

Method and apparatus for efficient tracking of bus coherency by usi...

Bridge method, bus bridge, and multiprocessor system

Bus bridge and method for ordering read and write operations in a w...

Patents Applicationslast 30 patents

SYSTEMS AND METHODS FOR TRANSFORMING DATA IN-LINE WITH READS AND WR...

IDENTIFICATION OF A COMPUTING DEVICE ACCESSING A SHARED MEMORY

Memory Descriptor List Caching and Pipeline Processing

IDENTIFICATION OF A COMPUTING DEVICE ACCESSING A SHARED MEMORY

IDENTIFICATION OF A COMPUTING DEVICE ACCESSING A SHARED MEMORY

Memory Descriptor List Caching and Pipeline Processing

MEMORY SYSTEM AND SoC INCLUDING LINEAR REMAPPER AND ACCESS WINDOW

MEMORY ACCESS TRACING METHOD

Parallel, pipelined, integrated-circuit implementation of a computa...

METHOD AND APPARATUS FOR PERFORMING DYNAMIC CONFIGURATION

SYSTEM ON CHIP INCLUDING MEMORY MANAGEMENT UNIT AND MEMORY ADDRESS...

Methods and Arrangements for Hybrid Data Storage

Device with cache command forwarding

Monitor implementation in a multicore processor with inclusive LLC

Enforcing global ordering using an inter-queue ordering mechanism

Selectively prefetch method and bridge module

Microprocessor and method for utilizing disparity between bus clock...

Microprocessor and method for utilizing disparity between bus clock...