Invalidation

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CPC
G06F2212/683

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures

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G06F2212/683Invalidation

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Patents Grantslast 30 patents

Information Patent Grant
Translation support for a virtual cache
- Patent number 12,141,076
- Issue date Nov 12, 2024
- International Business Machines Corporation
- Markus Helms
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Process dedicated in-memory translation lookaside buffers (TLBs) (m...
- Patent number 12,093,186
- Issue date Sep 17, 2024
- Microsoft Technology Licensing, LLC
- Madhavan Thirukkurungudi Venkataraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing translation lookaside buffer searches for splintered pages
- Patent number 12,079,140
- Issue date Sep 3, 2024
- Apple Inc.
- John D. Pape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
64-bit virtual addresses having metadata bit(s) and canonicality ch...
- Patent number 12,032,485
- Issue date Jul 9, 2024
- Intel Corporation
- Vedvyas Shanbhogue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage array invalidation maintenance
- Patent number 11,989,131
- Issue date May 21, 2024
- Apple Inc.
- Sreevathsa Ramachandra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtualized-in-hardware input output memory management
- Patent number 11,907,542
- Issue date Feb 20, 2024
- MIPS Tech, LLC
- Sanjay Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
History-based selective cache line invalidation requests
- Patent number 11,822,479
- Issue date Nov 21, 2023
- Advanced Micro Devices, Inc.
- Paul J. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Process dedicated in-memory translation lookaside buffers (TLBs) (m...
- Patent number 11,803,482
- Issue date Oct 31, 2023
- Microsoft Technology Licensing, LLC
- Madhavan Thirukkurungudi Venkataraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory scanning methods and apparatus
- Patent number 11,797,678
- Issue date Oct 24, 2023
- Intel Corporation
- Michael LeMay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation support for a virtual cache
- Patent number 11,775,445
- Issue date Oct 3, 2023
- International Business Machines Corporation
- Markus Helms
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for broadcast cache invalidation
- Patent number 11,775,436
- Issue date Oct 3, 2023
- Open Text SA ULC
- Michael Gerard Jaskiewicz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power aware translation lookaside buffer invalidation optimization
- Patent number 11,741,017
- Issue date Aug 29, 2023
- Apple Inc.
- Kutty Banerjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Poison mechanisms for deferred invalidates
- Patent number 11,630,771
- Issue date Apr 18, 2023
- Apple Inc.
- John D Pape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache system with a primary cache and an overflow cache that use di...
- Patent number 11,620,220
- Issue date Apr 4, 2023
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Colin Eddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing translation lookaside buffer searches for splintered pages
- Patent number 11,615,033
- Issue date Mar 28, 2023
- Apple Inc.
- John D. Pape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address translation data invalidation
- Patent number 11,615,032
- Issue date Mar 28, 2023
- ARM Limited
- Matthew James Horsnell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtualized-in-hardware input output memory management
- Patent number 11,599,270
- Issue date Mar 7, 2023
- MIPS Tech, LLC
- Sanjay Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage array invalidation maintenance
- Patent number 11,586,551
- Issue date Feb 21, 2023
- Apple Inc.
- Sreevathsa Ramachandra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data compression and encryption based on translation lookaside buff...
- Patent number 11,507,519
- Issue date Nov 22, 2022
- Advanced Micro Devices, Inc.
- Jagadish B. Kotra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fine-grained access memory controller
- Patent number 11,467,973
- Issue date Oct 11, 2022
- Amazon Technologies, Inc.
- Ron Diamant
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Epoch-based determination of completion of barrier termination command
- Patent number 11,379,152
- Issue date Jul 5, 2022
- ARM Limited
- Andrew Brookfield Swaine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Paging of external memory
- Patent number 11,379,131
- Issue date Jul 5, 2022
- Kove IP, LLC
- Timothy A. Stabrawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system using SRAM with flag information to identify unmapped...
- Patent number 11,366,736
- Issue date Jun 21, 2022
- SK Hynix Inc.
- Byeong Gyu Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Paging of external memory
- Patent number 11,360,679
- Issue date Jun 14, 2022
- Kove IP, LLC
- Timothy A. Stabrawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation lookaside buffer invalidation for merged invalidation r...
- Patent number 11,275,697
- Issue date Mar 15, 2022
- Apple Inc.
- Kutty Banerjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Process dedicated in-memory translation lookaside buffers (TLBs) (m...
- Patent number 11,232,042
- Issue date Jan 25, 2022
- Microsoft Technology Licensing, LLC
- Madhavan Thirukkurungudi Venkataraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data storage devices and data processing methods
- Patent number 11,216,381
- Issue date Jan 4, 2022
- Silicon Motion, Inc.
- Kuan-Yu Ke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for handling address translation invalidations us...
- Patent number 11,210,233
- Issue date Dec 28, 2021
- International Business Machines Corporation
- Jake Truelove
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pause communication from I/O devices supporting page faults
- Patent number 11,169,929
- Issue date Nov 9, 2021
- Intel Corporation
- Rupin Vakharwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for broadcast cache invalidation
- Patent number 11,157,410
- Issue date Oct 26, 2021
- Open Text SA ULC
- Michael Gerard Jaskiewicz
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
VIRTUALIZED-IN-HARDWARE INPUT OUTPUT MEMORY MANAGEMENT
- Publication number 20240160353
- Publication date May 16, 2024
- MIPS Tech, LLC
- Sanjay Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESS DEDICATED IN-MEMORY TRANSLATION LOOKASIDE BUFFERS (TLBs) (m...
- Publication number 20240028522
- Publication date Jan 25, 2024
- Microsoft Technology Licensing, LLC
- Madhavan Thirukkurungudi VENKATARAMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR BROADCAST CACHE INVALIDATION
- Publication number 20230367714
- Publication date Nov 16, 2023
- Open Text SA ULC
- Michael Gerard Jaskiewicz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Storage Array Invalidation Maintenance
- Publication number 20230305965
- Publication date Sep 28, 2023
- Apple Inc.
- Sreevathsa Ramachandra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCAL MEMORY TRANSLATION TABLE
- Publication number 20230298128
- Publication date Sep 21, 2023
- Intel Corporation
- David Puffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reducing Translation Lookaside Buffer Searches for Splintered Pages
- Publication number 20230236988
- Publication date Jul 27, 2023
- Apple Inc.
- John D. Pape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HISTORY-BASED SELECTIVE CACHE LINE INVALIDATION REQUESTS
- Publication number 20230137467
- Publication date May 4, 2023
- ADVANCED MICRO DEVICES, INC.
- Paul J. Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUALIZED-IN-HARDWARE INPUT OUTPUT MEMORY MANAGEMENT
- Publication number 20230105881
- Publication date Apr 6, 2023
- MIPS Tech, LLC
- Sanjay Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Poison Mechanisms for Deferred Invalidates
- Publication number 20230017473
- Publication date Jan 19, 2023
- Apple Inc.
- John D. Pape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CPU CACHE
- Publication number 20220334742
- Publication date Oct 20, 2022
- KOVE IP, LLC
- Timothy A. Stabrawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COORDINATED ALLOCATION OF EXTERNAL MEMORY
- Publication number 20220317903
- Publication date Oct 6, 2022
- KOVE IP, LLC
- Timothy A. Stabrawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power Aware Translation Lookaside Buffer Invalidation Optimization
- Publication number 20220269619
- Publication date Aug 25, 2022
- Apple Inc.
- Kutty Banerjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
64-BIT VIRTUAL ADDRESSES HAVING METADATA BIT(S) AND CANONICALITY CH...
- Publication number 20220197822
- Publication date Jun 23, 2022
- Intel Corporation
- Vedvyas SHANBHOGUE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESS DEDICATED IN-MEMORY TRANSLATION LOOKASIDE BUFFERS (TLBs) (m...
- Publication number 20220147463
- Publication date May 12, 2022
- Microsoft Technology Licensing, LLC
- Madhavan Thirukkurungudi VENKATARAMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reducing Translation Lookaside Buffer Searches for Splintered Pages
- Publication number 20220075734
- Publication date Mar 10, 2022
- Apple Inc.
- John D. Pape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Storage Array Invalidation Maintenance
- Publication number 20220066941
- Publication date Mar 3, 2022
- Apple Inc.
- Sreevathsa Ramachandra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR BROADCAST CACHE INVALIDATION
- Publication number 20220043749
- Publication date Feb 10, 2022
- Open Text SA ULC
- Michael Gerard Jaskiewicz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SCANNING METHODS AND APPARATUS
- Publication number 20210349999
- Publication date Nov 11, 2021
- Intel Corporation
- Michael LeMay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR HANDLING TRANSLATION INVALIDATIONS BACKGROUND
- Publication number 20210209031
- Publication date Jul 8, 2021
- International Business Machines Corporation
- Jake Truelove
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PAGING OF EXTERNAL MEMORY
- Publication number 20210141548
- Publication date May 13, 2021
- KOVE IP, LLC
- Timothy A. Stabrawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EPOCH-BASED DETERMINATION OF COMPLETION OF BARRIER TERMINATION COMMAND
- Publication number 20210026568
- Publication date Jan 28, 2021
- ARM LIMITED
- Andrew Brookfield SWAINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Managing Commit Order for an External Instruction Relative to Queue...
- Publication number 20210011729
- Publication date Jan 14, 2021
- Marvell Asia Pte, Ltd.
- Shubhendu Sekhar Mukherjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power Aware Translation Lookaside Buffer Invalidation Optimization
- Publication number 20200379920
- Publication date Dec 3, 2020
- Apple Inc.
- Kutty Banerjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED ACCELERATOR MEMORY SYSTEMS AND METHODS
- Publication number 20200310993
- Publication date Oct 1, 2020
- Intel Corporation
- Sanjay Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUALIZED-IN-HARDWARE INPUT OUTPUT MEMORY MANAGEMENT
- Publication number 20200264783
- Publication date Aug 20, 2020
- MIPS Tech, LLC
- Sanjay Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Translation Lookaside Buffer Invalidation By Range
- Publication number 20200218663
- Publication date Jul 9, 2020
- Apple Inc.
- Brian R. Mestan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERRUPTIBLE TRANSLATION ENTRY INVALIDATION IN A MULTITHREADED DAT...
- Publication number 20200201780
- Publication date Jun 25, 2020
- International Business Machines Corporation
- DEREK E. WILLIAMS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA LOCATION IDENTIFICATION
- Publication number 20200201767
- Publication date Jun 25, 2020
- International Business Machines Corporation
- John A. Schumann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data Storage Devices and Data Processing Methods
- Publication number 20200192810
- Publication date Jun 18, 2020
- SILICON MOTION, INC.
- Kuan-Yu KE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION LOOKASIDE BUFFER CACHE MARKER SCHEME FOR EMULATING SING...
- Publication number 20200192818
- Publication date Jun 18, 2020
- QUALCOMM Incorporated
- Vipul Gandhi
- G06 - COMPUTING CALCULATING COUNTING

Invalidation

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Translation support for a virtual cache

Process dedicated in-memory translation lookaside buffers (TLBs) (m...

Reducing translation lookaside buffer searches for splintered pages

64-bit virtual addresses having metadata bit(s) and canonicality ch...

Storage array invalidation maintenance

Virtualized-in-hardware input output memory management

History-based selective cache line invalidation requests

Process dedicated in-memory translation lookaside buffers (TLBs) (m...

Memory scanning methods and apparatus

Translation support for a virtual cache

System and method for broadcast cache invalidation

Power aware translation lookaside buffer invalidation optimization

Poison mechanisms for deferred invalidates

Cache system with a primary cache and an overflow cache that use di...

Reducing translation lookaside buffer searches for splintered pages

Address translation data invalidation

Virtualized-in-hardware input output memory management

Storage array invalidation maintenance

Data compression and encryption based on translation lookaside buff...

Fine-grained access memory controller

Epoch-based determination of completion of barrier termination command

Paging of external memory

Memory system using SRAM with flag information to identify unmapped...

Paging of external memory

Translation lookaside buffer invalidation for merged invalidation r...

Process dedicated in-memory translation lookaside buffers (TLBs) (m...

Data storage devices and data processing methods

System and method for handling address translation invalidations us...

Pause communication from I/O devices supporting page faults

System and method for broadcast cache invalidation

Patents Applicationslast 30 patents

VIRTUALIZED-IN-HARDWARE INPUT OUTPUT MEMORY MANAGEMENT

PROCESS DEDICATED IN-MEMORY TRANSLATION LOOKASIDE BUFFERS (TLBs) (m...

SYSTEM AND METHOD FOR BROADCAST CACHE INVALIDATION

Storage Array Invalidation Maintenance

LOCAL MEMORY TRANSLATION TABLE

Reducing Translation Lookaside Buffer Searches for Splintered Pages

HISTORY-BASED SELECTIVE CACHE LINE INVALIDATION REQUESTS

VIRTUALIZED-IN-HARDWARE INPUT OUTPUT MEMORY MANAGEMENT

Poison Mechanisms for Deferred Invalidates

CPU CACHE

COORDINATED ALLOCATION OF EXTERNAL MEMORY

Power Aware Translation Lookaside Buffer Invalidation Optimization

64-BIT VIRTUAL ADDRESSES HAVING METADATA BIT(S) AND CANONICALITY CH...

PROCESS DEDICATED IN-MEMORY TRANSLATION LOOKASIDE BUFFERS (TLBs) (m...

Reducing Translation Lookaside Buffer Searches for Splintered Pages

Storage Array Invalidation Maintenance

SYSTEM AND METHOD FOR BROADCAST CACHE INVALIDATION

MEMORY SCANNING METHODS AND APPARATUS

SYSTEM AND METHOD FOR HANDLING TRANSLATION INVALIDATIONS BACKGROUND

PAGING OF EXTERNAL MEMORY

EPOCH-BASED DETERMINATION OF COMPLETION OF BARRIER TERMINATION COMMAND

Managing Commit Order for an External Instruction Relative to Queue...

Power Aware Translation Lookaside Buffer Invalidation Optimization

SHARED ACCELERATOR MEMORY SYSTEMS AND METHODS

VIRTUALIZED-IN-HARDWARE INPUT OUTPUT MEMORY MANAGEMENT

Translation Lookaside Buffer Invalidation By Range

INTERRUPTIBLE TRANSLATION ENTRY INVALIDATION IN A MULTITHREADED DAT...

DATA LOCATION IDENTIFICATION

Data Storage Devices and Data Processing Methods

TRANSLATION LOOKASIDE BUFFER CACHE MARKER SCHEME FOR EMULATING SING...