LOAD or STORE instructions; Clear instruction

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G06F9/30043

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F9/00Arrangements for programme control

Current Industry

G06F9/30043LOAD or STORE instructions; Clear instruction

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Patents Grantslast 30 patents

Information Patent Grant
Hybrid victim cache and write miss buffer with fence operation
- Patent number 12,265,477
- Issue date Apr 1, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Re-triggering wake-up to handle time skew between scalar and vector...
- Patent number 12,265,829
- Issue date Apr 1, 2025
- SiFive, Inc.
- Kuan Lin Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for multi-banked victim cache with dual datapath
- Patent number 12,259,826
- Issue date Mar 25, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory having internal processors and data communication methods in...
- Patent number 12,259,829
- Issue date Mar 25, 2025
- Robert M. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for matrix add, subtract, and mul...
- Patent number 12,260,213
- Issue date Mar 25, 2025
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coprocessor operation bundling
- Patent number 12,242,855
- Issue date Mar 4, 2025
- Apple Inc.
- Aditya Kesiraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data initialization techniques
- Patent number 12,242,414
- Issue date Mar 4, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-core processor, multi-core processor processing method, and r...
- Patent number 12,242,415
- Issue date Mar 4, 2025
- Huawei Technologies Co., Ltd.
- Guozhu Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Look-up table initialize
- Patent number 12,242,852
- Issue date Mar 4, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer checker for task processing fault detection
- Patent number 12,242,886
- Issue date Mar 4, 2025
- Imagination Technologies Limited
- Wei Shao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods to load a tile register pair
- Patent number 12,236,242
- Issue date Feb 25, 2025
- Intel Corporation
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Group thread dispatch for graph streaming processor
- Patent number 12,236,245
- Issue date Feb 25, 2025
- Blaize Inc.
- Kota Vamsi Krishna Darsi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block data load with transpose into memory
- Patent number 12,229,570
- Issue date Feb 18, 2025
- Advanced Micro Devices, Inc.
- Bin He
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Predicting a load value for a subsequent load operation
- Patent number 12,229,556
- Issue date Feb 18, 2025
- ARM Limited
- Alexander Cole Shulyak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic operation predictor to predict whether an atomic operation w...
- Patent number 12,229,557
- Issue date Feb 18, 2025
- Apple Inc.
- Brian R. Mestan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor that prevents store-to-load forwarding between diffe...
- Patent number 12,229,252
- Issue date Feb 18, 2025
- Ventana Micro Systems Inc.
- John G. Favor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Order-preserving method and system for multiple sets of load store...
- Patent number 12,223,326
- Issue date Feb 11, 2025
- Rivai Technologies (Shenzhen) Co., Ltd.
- Xiangyu Mao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for variable precision computing
- Patent number 12,217,055
- Issue date Feb 4, 2025
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Riccardo Alidori
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-layer data cache to prevent user experience interrupts during...
- Patent number 12,217,058
- Issue date Feb 4, 2025
- Brex, Inc.
- Ming Xiao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for scalable qubit addressing
- Patent number 12,217,130
- Issue date Feb 4, 2025
- Intel Corporation
- Xiang Zou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of storing register data elements to interleave with data el...
- Patent number 12,217,054
- Issue date Feb 4, 2025
- Texas Instruments Incorporated
- Duc Quang Bui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Embedded system
- Patent number 12,217,057
- Issue date Feb 4, 2025
- STMICROELECTRONICS BELGIUM
- Youssef Ahssini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic compare and swap in a coherent cache system
- Patent number 12,216,591
- Issue date Feb 4, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving cache efficiency and utilization
- Patent number 12,210,477
- Issue date Jan 28, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Aggressive write flush scheme for a victim cache
- Patent number 12,210,463
- Issue date Jan 28, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implicit global pointer relative addressing for global memory access
- Patent number 12,210,876
- Issue date Jan 28, 2025
- MIPS Tech, LLC
- James Hippisley Robinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor data access and sharing
- Patent number 12,204,487
- Issue date Jan 21, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache support for indirect loads and indirect stores in graph appli...
- Patent number 12,204,901
- Issue date Jan 21, 2025
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transparent and remote kernel execution in a heterogeneous computin...
- Patent number 12,204,940
- Issue date Jan 21, 2025
- Xilinx, Inc.
- Sonal Santan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor supporting position-independent addressing
- Patent number 12,204,907
- Issue date Jan 21, 2025
- Oracle International Corporation
- Mario Wolczko
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM
- Publication number 20250117340
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE MEMORY MANAGEMENT
- Publication number 20250117356
- Publication date Apr 10, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM
- Publication number 20250117341
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENTERING PROTECTED PIPELINE MODE WITHOUT ANNULLING PENDING INSTRUCT...
- Publication number 20250117247
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Duc BUI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR TILE TRANSPOSE
- Publication number 20250117221
- Publication date Apr 10, 2025
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR TILE MATRIX MULTIPLICATION AN...
- Publication number 20250117222
- Publication date Apr 10, 2025
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR, METHOD, DEVICE AND STORAGE MEDIUM FOR DATA PROCESSING
- Publication number 20250110742
- Publication date Apr 3, 2025
- Beijing Youzhuju Network Technology Co., Ltd.
- Yuhui CAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION
- Publication number 20250103548
- Publication date Mar 27, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20250103546
- Publication date Mar 27, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor Operand Management Using Fusion Buffer
- Publication number 20250103338
- Publication date Mar 27, 2025
- Apple Inc.
- Ran Aharon Chachick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE
- Publication number 20250103547
- Publication date Mar 27, 2025
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULLY PIPELINED READ-MODIFY-WRITE SUPPORT
- Publication number 20250094359
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE CONTEXT SAVE AND RESTORE
- Publication number 20250094209
- Publication date Mar 20, 2025
- INFINEON TECHNOLOGIES AG
- Manoj Kumar Harihar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA TRACE INDEXING AND TRACE PACKET ENCAPSULATION
- Publication number 20250094312
- Publication date Mar 20, 2025
- Apple Inc.
- Alon YAAKOV
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...
- Publication number 20250094358
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System Cache Path To Enable Path-To-DDR Infrastructure Scan Dump Du...
- Publication number 20250094264
- Publication date Mar 20, 2025
- QUALCOMM Incorporated
- Mohsin RIAZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor Supporting Position-Independent Addressing
- Publication number 20250094172
- Publication date Mar 20, 2025
- Oracle International Corporation
- Mario Wolczko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR VERIFYING DATA IN MEMORY
- Publication number 20250086053
- Publication date Mar 13, 2025
- Samsung Electronics Co., Ltd.
- Changhee JUNG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMANTIC ORDERING FOR PARALLEL ARCHITECTURE WITH COMPUTE SLICES
- Publication number 20250085970
- Publication date Mar 13, 2025
- Ascenium, Inc.
- Jacob John Vorland Taylor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING SYSTEMS
- Publication number 20250068420
- Publication date Feb 27, 2025
- ARM Limited
- Daren Croxford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RANDOM SPARSITY HANDLING IN A SYSTOLIC ARRAY
- Publication number 20250053613
- Publication date Feb 13, 2025
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Video Compression in Removable Storage Device having Deep Learning...
- Publication number 20250053537
- Publication date Feb 13, 2025
- Micron Technology, Inc.
- Poorna Kale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER SYSTEM ENABLED WITH RUNTIME SOFTWARE MODULE TRACKING
- Publication number 20250053432
- Publication date Feb 13, 2025
- Kodem Security Ltd.
- Pavel FURMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...
- Publication number 20250036573
- Publication date Jan 30, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PADDING IN A STREAM OF MATRIX ELEMENTS
- Publication number 20250036411
- Publication date Jan 30, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Son Hung Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR PREFETCHING FUNCTION SEGMENT AND NETWORK DEVICE
- Publication number 20250036414
- Publication date Jan 30, 2025
- Huawei Technologies Co., Ltd
- Hui Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR
- Publication number 20250036409
- Publication date Jan 30, 2025
- Fujitsu Limited
- Sota SAKASHITA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY
- Publication number 20250028675
- Publication date Jan 23, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES
- Publication number 20250028652
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE
- Publication number 20250028651
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING

LOAD or STORE instructions; Clear instruction

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Hybrid victim cache and write miss buffer with fence operation

Re-triggering wake-up to handle time skew between scalar and vector...

Methods and apparatus for multi-banked victim cache with dual datapath

Memory having internal processors and data communication methods in...

Systems, methods, and apparatuses for matrix add, subtract, and mul...

Coprocessor operation bundling

Data initialization techniques

Multi-core processor, multi-core processor processing method, and r...

Look-up table initialize

Buffer checker for task processing fault detection

Systems and methods to load a tile register pair

Group thread dispatch for graph streaming processor

Block data load with transpose into memory

Predicting a load value for a subsequent load operation

Atomic operation predictor to predict whether an atomic operation w...

Microprocessor that prevents store-to-load forwarding between diffe...

Order-preserving method and system for multiple sets of load store...

Method and device for variable precision computing

Multi-layer data cache to prevent user experience interrupts during...

Apparatus and method for scalable qubit addressing

Method of storing register data elements to interleave with data el...

Embedded system

Atomic compare and swap in a coherent cache system

Systems and methods for improving cache efficiency and utilization

Aggressive write flush scheme for a victim cache

Implicit global pointer relative addressing for global memory access

Graphics processor data access and sharing

Cache support for indirect loads and indirect stores in graph appli...

Transparent and remote kernel execution in a heterogeneous computin...

Processor supporting position-independent addressing

Patents Applicationslast 30 patents

ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM

MULTI-TILE MEMORY MANAGEMENT

METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM

ENTERING PROTECTED PIPELINE MODE WITHOUT ANNULLING PENDING INSTRUCT...

SYSTEMS, METHODS, AND APPARATUSES FOR TILE TRANSPOSE

SYSTEMS, METHODS, AND APPARATUSES FOR TILE MATRIX MULTIPLICATION AN...

PROCESSOR, METHOD, DEVICE AND STORAGE MEDIUM FOR DATA PROCESSING

SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION

CACHE STRUCTURE AND UTILIZATION

Processor Operand Management Using Fusion Buffer

SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE

FULLY PIPELINED READ-MODIFY-WRITE SUPPORT

CONFIGURABLE CONTEXT SAVE AND RESTORE

DATA TRACE INDEXING AND TRACE PACKET ENCAPSULATION

METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...

System Cache Path To Enable Path-To-DDR Infrastructure Scan Dump Du...

Processor Supporting Position-Independent Addressing

SYSTEMS AND METHODS FOR VERIFYING DATA IN MEMORY

SEMANTIC ORDERING FOR PARALLEL ARCHITECTURE WITH COMPUTE SLICES

DATA PROCESSING SYSTEMS

RANDOM SPARSITY HANDLING IN A SYSTOLIC ARRAY

Video Compression in Removable Storage Device having Deep Learning...

COMPUTER SYSTEM ENABLED WITH RUNTIME SOFTWARE MODULE TRACKING

METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...

PADDING IN A STREAM OF MATRIX ELEMENTS

METHOD FOR PREFETCHING FUNCTION SEGMENT AND NETWORK DEVICE

PROCESSOR

GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY

VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES

ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE