Loop control instructions; iterative instructions

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CPC
G06F9/30065

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F9/00Arrangements for programme control

Current Industry

G06F9/30065Loop control instructions; iterative instructions

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Embedded processor supporting fixed-function kernels
- Patent number 12,223,322
- Issue date Feb 11, 2025
- Microchip Technology Inc.
- Aaron Severance
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Load/store unit for a tensor engine and methods for loading or stor...
- Patent number 12,217,056
- Issue date Feb 4, 2025
- Celestial AI Inc.
- Philip Winterbottom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for programmed branch predictors
- Patent number 12,217,059
- Issue date Feb 4, 2025
- Advanced Micro Devices, Inc.
- Alexander Toufic Freij
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving cache efficiency and utilization
- Patent number 12,210,477
- Issue date Jan 28, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Artificial intelligence (AI)/machine learning (ML) tensor processor
- Patent number 12,204,456
- Issue date Jan 21, 2025
- Synopsys, Inc.
- Johannes Boonstra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor data access and sharing
- Patent number 12,204,487
- Issue date Jan 21, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic software interface translation for computing in a heterogen...
- Patent number 12,197,919
- Issue date Jan 14, 2025
- Next Silicon Ltd
- Elad Raz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous input dependency resolution mechanism
- Patent number 12,199,759
- Issue date Jan 14, 2025
- Intel Corporation
- Michal Mrozek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Executing a composite scalar-vector VLIW instruction having a repea...
- Patent number 12,182,576
- Issue date Dec 31, 2024
- International Business Machines Corporation
- Bruce M. Fleischer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,182,062
- Issue date Dec 31, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nested loop control
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- Issue date Dec 24, 2024
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- Kai Chirca
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Information Patent Grant
Tracking streaming engine vector predicates to control processor ex...
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- Issue date Dec 10, 2024
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- Duc Quang Bui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with macro-instruction achieving zero-latency data movement
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- Issue date Nov 26, 2024
- Silicon Laboratories Inc.
- Matthew Brandon Gately
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Information Patent Grant
Cache structure and utilization
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- Issue date Nov 26, 2024
- Intel Corporation
- Altug Koker
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Information Patent Grant
Systolic disaggregation within a matrix accelerator architecture
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- Issue date Nov 12, 2024
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Information Patent Grant
Implementing specialized instructions for accelerating dynamic prog...
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- Issue date Nov 12, 2024
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- Maciej Piotr Tyrlik
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Information Patent Grant
Information processing apparatus, information processing method, an...
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- Issue date Oct 22, 2024
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Information Patent Grant
Loop support extensions
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- Issue date Oct 8, 2024
- Intel Corporation
- Anant Nori
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Execution or write mask generation for data selection in a multi-th...
- Patent number 12,106,099
- Issue date Oct 1, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for vector permutation
- Patent number 12,105,635
- Issue date Oct 1, 2024
- Texas Instruments Incorporated
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Searching an array of multi-byte elements using an n-byte search in...
- Patent number 12,106,115
- Issue date Oct 1, 2024
- International Business Machines Corporation
- Motohiro Kawahito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,099,461
- Issue date Sep 24, 2024
- Intel Corporation
- Abhishek R. Appu
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Information Patent Grant
Streaming address generation
- Patent number 12,099,843
- Issue date Sep 24, 2024
- Texas Instruments Incorporated
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression techniques
- Patent number 12,093,210
- Issue date Sep 17, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for permuting streamed data elements
- Patent number 12,086,074
- Issue date Sep 10, 2024
- Texas Instruments Incorporated
- Soujanya Narnur
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Information Patent Grant
Apparatus for automated loop checking
- Patent number 12,080,983
- Issue date Sep 3, 2024
- UOP LLC
- Varun Prabhakar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for hardware-assisted pre-execution
- Patent number 12,079,631
- Issue date Sep 3, 2024
- Hewlett Packard Enterprise Development LP
- Sanyam Mehta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor operation scheduling for deterministic latency
- Patent number 12,079,155
- Issue date Sep 3, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Highly integrated scalable, flexible DSP megamodule architecture
- Patent number 12,072,812
- Issue date Aug 27, 2024
- Texas Instruments Incorporated
- Timothy D. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,066,975
- Issue date Aug 20, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY
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- Publication date Jan 23, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAMING ADDRESS GENERATION
- Publication number 20250013467
- Publication date Jan 9, 2025
- TEXAS INSTRUMENTS INCORPORATED
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- G06 - COMPUTING CALCULATING COUNTING
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SOFTWARE SPLITTING FOR SOFTWARE DEFINED CORES
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- Publication date Jan 2, 2025
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Information Patent Application
MULTI-TILE MEMORY MANAGEMENT
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- Abhishek R. Appu
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METHOD AND APPARATUS FOR VECTOR PERMUTATION
- Publication number 20240419606
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
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- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR ARCHITECTURE WITH MEMORY ACCESS CIRCUIT
- Publication number 20240411703
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- TEXAS INSTRUMENTS INCORPORATED
- Timothy D. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20240411717
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- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
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COMPRESSION TECHNIQUES
- Publication number 20240403259
- Publication date Dec 5, 2024
- Intel Corporation
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- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Load/Store Unit for a Tensor Engine and Methods for Loading or Stor...
- Publication number 20240403046
- Publication date Dec 5, 2024
- Celestial AI Inc.
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Information Patent Application
SYSTEMS AND METHODS FOR BALANCING COMPUTING RESOURCES
- Publication number 20240394059
- Publication date Nov 28, 2024
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- Henry Fangli KAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Method for Implementing a Loop Prediction of Multiple...
- Publication number 20240394064
- Publication date Nov 28, 2024
- Condor Computing Corporation
- Thang Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PERMUTING STREAMED DATA ELEMENTS
- Publication number 20240378158
- Publication date Nov 14, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Soujanya Narnur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOOP DETECTION METHOD AND APPARATUS, ELECTRONIC DEVICE, AND STORAGE...
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- Publication date Nov 7, 2024
- Beijing OceanBase Technology Co., Ltd.
- Xuwang TENG
- G06 - COMPUTING CALCULATING COUNTING
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GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...
- Publication number 20240362180
- Publication date Oct 31, 2024
- Intel Corporation
- Subramaniam Maiyuran
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Vector Based Matrix Multiplication
- Publication number 20240354259
- Publication date Oct 24, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Asheesh Bhardwaj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SORTING VECTOR ELEMENTS USING A COUNT VALUE
- Publication number 20240354260
- Publication date Oct 24, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-tile Memory Management for Detecting Cross Tile Access Provid...
- Publication number 20240345990
- Publication date Oct 17, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR IMPLIED BIT HANDLING IN FLOATING POINT MUL...
- Publication number 20240330203
- Publication date Oct 3, 2024
- TEXAS INSTRUMENTS INCORPORATED
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- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS
- Publication number 20240320184
- Publication date Sep 26, 2024
- Intel Corporation
- Altug Koker
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Information Patent Application
Nested Loop Optimization with Vector Memory Instructions
- Publication number 20240311154
- Publication date Sep 19, 2024
- SiFive, Inc.
- Nicholas Knight
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Information Patent Application
Method and Apparatus for Dual Issue Multiply Instructions
- Publication number 20240311313
- Publication date Sep 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy David Anderson
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Information Patent Application
NESTED LOOP CONTROL
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- Publication date Aug 22, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
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Information Patent Application
Domain Adaptive Processor For Wireless Communication
- Publication number 20240273058
- Publication date Aug 15, 2024
- The Regents of the University of Michigan
- Hun-seok KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR DATA ACCESS AND SHARING
- Publication number 20240256483
- Publication date Aug 1, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEARCHING AN ARRAY OF MULTI-BYTE ELEMENTS USING AN N-BYTE SEARCH IN...
- Publication number 20240256284
- Publication date Aug 1, 2024
- International Business Machines Corporation
- Motohiro Kawahito
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NEURAL NETWORK COMPUTE TILE
- Publication number 20240231819
- Publication date Jul 11, 2024
- Google LLC
- Olivier Temam
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Programmable Compute Architecture
- Publication number 20240232129
- Publication date Jul 11, 2024
- RapidSilicon US, Inc
- Pierre-Emmanuel Gaillardon
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Information Patent Application
STREAM DATA UNIT WITH MULTIPLE HEAD REGISTERS
- Publication number 20240220258
- Publication date Jul 4, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple Multiplication Units in a Data Path
- Publication number 20240211411
- Publication date Jun 27, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Mujibur Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAMING ENGINE WITH VARIABLE STREAM TEMPLATE FORMAT
- Publication number 20240202123
- Publication date Jun 20, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING

Loop control instructions; iterative instructions

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Embedded processor supporting fixed-function kernels

Load/store unit for a tensor engine and methods for loading or stor...

Systems and methods for programmed branch predictors

Systems and methods for improving cache efficiency and utilization

Artificial intelligence (AI)/machine learning (ML) tensor processor

Graphics processor data access and sharing

Dynamic software interface translation for computing in a heterogen...

Asynchronous input dependency resolution mechanism

Executing a composite scalar-vector VLIW instruction having a repea...

Multi-tile memory management

Nested loop control

Tracking streaming engine vector predicates to control processor ex...

Processor with macro-instruction achieving zero-latency data movement

Cache structure and utilization

Systolic disaggregation within a matrix accelerator architecture

Implementing specialized instructions for accelerating dynamic prog...

Information processing apparatus, information processing method, an...

Loop support extensions

Execution or write mask generation for data selection in a multi-th...

Method and apparatus for vector permutation

Searching an array of multi-byte elements using an n-byte search in...

Multi-tile memory management

Streaming address generation

Compression techniques

Method and apparatus for permuting streamed data elements

Apparatus for automated loop checking

Method and system for hardware-assisted pre-execution

Graphics processor operation scheduling for deterministic latency

Highly integrated scalable, flexible DSP megamodule architecture

Cache structure and utilization

Patents Applicationslast 30 patents

GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY

STREAMING ADDRESS GENERATION

SOFTWARE SPLITTING FOR SOFTWARE DEFINED CORES

MULTI-TILE MEMORY MANAGEMENT

METHOD AND APPARATUS FOR VECTOR PERMUTATION

PROCESSOR ARCHITECTURE WITH MEMORY ACCESS CIRCUIT

CACHE STRUCTURE AND UTILIZATION

COMPRESSION TECHNIQUES

Load/Store Unit for a Tensor Engine and Methods for Loading or Stor...

SYSTEMS AND METHODS FOR BALANCING COMPUTING RESOURCES

Apparatus and Method for Implementing a Loop Prediction of Multiple...

METHOD AND APPARATUS FOR PERMUTING STREAMED DATA ELEMENTS

LOOP DETECTION METHOD AND APPARATUS, ELECTRONIC DEVICE, AND STORAGE...

GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...

Vector Based Matrix Multiplication

SORTING VECTOR ELEMENTS USING A COUNT VALUE

Multi-tile Memory Management for Detecting Cross Tile Access Provid...

METHOD AND APPARATUS FOR IMPLIED BIT HANDLING IN FLOATING POINT MUL...

MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS

Nested Loop Optimization with Vector Memory Instructions

Method and Apparatus for Dual Issue Multiply Instructions

NESTED LOOP CONTROL

Domain Adaptive Processor For Wireless Communication

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

SEARCHING AN ARRAY OF MULTI-BYTE ELEMENTS USING AN N-BYTE SEARCH IN...

NEURAL NETWORK COMPUTE TILE

Programmable Compute Architecture

STREAM DATA UNIT WITH MULTIPLE HEAD REGISTERS

Multiple Multiplication Units in a Data Path

STREAMING ENGINE WITH VARIABLE STREAM TEMPLATE FORMAT