Modulo N reduction of final result

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CPC
G06F7/49931

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled

Current Industry

G06F7/49931Modulo N reduction of final result

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Patents Grantslast 30 patents

Information Patent Grant
Binding a local data storage device to remote data storage
- Patent number 11,138,158
- Issue date Oct 5, 2021
- Callplex, Inc.
- Stephen T. Sarakas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Division synthesis
- Patent number 10,409,556
- Issue date Sep 10, 2019
- Imagination Technologies Limited
- Thomas Rose
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplier with look up tables
- Patent number 7,536,429
- Issue date May 19, 2009
- NXP B.V.
- Gerardus T. M. Hubert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single instruction multiple data processing
- Patent number 6,999,985
- Issue date Feb 14, 2006
- ARM Limited
- Dominic Hugo Symes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circular address register
- Patent number 6,782,447
- Issue date Aug 24, 2004
- Koninklijke Philips Electronics N.V.
- Farrell L. Ostler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Encryption processor with shared memory interconnect
- Patent number 6,434,699
- Issue date Aug 13, 2002
- MOSAID Technologies Inc.
- David E. Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for the implementation of a specific modular multiplication...
- Patent number 6,424,987
- Issue date Jul 23, 2002
- STMicroelectronics S.A.
- Fabrice Romain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for multiplication modulo (2N+1)
- Patent number 6,321,247
- Issue date Nov 20, 2001
- Compaq Computer Corporation
- Donald P. Matthews
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for two-stage address generation
- Patent number 6,209,076
- Issue date Mar 27, 2001
- Intrinsity, Inc.
- James S. Blomgren
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Encryption processor with shared memory interconnect
- Patent number 6,088,800
- Issue date Jul 11, 2000
- Mosaid Technologies, Incorporated
- David E. Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mixed-modulo address generation using shadow segment registers
- Patent number 5,790,443
- Issue date Aug 4, 1998
- S3 Incorporated
- Gene Shen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced-modulus address generation using sign-extension and correction
- Patent number 5,511,017
- Issue date Apr 23, 1996
- Exponential Technology, Inc.
- Earl T. Cohen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Binary multiplication implemented by existing hardware with minor m...
- Patent number 5,446,909
- Issue date Aug 29, 1995
- National Semiconductor Corporation
- Gideon Intrater
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for performing modulo arithmetic with three-port adder
- Patent number 5,233,553
- Issue date Aug 3, 1993
- Chips & Technologies, Inc.
- Myron Shak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital signal processing
- Patent number 5,121,429
- Issue date Jun 9, 1992
- British Aerospace Public Limited Company
- John R. Guppy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplier for binary numbers comprising a very high number of bits
- Patent number 4,970,675
- Issue date Nov 13, 1990
- Etat Francais represente par le Ministre des Postes
- Philippe Gallay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3586842
- Patent number 3,586,842
- Issue date Jun 22, 1971
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CONSTANT DIVISION AND MODULO VIA CARRYSAVE MODULO REDUCTION
- Publication number 20240134603
- Publication date Apr 25, 2024
- Intel Corporation
- Theo Drane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURE COMPUTATION SYSTEM, SECURE COMPUTATION SERVER APPARATUS, SEC...
- Publication number 20230333813
- Publication date Oct 19, 2023
- NEC Corporation
- Hikaru TSUCHIDA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BINDING A LOCAL DATA STORAGE DEVICE TO REMOTE DATA STORAGE
- Publication number 20200374370
- Publication date Nov 26, 2020
- CALLPLEX, INC.
- Stephen T. Sarakas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Division Synthesis
- Publication number 20180121166
- Publication date May 3, 2018
- Imagination Technologies Limited
- Thomas Rose
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiplier with look up tables
- Publication number 20060020654
- Publication date Jan 26, 2006
- Gerardus Hubert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCULAR ADDRESS REGISTER
- Publication number 20030105917
- Publication date Jun 5, 2003
- FARRELL L. OSTLER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Single instruction multiple data processing
- Publication number 20020040378
- Publication date Apr 4, 2002
- Dominic Hugo Symes
- G06 - COMPUTING CALCULATING COUNTING

Modulo N reduction of final result

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Binding a local data storage device to remote data storage

Division synthesis

Multiplier with look up tables

Single instruction multiple data processing

Circular address register

Encryption processor with shared memory interconnect

Method for the implementation of a specific modular multiplication...

System and method for multiplication modulo (2N&#x0002B;1)

Method and apparatus for two-stage address generation

Encryption processor with shared memory interconnect

Mixed-modulo address generation using shadow segment registers

Reduced-modulus address generation using sign-extension and correction

Binary multiplication implemented by existing hardware with minor m...

Apparatus for performing modulo arithmetic with three-port adder

Digital signal processing

Multiplier for binary numbers comprising a very high number of bits

3586842

Patents Applicationslast 30 patents

CONSTANT DIVISION AND MODULO VIA CARRYSAVE MODULO REDUCTION

SECURE COMPUTATION SYSTEM, SECURE COMPUTATION SERVER APPARATUS, SEC...

BINDING A LOCAL DATA STORAGE DEVICE TO REMOTE DATA STORAGE

Division Synthesis

Multiplier with look up tables

CIRCULAR ADDRESS REGISTER

Single instruction multiple data processing

System and method for multiplication modulo (2N+1)