Multigauge devices

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G06F2207/3828

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled

Current Industry

G06F2207/3828Multigauge devices

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Patents Grantslast 30 patents

Information Patent Grant
Packed 16 bits instruction pipeline
- Patent number 11,880,683
- Issue date Jan 23, 2024
- Advanced Micro Devices, Inc.
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dense digital arithmetic circuitry utilization for fixed-point mach...
- Patent number 11,416,736
- Issue date Aug 16, 2022
- Intel Corporation
- Kevin Nealis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for vector horizontal add of signed/unsigned w...
- Patent number 11,249,754
- Issue date Feb 15, 2022
- Intel Corporation
- Venkateswara Madduri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, device, and system for task processing
- Patent number 11,018,864
- Issue date May 25, 2021
- Alibaba Group Holding Limited
- Xiaoyu Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for using a multiplier to support multiple sub-multiplicati...
- Patent number 10,871,946
- Issue date Dec 22, 2020
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor supporting arithmetic instructions with branch on overflo...
- Patent number 10,768,930
- Issue date Sep 8, 2020
- MIPS Tech, LLC
- Ranganathan Sudhakar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data packing techniques for hard-wired multiplier circuits
- Patent number 10,467,324
- Issue date Nov 5, 2019
- Microsoft Technology Licensing, LLC
- Eric Sen Chung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic processing device and control method for arithmetic proc...
- Patent number 10,248,384
- Issue date Apr 2, 2019
- Fujitsu Limited
- Makoto Komagata
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor and method for outer product accumulate operations
- Patent number 10,120,649
- Issue date Nov 6, 2018
- Microunity Systems Engineering, Inc.
- Craig Hansen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder capable of supporting addition and subtraction of up to n-bit...
- Patent number 9,842,085
- Issue date Dec 12, 2017
- Samsung Electronics Co., Ltd.
- Hyeong-Seok Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power optimizations for a floating point multiplier
- Patent number 9,606,608
- Issue date Mar 28, 2017
- Altera Corporation
- Martin Langhammer
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Data processing apparatus and method for performing N-way interleav...
- Patent number 9,557,994
- Issue date Jan 31, 2017
- ARM Limited
- Dominic Hugo Symes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SIMD operation method and SIMD appartus that implement SIMD operati...
- Patent number RE46277
- Issue date Jan 17, 2017
- SOCIONEXT INC.
- Masato Suzuki
Information Patent Grant
Dynamic range adjusting floating point execution unit
- Patent number 9,223,753
- Issue date Dec 29, 2015
- International Business Machines Corporation
- Mark J Hickey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector math instruction execution by DSP processor approximating di...
- Patent number 9,015,452
- Issue date Apr 21, 2015
- Texas Instruments Incorporated
- Udayan Dasgupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method to implement a matrix multiply unit of a broadban...
- Patent number 8,943,119
- Issue date Jan 27, 2015
- MicroUnity Systems Engineering, Inc.
- Craig Hansen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and data processing unit for calculating at least one multip...
- Patent number 8,903,882
- Issue date Dec 2, 2014
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,793,299
- Issue date Jul 29, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-multiply-accumulator operation optimized for even and odd mult...
- Patent number 8,756,267
- Issue date Jun 17, 2014
- Marvell International Ltd.
- Bradley Aldrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,745,119
- Issue date Jun 3, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,725,787
- Issue date May 13, 2014
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SIMD integer addition including mathematical operation on masks
- Patent number 8,706,795
- Issue date Apr 22, 2014
- Intel Corporation
- Sergey Lyalin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing multiply-add operations on pack...
- Patent number 8,626,814
- Issue date Jan 7, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating point collect and operate
- Patent number 8,595,467
- Issue date Nov 26, 2013
- International Business Machines Corporation
- Brian K. Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transposing array data on SIMD multi-core processor architectures
- Patent number 8,539,201
- Issue date Sep 17, 2013
- International Business Machines Corporation
- Jeffrey S. McAllister
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,495,123
- Issue date Jul 23, 2013
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic range adjusting floating point execution unit
- Patent number 8,412,760
- Issue date Apr 2, 2013
- International Business Machines Corporation
- Mark J Hickey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,396,915
- Issue date Mar 12, 2013
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for performing fixed-point fractional multiplic...
- Patent number 8,332,447
- Issue date Dec 11, 2012
- Kabushiki Kaisha Toshiba
- Shigeaki Iwasa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Trigonometric summation vector execution unit
- Patent number 8,326,904
- Issue date Dec 4, 2012
- International Business Machines Corporation
- Adam J. Muff
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS AND METHOD FOR VECTOR HORIZONTAL ADD OF SIGNED/UNSIGNED W...
- Publication number 20220236991
- Publication date Jul 28, 2022
- Intel Corporation
- Venkateswara MADDURI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, APPARATUSES, AND METHODS FOR VECTOR-PACKED FRACTIONAL MULT...
- Publication number 20200073635
- Publication date Mar 5, 2020
- Intel Corporation
- Venkateswara R. MADDURI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR AND METHOD FOR OUTER PRODUCT ACCUMULATE OPERATIONS
- Publication number 20190065149
- Publication date Feb 28, 2019
- MicroUnity Systems Engineering, Inc.
- Craig Hansen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR PROCESSING CARRY-SAVE ACCUMULATORS EMPLOYING REDUNDANT CARRY...
- Publication number 20140280407
- Publication date Sep 18, 2014
- QUALCOMM Incorporated
- Raheel Khan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR AND SCALAR BASED MODULAR EXPONENTIATION
- Publication number 20140229716
- Publication date Aug 14, 2014
- Shay Gueron
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYMMETRIC FILTER ARITHMETIC APPARATUS AND SYMMETRIC FILTER ARITHMET...
- Publication number 20140219577
- Publication date Aug 7, 2014
- Yoshiteru Hayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDER CAPABLE OF SUPPORTING ADDITION AND SUBTRACTION OF UP TO N-BIT...
- Publication number 20140214913
- Publication date Jul 31, 2014
- Samsung Electronics Co., Ltd.
- Hyeong-Seok YU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Audio Digital Signal Processor
- Publication number 20140189231
- Publication date Jul 3, 2014
- Tensilica, Inc.
- Dror E. Maydan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR EXECUTION UNIT WITH PRENORMALIZATION OF DENORMAL VALUES
- Publication number 20140164464
- Publication date Jun 12, 2014
- International Business Machines Corporation
- Adam J. Muff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR EXECUTION UNIT WITH PRENORMALIZATION OF DENORMAL VALUES
- Publication number 20140164465
- Publication date Jun 12, 2014
- International Business Machines Corporation
- Adam J. Muff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMD INTEGER ADDITION INCLUDING MATHEMATICAL OPERATION ON MASKS
- Publication number 20140025717
- Publication date Jan 23, 2014
- Sergey Lyalin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130262547
- Publication date Oct 3, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130262836
- Publication date Oct 3, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM FOR SCHEDULING THE EXECUTION OF TASKS BASED ON LOGICAL TIME...
- Publication number 20130263152
- Publication date Oct 3, 2013
- Renaud Sirdey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130219151
- Publication date Aug 22, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130198254
- Publication date Aug 1, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC RANGE ADJUSTING FLOATING POINT EXECUTION UNIT
- Publication number 20130191432
- Publication date Jul 25, 2013
- International Business Machines Corporation
- Mark J. Hickey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130091190
- Publication date Apr 11, 2013
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20120331028
- Publication date Dec 27, 2012
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Vector Slot Processor Execution Unit for High Speed Streaming Inputs
- Publication number 20120284487
- Publication date Nov 8, 2012
- SAANKHYA LABS PRIVATE LIMITED
- Anindya SAHA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD TO IMPLEMENT A MATRIX MULTIPLY UNIT OF A BROADBAN...
- Publication number 20120215826
- Publication date Aug 23, 2012
- MicroUnity Systems Engineering, Inc.
- Craig HANSEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20120216018
- Publication date Aug 23, 2012
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR PERFORMING A COMPLEX NUMBER OPERATION USIN...
- Publication number 20120173600
- Publication date Jul 5, 2012
- Young Hwan Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DATA PROCESSING UNIT FOR CALCULATING AT LEAST ONE MULTIP...
- Publication number 20120150933
- Publication date Jun 14, 2012
- International Business Machines Corporation
- Maarten J. Boersma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL COMPARISON/SELECTION OPERATION APPARATUS, PROCESSOR, AND P...
- Publication number 20120023308
- Publication date Jan 26, 2012
- RENESAS ELECTRONICS CORPORATION
- Takahiro Kumura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACK...
- Publication number 20110264895
- Publication date Oct 27, 2011
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Floating Point Collect and Operate
- Publication number 20110161624
- Publication date Jun 30, 2011
- International Business Machines Corporation
- Brian K. Flachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSPOSING ARRAY DATA ON SIMD MULTI-CORE PROCESSOR ARCHITECTURES
- Publication number 20110107060
- Publication date May 5, 2011
- International Business Machines Corporation
- Jeffrey S. McAllister
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and Methods for Performing Fixed-Point Fractional Multiplic...
- Publication number 20110060781
- Publication date Mar 10, 2011
- Shigeaki Iwasa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL SIGNAL PROCESSOR (DSP) WITH VECTOR MATH INSTRUCTION
- Publication number 20100211761
- Publication date Aug 19, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Udayan DASGUPTA
- G06 - COMPUTING CALCULATING COUNTING

Multigauge devices

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Packed 16 bits instruction pipeline

Dense digital arithmetic circuitry utilization for fixed-point mach...

Apparatus and method for vector horizontal add of signed/unsigned w...

Method, device, and system for task processing

Methods for using a multiplier to support multiple sub-multiplicati...

Processor supporting arithmetic instructions with branch on overflo...

Data packing techniques for hard-wired multiplier circuits

Arithmetic processing device and control method for arithmetic proc...

Processor and method for outer product accumulate operations

Adder capable of supporting addition and subtraction of up to n-bit...

Low power optimizations for a floating point multiplier

Data processing apparatus and method for performing N-way interleav...

SIMD operation method and SIMD appartus that implement SIMD operati...

Dynamic range adjusting floating point execution unit

Vector math instruction execution by DSP processor approximating di...

System and method to implement a matrix multiply unit of a broadban...

Method and data processing unit for calculating at least one multip...

Processor for performing multiply-add operations on packed data

Dual-multiply-accumulator operation optimized for even and odd mult...

Processor for performing multiply-add operations on packed data

Processor for performing multiply-add operations on packed data

SIMD integer addition including mathematical operation on masks

Method and apparatus for performing multiply-add operations on pack...

Floating point collect and operate

Transposing array data on SIMD multi-core processor architectures

Processor for performing multiply-add operations on packed data

Dynamic range adjusting floating point execution unit

Processor for performing multiply-add operations on packed data

Systems and methods for performing fixed-point fractional multiplic...

Trigonometric summation vector execution unit

Patents Applicationslast 30 patents

APPARATUS AND METHOD FOR VECTOR HORIZONTAL ADD OF SIGNED/UNSIGNED W...

SYSTEMS, APPARATUSES, AND METHODS FOR VECTOR-PACKED FRACTIONAL MULT...

PROCESSOR AND METHOD FOR OUTER PRODUCT ACCUMULATE OPERATIONS

VECTOR PROCESSING CARRY-SAVE ACCUMULATORS EMPLOYING REDUNDANT CARRY...

VECTOR AND SCALAR BASED MODULAR EXPONENTIATION

SYMMETRIC FILTER ARITHMETIC APPARATUS AND SYMMETRIC FILTER ARITHMET...

ADDER CAPABLE OF SUPPORTING ADDITION AND SUBTRACTION OF UP TO N-BIT...

Audio Digital Signal Processor

VECTOR EXECUTION UNIT WITH PRENORMALIZATION OF DENORMAL VALUES

VECTOR EXECUTION UNIT WITH PRENORMALIZATION OF DENORMAL VALUES

SIMD INTEGER ADDITION INCLUDING MATHEMATICAL OPERATION ON MASKS

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

SYSTEM FOR SCHEDULING THE EXECUTION OF TASKS BASED ON LOGICAL TIME...

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

DYNAMIC RANGE ADJUSTING FLOATING POINT EXECUTION UNIT

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

Vector Slot Processor Execution Unit for High Speed Streaming Inputs

SYSTEM AND METHOD TO IMPLEMENT A MATRIX MULTIPLY UNIT OF A BROADBAN...

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

APPARATUS AND METHOD FOR PERFORMING A COMPLEX NUMBER OPERATION USIN...

METHOD AND DATA PROCESSING UNIT FOR CALCULATING AT LEAST ONE MULTIP...

PARALLEL COMPARISON/SELECTION OPERATION APPARATUS, PROCESSOR, AND P...

METHOD AND APPARATUS FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACK...

Floating Point Collect and Operate

TRANSPOSING ARRAY DATA ON SIMD MULTI-CORE PROCESSOR ARCHITECTURES

Systems and Methods for Performing Fixed-Point Fractional Multiplic...

DIGITAL SIGNAL PROCESSOR (DSP) WITH VECTOR MATH INSTRUCTION