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G11C2029/3602

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G11C2029/3602Pattern generator

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Patents Grantslast 30 patents

Information Patent Grant
Built-in self test circuit for segmented static random access memor...
- Patent number 12,170,120
- Issue date Dec 17, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Hitesh Chawla
- G11 - INFORMATION STORAGE
Information Patent Grant
Storing memory array operational information in non-volatile subarrays
- Patent number 12,158,826
- Issue date Dec 3, 2024
- Micron Technology, Inc.
- Christopher John Kawamura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test method, computer apparatus, and computer-readable storage medium
- Patent number 12,112,817
- Issue date Oct 8, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Biao Song
- G11 - INFORMATION STORAGE
Information Patent Grant
Capacity-expanding memory control component
- Patent number 12,095,480
- Issue date Sep 17, 2024
- Astera Labs, Inc.
- Enrique Musoll
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic contact management systems and methods
- Patent number 12,079,819
- Issue date Sep 3, 2024
- LeadAssign Corporation
- Desmond Von Teichman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing system error management, related integrated circuit, app...
- Patent number 12,068,048
- Issue date Aug 20, 2024
- TMicroelectronics Application GMBH
- Vivek Mohan Sharma
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing disruptive memories
- Patent number 12,051,476
- Issue date Jul 30, 2024
- NXP USA, INC.
- Timothy Strauss
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit protections against removal and oracle-guided at...
- Patent number 12,039,091
- Issue date Jul 16, 2024
- Duke University
- Jonti Talukdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory with autonomous cycling
- Patent number 12,040,031
- Issue date Jul 16, 2024
- Western Digital Technologies, Inc.
- Liang Li
- G11 - INFORMATION STORAGE
Information Patent Grant
ATPG testing method for latch based memories, for area reduction
- Patent number 12,020,760
- Issue date Jun 25, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Venkata Narayanan Srinivasan
- G11 - INFORMATION STORAGE
Information Patent Grant
Correcting memory data using an error code and a memory test result
- Patent number 11,996,859
- Issue date May 28, 2024
- Amazon Technologies, Inc.
- Itai Avron
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computing register with non-volatile-logic data storage
- Patent number 11,990,196
- Issue date May 21, 2024
- Texas Instruments Incorporated
- Adolf Baumann
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and devices for flexible RAM loading
- Patent number 11,984,178
- Issue date May 14, 2024
- STMicroelectronics S.r.l.
- Gabriele Solcia
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for processing memory repair information
- Patent number 11,961,576
- Issue date Apr 16, 2024
- Benoit Nadeau-Dostie
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing circuit, testing device and testing method thereof
- Patent number 11,948,650
- Issue date Apr 2, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Liang Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and device for processing data stored in a memory unit
- Patent number 11,947,807
- Issue date Apr 2, 2024
- Robert Bosch GmbH
- Manuel Jauss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Path based controls for ATE mode testing of multicell memory circuit
- Patent number 11,933,844
- Issue date Mar 19, 2024
- Texas Instruments Incorporated
- Wilson Pradeep
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial refresh
- Patent number 11,901,026
- Issue date Feb 13, 2024
- NeuroBlade Ltd.
- Elad Sity
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, device, and circuit for high-speed memories
- Patent number 11,894,086
- Issue date Feb 6, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jaspal Singh Shah
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic generation of ATPG mode signals for testing multipath memor...
- Patent number 11,879,940
- Issue date Jan 23, 2024
- Texas Instruments Incorporated
- Wilson Pradeep
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory test method and memory test apparatus
- Patent number 11,862,276
- Issue date Jan 2, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Wei Huang
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus including internal test mechanism and associated methods
- Patent number 11,848,067
- Issue date Dec 19, 2023
- Micron Technology, Inc.
- Joshua E. Alzheimer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory-based logic testing
- Patent number 11,837,305
- Issue date Dec 5, 2023
- NeuroBlade Ltd.
- Elad Sity
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage devices and methods of operating storage devices
- Patent number 11,830,561
- Issue date Nov 28, 2023
- Samsung Electronics Co., Ltd.
- Youngmin Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Conducting built-in self-test of memory macro
- Patent number 11,823,758
- Issue date Nov 21, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Saman Adham
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory, memory test system, and memory test method
- Patent number 11,817,166
- Issue date Nov 14, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Jia Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Variable word length access
- Patent number 11,817,167
- Issue date Nov 14, 2023
- NeuroBlade Ltd.
- Elad Sity
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory repair using optimized redundancy utilization
- Patent number 11,776,647
- Issue date Oct 3, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Chien-Hao Huang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for generating an memory built-in self-test algorithm circuit
- Patent number 11,776,649
- Issue date Oct 3, 2023
- ISTART-TEK INC.
- Chia Wei Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory calibration device, system and method
- Patent number 11,776,650
- Issue date Oct 3, 2023
- STMICROELECTRONICS INTERNATIONAL N.V.
- Tanmoy Roy
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Content addressable memory apparatus, content addressable memory ci...
- Publication number 20240312548
- Publication date Sep 19, 2024
- REALTEK SEMICONDUCTOR CORPORATION
- I-HAO CHIANG
- G11 - INFORMATION STORAGE
Information Patent Application
ATPG TESTING METHOD FOR LATCH BASED MEMORIES, FOR AREA REDUCTION
- Publication number 20240296899
- Publication date Sep 5, 2024
- STMicroelectronics International N.V.
- Venkata Narayanan SRINIVASAN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY INTERFACE CIRCUITRY AND BUILT-IN SELF-TESTING METHOD
- Publication number 20240274214
- Publication date Aug 15, 2024
- Integrated Silicon Solution Inc.
- Hyeon Jae LEE
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Repair Device
- Publication number 20240233853
- Publication date Jul 11, 2024
- Magnachip Semiconductor, Ltd.
- Jun Soo KWACK
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD, DEVICE, AND CIRCUIT FOR HIGH-SPEED MEMORIES
- Publication number 20240153573
- Publication date May 9, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jaspal Singh SHAH
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Repair Device
- Publication number 20240136007
- Publication date Apr 25, 2024
- Magnachip Semiconductor, Ltd.
- Jun Soo KWACK
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY QUEUE OPERATIONS TO INCREASE THROUGHPUT IN AN ATE SYSTEM
- Publication number 20240096432
- Publication date Mar 21, 2024
- Advantest Corporation
- Edmundo de la Puente
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN SELF-TEST CIRCUITRY
- Publication number 20240087663
- Publication date Mar 14, 2024
- Micron Technology, Inc.
- William Yu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY TEST CIRCUIT, MEMORY CHIP, AND TESTING METHOD OF MEMORY CHIP
- Publication number 20240079075
- Publication date Mar 7, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jui-Jen Wu
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN SELF TEST CIRCUIT FOR SEGMENTED STATIC RANDOM ACCESS MEMOR...
- Publication number 20240071546
- Publication date Feb 29, 2024
- STMicroelectronics International N.V.
- Hitesh CHAWLA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY AND METHOD WITH IN-MEMORY COMPUTING DEFECT DETECTION
- Publication number 20240071548
- Publication date Feb 29, 2024
- Samsung Electronics Co., Ltd.
- Sungmeen MYUNG
- G11 - INFORMATION STORAGE
Information Patent Application
CONDUCTING BUILT-IN SELF-TEST OF MEMORY MACRO
- Publication number 20240055066
- Publication date Feb 15, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ted Wong
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND TEST METHOD OF MEMORY DEVICE
- Publication number 20230402123
- Publication date Dec 14, 2023
- Samsung Electronics Co., Ltd.
- Jaewon Park
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING DISRUPTIVE MEMORIES
- Publication number 20230368859
- Publication date Nov 16, 2023
- NXP USA, Inc.
- Timothy Strauss
- G11 - INFORMATION STORAGE
Information Patent Application
Burst Indicator Systems and Methods
- Publication number 20230343407
- Publication date Oct 26, 2023
- Micron Technology, Inc.
- Kai Wang
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH ATONOMOUS CYCLING
- Publication number 20230343406
- Publication date Oct 26, 2023
- Western Digital Technologies, Inc.
- Liang Li
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC CONTACT MANAGEMENT SYSTEMS AND METHODS
- Publication number 20230335211
- Publication date Oct 19, 2023
- LEADASSIGN CORPORATION
- DESMOND VON TEICHMAN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE SIDEBAND SYSTEMS AND METHODS
- Publication number 20230317193
- Publication date Oct 5, 2023
- Micron Technology, Inc.
- Joshua E. Alzheimer
- G11 - INFORMATION STORAGE
Information Patent Application
TEST METHOD, COMPUTER APPARATUS, AND COMPUTER-READABLE STORAGE MEDIUM
- Publication number 20230268020
- Publication date Aug 24, 2023
- Changxin Memory Technologies, Inc.
- Biao SONG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20230268021
- Publication date Aug 24, 2023
- WINBOND ELECTRONICS CORP.
- Tzu-Yin Wei
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD, DEVICE, AND CIRCUIT FOR HIGH-SPEED MEMORIES
- Publication number 20230238073
- Publication date Jul 27, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jaspal Singh SHAH
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND DEVICES FOR FLEXIBLE RAM LOADING
- Publication number 20230230650
- Publication date Jul 20, 2023
- STMicroelectronics S.r.l.
- Gabriele Solcia
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR GENERATING AN MEMORY BUILT-IN SELF-TEST ALGORITHM CIRCUIT
- Publication number 20230223093
- Publication date Jul 13, 2023
- iSTART-TEK INC.
- Chia Wei Lee
- G11 - INFORMATION STORAGE
Information Patent Application
COMPUTING REGISTER WITH NON-VOLATILE-LOGIC DATA STORAGE
- Publication number 20230207036
- Publication date Jun 29, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Adolf Baumann
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN SELF-TEST CIRCUITS FOR MEMORY SYSTEMS HAVING MULTIPLE CHAN...
- Publication number 20230178166
- Publication date Jun 8, 2023
- Samsung Electronics Co., Ltd.
- Jaewon Park
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT PROTECTIONS AGAINST REMOVAL AND ORACLE-GUIDED AT...
- Publication number 20230116607
- Publication date Apr 13, 2023
- DUKE UNIVERSITY
- Jonti Talukdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATPG TESTING METHOD FOR LATCH BASED MEMORIES, FOR AREA REDUCTION
- Publication number 20230105305
- Publication date Apr 6, 2023
- STMicroelectronics International N.V.
- Venkata Narayanan SRINIVASAN
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE DEVICES AND METHODS OF OPERATING STORAGE DEVICES
- Publication number 20230094273
- Publication date Mar 30, 2023
- Samsung Electronics Co., Ltd.
- Youngmin LEE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY TEST METHOD AND MEMORY TEST APPARATUS
- Publication number 20230092554
- Publication date Mar 23, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Wei HUANG
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR GENERATING MEMORY PATTERN, COMPUTER-READABLE STORAGE MED...
- Publication number 20230077794
- Publication date Mar 16, 2023
- Guangteng LONG
- G11 - INFORMATION STORAGE

Pattern generator

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Built-in self test circuit for segmented static random access memor...

Storing memory array operational information in non-volatile subarrays

Test method, computer apparatus, and computer-readable storage medium

Capacity-expanding memory control component

Dynamic contact management systems and methods

Processing system error management, related integrated circuit, app...

Testing disruptive memories

Integrated circuit protections against removal and oracle-guided at...

Non-volatile memory with autonomous cycling

ATPG testing method for latch based memories, for area reduction

Correcting memory data using an error code and a memory test result

Computing register with non-volatile-logic data storage

Methods and devices for flexible RAM loading

Method and apparatus for processing memory repair information

Testing circuit, testing device and testing method thereof

Method and device for processing data stored in a memory unit

Path based controls for ATE mode testing of multicell memory circuit

Partial refresh

Method, device, and circuit for high-speed memories

Dynamic generation of ATPG mode signals for testing multipath memor...

Memory test method and memory test apparatus

Apparatus including internal test mechanism and associated methods

Memory-based logic testing

Storage devices and methods of operating storage devices

Conducting built-in self-test of memory macro

Memory, memory test system, and memory test method

Variable word length access

Memory repair using optimized redundancy utilization

Method for generating an memory built-in self-test algorithm circuit

Memory calibration device, system and method

Patents Applicationslast 30 patents

Content addressable memory apparatus, content addressable memory ci...

ATPG TESTING METHOD FOR LATCH BASED MEMORIES, FOR AREA REDUCTION

MEMORY INTERFACE CIRCUITRY AND BUILT-IN SELF-TESTING METHOD

Memory Repair Device

METHOD, DEVICE, AND CIRCUIT FOR HIGH-SPEED MEMORIES

Memory Repair Device

MEMORY QUEUE OPERATIONS TO INCREASE THROUGHPUT IN AN ATE SYSTEM

BUILT-IN SELF-TEST CIRCUITRY

MEMORY TEST CIRCUIT, MEMORY CHIP, AND TESTING METHOD OF MEMORY CHIP

BUILT-IN SELF TEST CIRCUIT FOR SEGMENTED STATIC RANDOM ACCESS MEMOR...

MEMORY AND METHOD WITH IN-MEMORY COMPUTING DEFECT DETECTION

CONDUCTING BUILT-IN SELF-TEST OF MEMORY MACRO

MEMORY DEVICE AND TEST METHOD OF MEMORY DEVICE

TESTING DISRUPTIVE MEMORIES

Burst Indicator Systems and Methods

NON-VOLATILE MEMORY WITH ATONOMOUS CYCLING

DYNAMIC CONTACT MANAGEMENT SYSTEMS AND METHODS

MEMORY DEVICE SIDEBAND SYSTEMS AND METHODS

TEST METHOD, COMPUTER APPARATUS, AND COMPUTER-READABLE STORAGE MEDIUM

MEMORY DEVICE

METHOD, DEVICE, AND CIRCUIT FOR HIGH-SPEED MEMORIES

METHODS AND DEVICES FOR FLEXIBLE RAM LOADING

METHOD FOR GENERATING AN MEMORY BUILT-IN SELF-TEST ALGORITHM CIRCUIT

COMPUTING REGISTER WITH NON-VOLATILE-LOGIC DATA STORAGE

BUILT-IN SELF-TEST CIRCUITS FOR MEMORY SYSTEMS HAVING MULTIPLE CHAN...

INTEGRATED CIRCUIT PROTECTIONS AGAINST REMOVAL AND ORACLE-GUIDED AT...

ATPG TESTING METHOD FOR LATCH BASED MEMORIES, FOR AREA REDUCTION

STORAGE DEVICES AND METHODS OF OPERATING STORAGE DEVICES

MEMORY TEST METHOD AND MEMORY TEST APPARATUS

METHOD FOR GENERATING MEMORY PATTERN, COMPUTER-READABLE STORAGE MED...