Performance improvement

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G06F2212/1016

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures

Current Industry

G06F2212/1016Performance improvement

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Managing a cache using per memory region reuse distance estimation
- Patent number 12,339,783
- Issue date Jun 24, 2025
- Advanced Micro Devices, Inc.
- John Kalamatianos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware accelerator for hypergraph processing and operating method...
- Patent number 12,339,775
- Issue date Jun 24, 2025
- Huazhong University of Science & Technology
- Long Zheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system, memory controller, and method for operating same
- Patent number 12,332,778
- Issue date Jun 17, 2025
- SK Hynix Inc.
- Min Jun Jang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast block device, system and methodology
- Patent number 12,332,775
- Issue date Jun 17, 2025
- Douglas Dumitru
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to facilitate atomic operations in victim cache
- Patent number 12,321,284
- Issue date Jun 3, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with write miss merging
- Patent number 12,321,285
- Issue date Jun 3, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple contexts for a compute unit in a reconfigurable data proce...
- Patent number 12,314,754
- Issue date May 27, 2025
- SambaNova Systems, Inc.
- Raghu Prabhakar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Updating related data in multi-cache systems
- Patent number 12,314,182
- Issue date May 27, 2025
- ARM Limited
- Olof Henrik Uhrenholt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address generator using memory access operation type for a computer...
- Patent number 12,307,255
- Issue date May 20, 2025
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Raphaël Millet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Recording a cache coherency protocol trace for use with a separate...
- Patent number 12,306,757
- Issue date May 20, 2025
- Microsoft Technology Licensing, LLC
- Jordi Mola
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods, devices, and systems for allocating memory space
- Patent number 12,306,748
- Issue date May 20, 2025
- Samsung Electronics Co., Ltd.
- Kyungsan Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for increasing memory level parallelism by red...
- Patent number 12,306,754
- Issue date May 20, 2025
- Advanced Micro Devices, Inc.
- Jagadish B. Kotra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical storage device with host controlled subdivisions
- Patent number 12,306,766
- Issue date May 20, 2025
- Radian Memory Systems, ILLC
- Robert Lercari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage device including nonvolatile memory device and operating me...
- Patent number 12,298,902
- Issue date May 13, 2025
- Samsung Electronics Co., Ltd.
- Joon-Whan Bae
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for altering the path of data movement for larg...
- Patent number 12,299,301
- Issue date May 13, 2025
- QUALCOMM Incorporated
- Hithesh Hassan Lepaksha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write merging on stores with different privilege levels
- Patent number 12,292,839
- Issue date May 6, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage device including nonvolatile memory device and operating me...
- Patent number 12,292,827
- Issue date May 6, 2025
- Samsung Electronics Co., Ltd.
- Seunghyun Choi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural processing device and method for transmitting data thereof
- Patent number 12,287,729
- Issue date Apr 29, 2025
- Rebellions Inc.
- Sungpill Choi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage device for collecting optimal debugging data and system inc...
- Patent number 12,287,736
- Issue date Apr 29, 2025
- SK Hynix Inc.
- Seon Ju Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device interface and method
- Patent number 12,277,056
- Issue date Apr 15, 2025
- Micron Technology, Inc.
- Brent Keeth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed region tracking for tiered memory systems
- Patent number 12,277,323
- Issue date Apr 15, 2025
- Dell Products L.P.
- Stuart Allen Berke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory array page table walk
- Patent number 12,277,067
- Issue date Apr 15, 2025
- Perry V. Lea
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer addressing for a convolutional neural network
- Patent number 12,277,488
- Issue date Apr 15, 2025
- Imagination Technologies Limited
- Daniel Barnard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical methods and systems for storing data
- Patent number 12,277,058
- Issue date Apr 15, 2025
- Alibaba Group Holding Limited
- Minghai Qin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for updating memory tables
- Patent number 12,271,303
- Issue date Apr 8, 2025
- QUALCOMM Incorporated
- Manish Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system with nonvolatile semiconductor memory
- Patent number 12,265,706
- Issue date Apr 1, 2025
- Kioxia Corporation
- Hiroshi Yao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accelerated read translation path in memory sub-system
- Patent number 12,265,725
- Issue date Apr 1, 2025
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid victim cache and write miss buffer with fence operation
- Patent number 12,265,477
- Issue date Apr 1, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for multi-banked victim cache with dual datapath
- Patent number 12,259,826
- Issue date Mar 25, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controller for controlling non-volatile semiconductor memory and me...
- Patent number 12,259,813
- Issue date Mar 25, 2025
- Kioxia Corporation
- Kazuhiro Fukutomi
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Dynamic Memory Address Write Policy Translation based on Performanc...
- Publication number 20250199724
- Publication date Jun 19, 2025
- Micron Technology, Inc.
- Giuseppe Cariello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE AND OPERATING ME...
- Publication number 20250190344
- Publication date Jun 12, 2025
- Samsung Electronics Co., Ltd.
- Joon-Whan BAE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATED READ TRANSLATION PATH IN MEMORY SUB-SYSTEM
- Publication number 20250190139
- Publication date Jun 12, 2025
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF CONTROLLING NONVOLATILE SEMICONDUCTOR MEMORY
- Publication number 20250190108
- Publication date Jun 12, 2025
- KIOXIA Corporation
- Hiroshi YAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLER FOR CONTROLLING NON-VOLATILE SEMICONDUCTOR MEMORY AND ME...
- Publication number 20250190342
- Publication date Jun 12, 2025
- KIOXIA Corporation
- Kazuhiro FUKUTOMI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR MULTI-BANKED VICTIM CACHE WITH DUAL DATAPATH
- Publication number 20250190368
- Publication date Jun 12, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICORE, MULTIBANK, FULLY CONCURRENT COHERENCE CONTROLLER
- Publication number 20250181238
- Publication date Jun 5, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Matthew David PIERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEPARATING HASHING FROM PROOF-OF-WORK IN BLOCKCHAIN ENVIRONMENTS
- Publication number 20250184117
- Publication date Jun 5, 2025
- Inveniam Capital Partners, Inc.
- Paul Snow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LEARNING MEMORY SYSTEMS AND METHODS
- Publication number 20250173264
- Publication date May 29, 2025
- University of Florida Research Foundation, Inc.
- Swarup Bhunia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Buffer Addressing for a Convolutional Neural Network
- Publication number 20250156678
- Publication date May 15, 2025
- Imagination Technologies Limited
- Daniel Barnard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMANCE ALLOCATION AMONG USERS FOR ACCESSING NON-VOLATILE MEMOR...
- Publication number 20250156079
- Publication date May 15, 2025
- Micron Technology, Inc.
- Alex Frolikov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE
- Publication number 20250139019
- Publication date May 1, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE DATA ACCESS SYSTEM AND METHODS OF ELIMINATING CONTROLLER B...
- Publication number 20250130714
- Publication date Apr 24, 2025
- Branislav Radovanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM INCLUDING NONVOLATILE MEMORY
- Publication number 20250130951
- Publication date Apr 24, 2025
- KIOXIA Corporation
- Shuichi WATANABE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING WORK ITEMS IN PROCESSING LOGIC
- Publication number 20250117328
- Publication date Apr 10, 2025
- Imagination Technologies Limited
- Tijmen Spreij
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA ACCESS IN A HETEROGENEOUS PROCESSING SYSTEM WITH MULTIPLE PROC...
- Publication number 20250117336
- Publication date Apr 10, 2025
- SambaNova Systems, Inc.
- Arnav GOEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM
- Publication number 20250117340
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM
- Publication number 20250117341
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scratchpad Memory Translation Lookaside Buffer
- Publication number 20250110894
- Publication date Apr 3, 2025
- ADVANCED MICRO DEVICES, INC.
- Mark Evan Wilkening
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY PIPELINE CONTROL IN A HIERARCHICAL MEMORY SYSTEM
- Publication number 20250103502
- Publication date Mar 27, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ZERO LATENCY PREFETCHING IN CACHES
- Publication number 20250103503
- Publication date Mar 27, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Oluleye Olorode
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HOLD-ASIDE BUFFER FOR UNCOMMITTED WRITE TRANSACTIONS IN A LOG STRUC...
- Publication number 20250094351
- Publication date Mar 20, 2025
- Micron Technology, Inc.
- Alexander Tomlinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULLY PIPELINED READ-MODIFY-WRITE SUPPORT
- Publication number 20250094359
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICORE SHARED CACHE OPERATION ENGINE
- Publication number 20250094044
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...
- Publication number 20250094358
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND HOST DEVICE
- Publication number 20250077075
- Publication date Mar 6, 2025
- KIOXIA Corporation
- Akihisa FUJIMOTO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE CACHE FOR COHERENT SYSTEM
- Publication number 20250060873
- Publication date Feb 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...
- Publication number 20250036573
- Publication date Jan 30, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM AND METHOD FOR CONTROLLING NONVOLATILE MEMORY
- Publication number 20250036283
- Publication date Jan 30, 2025
- KIOXIA Corporation
- Hideki Yoshida
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES
- Publication number 20250028652
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING

Performance improvement

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Managing a cache using per memory region reuse distance estimation

Hardware accelerator for hypergraph processing and operating method...

Memory system, memory controller, and method for operating same

Fast block device, system and methodology

Methods and apparatus to facilitate atomic operations in victim cache

Victim cache with write miss merging

Multiple contexts for a compute unit in a reconfigurable data proce...

Updating related data in multi-cache systems

Address generator using memory access operation type for a computer...

Recording a cache coherency protocol trace for use with a separate...

Methods, devices, and systems for allocating memory space

Method and apparatus for increasing memory level parallelism by red...

Hierarchical storage device with host controlled subdivisions

Storage device including nonvolatile memory device and operating me...

Methods and systems for altering the path of data movement for larg...

Write merging on stores with different privilege levels

Storage device including nonvolatile memory device and operating me...

Neural processing device and method for transmitting data thereof

Storage device for collecting optimal debugging data and system inc...

Memory device interface and method

Distributed region tracking for tiered memory systems

Memory array page table walk

Buffer addressing for a convolutional neural network

Hierarchical methods and systems for storing data

System and method for updating memory tables

Memory system with nonvolatile semiconductor memory

Accelerated read translation path in memory sub-system

Hybrid victim cache and write miss buffer with fence operation

Methods and apparatus for multi-banked victim cache with dual datapath

Controller for controlling non-volatile semiconductor memory and me...

Patents Applicationslast 30 patents

Dynamic Memory Address Write Policy Translation based on Performanc...

STORAGE DEVICE INCLUDING NONVOLATILE MEMORY DEVICE AND OPERATING ME...

ACCELERATED READ TRANSLATION PATH IN MEMORY SUB-SYSTEM

METHOD OF CONTROLLING NONVOLATILE SEMICONDUCTOR MEMORY

CONTROLLER FOR CONTROLLING NON-VOLATILE SEMICONDUCTOR MEMORY AND ME...

METHODS AND APPARATUS FOR MULTI-BANKED VICTIM CACHE WITH DUAL DATAPATH

MULTICORE, MULTIBANK, FULLY CONCURRENT COHERENCE CONTROLLER

SEPARATING HASHING FROM PROOF-OF-WORK IN BLOCKCHAIN ENVIRONMENTS

LEARNING MEMORY SYSTEMS AND METHODS

Buffer Addressing for a Convolutional Neural Network

PERFORMANCE ALLOCATION AMONG USERS FOR ACCESSING NON-VOLATILE MEMOR...

AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE

SCALABLE DATA ACCESS SYSTEM AND METHODS OF ELIMINATING CONTROLLER B...

MEMORY SYSTEM INCLUDING NONVOLATILE MEMORY

PROCESSING WORK ITEMS IN PROCESSING LOGIC

DATA ACCESS IN A HETEROGENEOUS PROCESSING SYSTEM WITH MULTIPLE PROC...

ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM

METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM

Scratchpad Memory Translation Lookaside Buffer

MEMORY PIPELINE CONTROL IN A HIERARCHICAL MEMORY SYSTEM

ZERO LATENCY PREFETCHING IN CACHES

HOLD-ASIDE BUFFER FOR UNCOMMITTED WRITE TRANSACTIONS IN A LOG STRUC...

FULLY PIPELINED READ-MODIFY-WRITE SUPPORT

MULTICORE SHARED CACHE OPERATION ENGINE

METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...

MEMORY DEVICE AND HOST DEVICE

CONFIGURABLE CACHE FOR COHERENT SYSTEM

METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...

MEMORY SYSTEM AND METHOD FOR CONTROLLING NONVOLATILE MEMORY

VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES