Performance improvement

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CPC
G06F2212/1016

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures

Current Industry

G06F2212/1016Performance improvement

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Patents Grantslast 30 patents

Information Patent Grant
Adaptive garbage collection including flash memory using age and st...
- Patent number RE50315
- Issue date Feb 25, 2025
- Innovations In Memory LLC
- Silei Zhang
Information Patent Grant
Memory system including nonvolatile memory
- Patent number 12,235,771
- Issue date Feb 25, 2025
- Kioxia Corporation
- Shuichi Watanabe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for improved performance in a multidimensional da...
- Patent number 12,235,876
- Issue date Feb 25, 2025
- Oracle International Corporation
- Cloud Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to enable out-of-order packet processing in a datatype en...
- Patent number 12,229,048
- Issue date Feb 18, 2025
- Hewlett Packard Enterprise Development LP
- Keith D. Underwood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RAM hashing in blockchain environments
- Patent number 12,231,535
- Issue date Feb 18, 2025
- Inveniam Capital Partners, Inc.
- Paul Snow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Separating hashing from proof-of-work in blockchain environments
- Patent number 12,225,107
- Issue date Feb 11, 2025
- Inveniam Capital Partners, Inc.
- Paul Snow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache writing to zones to maximize write bandwidth
- Patent number 12,223,175
- Issue date Feb 11, 2025
- SanDisk Technologies, Inc.
- Liam Parker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multicore, multibank, fully concurrent coherence controller
- Patent number 12,223,165
- Issue date Feb 11, 2025
- Texas Instruments Incorporated
- Matthew David Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid memory module
- Patent number 12,213,548
- Issue date Feb 4, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic compare and swap in a coherent cache system
- Patent number 12,216,591
- Issue date Feb 4, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Aggressive write flush scheme for a victim cache
- Patent number 12,210,463
- Issue date Jan 28, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Application-transparent near-memory processing architecture with me...
- Patent number 12,210,473
- Issue date Jan 28, 2025
- The Board of Trustees of the University of Illinois
- Nam Sung Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory devices
- Patent number 12,204,409
- Issue date Jan 21, 2025
- Samsung Electronics Co., Ltd.
- Hyun-Jin Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System probe aware last level cache insertion bypassing
- Patent number 12,204,454
- Issue date Jan 21, 2025
- Advanced Micro Devices, Inc.
- Paul James Moyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing work items in processing logic
- Patent number 12,204,448
- Issue date Jan 21, 2025
- Imagination Technologies Limited
- Tijmen Spreij
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic allocation of cache based on instantaneous bandwidth consum...
- Patent number 12,198,220
- Issue date Jan 14, 2025
- Intel Corporation
- Kiran C. Veernapu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory pipeline control in a hierarchical memory system
- Patent number 12,197,332
- Issue date Jan 14, 2025
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to reduce bank pressure using aggressive writ...
- Patent number 12,197,347
- Issue date Jan 14, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance interconnect
- Patent number 12,197,357
- Issue date Jan 14, 2025
- Intel Corporation
- Robert J. Safranek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, apparatuses, and methods for resource bandwidth enforcement
- Patent number 12,198,186
- Issue date Jan 14, 2025
- Intel Corporation
- Andrew Herdrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Zero latency prefetching in caches
- Patent number 12,197,334
- Issue date Jan 14, 2025
- Texas Instruments Incorporated
- Oluleye Olorode
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hold-aside buffer for uncommitted write transactions in a log struc...
- Patent number 12,197,339
- Issue date Jan 14, 2025
- Micron Technology, Inc.
- Alexander Tomlinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tiered memory caching
- Patent number 12,189,535
- Issue date Jan 7, 2025
- Advanced Micro Devices, Inc.
- Vydhyanathan Kalyanasundharam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for real-time data acquisition and retrieval using a pass-th...
- Patent number 12,192,305
- Issue date Jan 7, 2025
- DATAZOOM INC.
- Jason Thibeault
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for accelerating operations and accelerator apparatus
- Patent number 12,190,226
- Issue date Jan 7, 2025
- AIMOTIVE KFT
- Gyula Nagy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and host device
- Patent number 12,189,947
- Issue date Jan 7, 2025
- Kioxia Corporation
- Akihisa Fujimoto
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fully pipelined read-modify-write support
- Patent number 12,189,540
- Issue date Jan 7, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance interconnect
- Patent number 12,189,550
- Issue date Jan 7, 2025
- Intel Corporation
- Robert J. Safranek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable data access system and methods of eliminating controller b...
- Patent number 12,182,405
- Issue date Dec 31, 2024
- Branislav Radovanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for allocation in a victim cache system
- Patent number 12,182,038
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CONFIGURABLE CACHE FOR COHERENT SYSTEM
- Publication number 20250060873
- Publication date Feb 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...
- Publication number 20250036573
- Publication date Jan 30, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM AND METHOD FOR CONTROLLING NONVOLATILE MEMORY
- Publication number 20250036283
- Publication date Jan 30, 2025
- KIOXIA Corporation
- Hideki Yoshida
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES
- Publication number 20250028652
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Volume Duplication Using Logical Identifiers
- Publication number 20250028472
- Publication date Jan 23, 2025
- PURE STORAGE, INC.
- Ethan Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM TO ENABLE OUT-OF-ORDER PACKET PROCESSING IN A DATATYPE EN...
- Publication number 20250028640
- Publication date Jan 23, 2025
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP.
- Keith D. Underwood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE
- Publication number 20250028651
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GLOBAL COHERENCE OPERATIONS
- Publication number 20250028551
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR UPDATING MEMORY TABLES
- Publication number 20250021478
- Publication date Jan 16, 2025
- QUALCOMM Incorporated
- Manish GARG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES AND SYSTEMS INCLUDING HYBRID CACHE, AND RELATED METHODS
- Publication number 20250013364
- Publication date Jan 9, 2025
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONCURRENT WRITE OPERATIONS FOR USE WITH MULTI-THREADED FILE LOGGING
- Publication number 20250013611
- Publication date Jan 9, 2025
- Chicago Mercantile Exchange Inc.
- Kyle D. Kavanagh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SHAPES
- Publication number 20250004937
- Publication date Jan 2, 2025
- Lodestar Licensing Group, LLC
- John D. Leidel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Copy in Mesh Networks
- Publication number 20240427702
- Publication date Dec 26, 2024
- Google LLC
- Roi Yosef Leibowitch Ben Ari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...
- Publication number 20240419607
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE CONTROL CIRCUIT WITH FETCH HYSTERESIS
- Publication number 20240419324
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Matthew Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE SYSTEM AND INFORMATION PROCESSING SYSTEM FOR CONTROLLING NO...
- Publication number 20240385962
- Publication date Nov 21, 2024
- KIOXIA Corporation
- Shinichi Kanno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Address Range Based Memory Hints for Prefetcher, Cache and Memory C...
- Publication number 20240385966
- Publication date Nov 21, 2024
- Google LLC
- Xinliang David Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COHERENT MULTIPROCESSING ENABLED COMPUTE IN STORAGE AND MEMORY
- Publication number 20240378150
- Publication date Nov 14, 2024
- Intel Corporation
- Frank T. HADY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING COMMANDS IN A SEQUENTIAL WRITE REQUIRED ZONE MODEL
- Publication number 20240378151
- Publication date Nov 14, 2024
- Western Digital Technologies, Inc.
- Rotem Sela
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...
- Publication number 20240370380
- Publication date Nov 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM AND METHOD FOR CONTROLLING NONVOLATILE MEMORY
- Publication number 20240362162
- Publication date Oct 31, 2024
- KIOXIA Corporation
- Hideki Yoshida
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CMB CACHING USING HYBRID SRAM/DRAM DATA PATH
- Publication number 20240354256
- Publication date Oct 24, 2024
- Western Digital Technologies, Inc.
- Stephen GOLD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PSEUDO-RANDOM WAY SELECTION
- Publication number 20240345868
- Publication date Oct 17, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Write-Back Caching Across Clusters
- Publication number 20240329878
- Publication date Oct 3, 2024
- NetApp, Inc.
- Dipankar Roy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROL METHOD OF FLASH MEMORY CONTROLLER AND ASSOCIATED FLASH MEMO...
- Publication number 20240320142
- Publication date Sep 26, 2024
- SILICON MOTION, INC.
- Kun-Cheng Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ADDRESSING FOR ARBITRARY ENABLEMENT OR DISABLEMENT OF MEMORY...
- Publication number 20240311296
- Publication date Sep 19, 2024
- Intel Corporation
- Guadalupe J. Garcia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH WRITE MISS MERGING
- Publication number 20240296129
- Publication date Sep 5, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NAMESPACE MAPPING STRUCTURAL ADJUSTMENT IN NON-VOLATILE MEMORY DEVICES
- Publication number 20240296127
- Publication date Sep 5, 2024
- Micron Technology, Inc.
- Alex Frolikov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR WRITING DATA TO A PERSISTENT STORAGE DEVICE
- Publication number 20240295967
- Publication date Sep 5, 2024
- Daedalus Cloud LLC
- Stuart John Inglis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING METHOD AND APPARATUS, AND CACHE, PROCESSOR AND ELEC...
- Publication number 20240289275
- Publication date Aug 29, 2024
- HYGON INFORMATION TECHNOLOGY CO., LTD.
- Haifeng ZHAI
- G06 - COMPUTING CALCULATING COUNTING

Performance improvement

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Adaptive garbage collection including flash memory using age and st...

Memory system including nonvolatile memory

System and method for improved performance in a multidimensional da...

Mechanism to enable out-of-order packet processing in a datatype en...

RAM hashing in blockchain environments

Separating hashing from proof-of-work in blockchain environments

Cache writing to zones to maximize write bandwidth

Multicore, multibank, fully concurrent coherence controller

Hybrid memory module

Atomic compare and swap in a coherent cache system

Aggressive write flush scheme for a victim cache

Application-transparent near-memory processing architecture with me...

Memory devices

System probe aware last level cache insertion bypassing

Processing work items in processing logic

Dynamic allocation of cache based on instantaneous bandwidth consum...

Memory pipeline control in a hierarchical memory system

Methods and apparatus to reduce bank pressure using aggressive writ...

High performance interconnect

Systems, apparatuses, and methods for resource bandwidth enforcement

Zero latency prefetching in caches

Hold-aside buffer for uncommitted write transactions in a log struc...

Tiered memory caching

Method for real-time data acquisition and retrieval using a pass-th...

Method for accelerating operations and accelerator apparatus

Memory device and host device

Fully pipelined read-modify-write support

High performance interconnect

Scalable data access system and methods of eliminating controller b...

Methods and apparatus for allocation in a victim cache system

Patents Applicationslast 30 patents

CONFIGURABLE CACHE FOR COHERENT SYSTEM

METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...

MEMORY SYSTEM AND METHOD FOR CONTROLLING NONVOLATILE MEMORY

VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES

Volume Duplication Using Logical Identifiers

MECHANISM TO ENABLE OUT-OF-ORDER PACKET PROCESSING IN A DATATYPE EN...

ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE

GLOBAL COHERENCE OPERATIONS

SYSTEM AND METHOD FOR UPDATING MEMORY TABLES

MEMORY DEVICES AND SYSTEMS INCLUDING HYBRID CACHE, AND RELATED METHODS

CONCURRENT WRITE OPERATIONS FOR USE WITH MULTI-THREADED FILE LOGGING

MEMORY SHAPES

Memory Copy in Mesh Networks

METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...

CACHE CONTROL CIRCUIT WITH FETCH HYSTERESIS

STORAGE SYSTEM AND INFORMATION PROCESSING SYSTEM FOR CONTROLLING NO...

Address Range Based Memory Hints for Prefetcher, Cache and Memory C...

COHERENT MULTIPROCESSING ENABLED COMPUTE IN STORAGE AND MEMORY

PROCESSING COMMANDS IN A SEQUENTIAL WRITE REQUIRED ZONE MODEL

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...

MEMORY SYSTEM AND METHOD FOR CONTROLLING NONVOLATILE MEMORY

CMB CACHING USING HYBRID SRAM/DRAM DATA PATH

PSEUDO-RANDOM WAY SELECTION

Write-Back Caching Across Clusters

CONTROL METHOD OF FLASH MEMORY CONTROLLER AND ASSOCIATED FLASH MEMO...

MEMORY ADDRESSING FOR ARBITRARY ENABLEMENT OR DISABLEMENT OF MEMORY...

VICTIM CACHE WITH WRITE MISS MERGING

NAMESPACE MAPPING STRUCTURAL ADJUSTMENT IN NON-VOLATILE MEMORY DEVICES

SYSTEMS AND METHODS FOR WRITING DATA TO A PERSISTENT STORAGE DEVICE

DATA PROCESSING METHOD AND APPARATUS, AND CACHE, PROCESSOR AND ELEC...