Physical circuit design

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G06F17/5068

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions

Current Industry

G06F17/5068Physical circuit design

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Defense techniques for split manufacturing
- Patent number 10,867,937
- Issue date Dec 15, 2020
- Board of Regents, The University of Texas System
- Jeyavijayan Rajendran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for obfuscating a circuit design
- Patent number 10,671,700
- Issue date Jun 2, 2020
- efavless corporation
- Bertrand Irissou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bandwidth test in networking System-on-Chip verification
- Patent number 10,664,566
- Issue date May 26, 2020
- Mentor Graphics Corporation
- Suresh Krishnamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Predictive spatial digital design of experiment for advanced semico...
- Patent number 10,657,214
- Issue date May 19, 2020
- Applied Materials, Inc.
- Samer Banna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modeling of a design in reticle enhancement technology
- Patent number 10,657,213
- Issue date May 19, 2020
- D2S, Inc.
- P. Jeffrey Ungar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer implemented system and method for generating a layout of a...
- Patent number 10,657,215
- Issue date May 19, 2020
- ARM Limited
- Paul Christopher de Dood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross-coupled transistor circuit defined on four gate electrode tracks
- Patent number 10,658,385
- Issue date May 19, 2020
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latency test in networking system-on-chip verification
- Patent number 10,657,217
- Issue date May 19, 2020
- Mentor Graphics Corporation
- Suresh Krishnamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross-coupled transistor circuit defined on three gate electrode tr...
- Patent number 10,651,200
- Issue date May 12, 2020
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Photonic circuit design systems
- Patent number 10,650,110
- Issue date May 12, 2020
- Hewlett Packard Enterprise Development LP
- Thomas Van Vaerenbergh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method and computer-accessible medium providing secure inte...
- Patent number 10,642,947
- Issue date May 5, 2020
- New York University
- Ozgur Sinanoglu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verifying planarization performance using electrical measures
- Patent number 10,642,950
- Issue date May 5, 2020
- International Business Machines Corporation
- Romain Lallement
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Planar cavity MEMS and related structures, methods of manufacture a...
- Patent number 10,640,364
- Issue date May 5, 2020
- International Business Machines Corporation
- Christopher V. Jahnes
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Planar cavity MEMS and related structures, methods of manufacture a...
- Patent number 10,640,365
- Issue date May 5, 2020
- International Business Machines Corporation
- Christopher V. Jahnes
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method for parasitic-aware capacitor sizing and layout generation
- Patent number 10,635,771
- Issue date Apr 28, 2020
- AnaGlobe Technology, Inc.
- Po-Hung Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flow control in networking system-on-chip verification
- Patent number 10,628,548
- Issue date Apr 21, 2020
- Mentor Graphics Corporation
- Suresh Krishnamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Etch-assist features
- Patent number 10,627,722
- Issue date Apr 21, 2020
- ASML Netherlands B.V.
- Wim Tjibbo Tel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing integrated circuit designs based on interactions between...
- Patent number 10,628,544
- Issue date Apr 21, 2020
- International Business Machines Corporation
- Dureseti Chidambarrao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prototype wiring synthesis
- Patent number 10,625,692
- Issue date Apr 21, 2020
- Mentor Graphics Corporation
- Simon Holdsworth
- B60 - VEHICLES IN GENERAL
Information Patent Grant
IC die having patterned seal rings
- Patent number 10,622,317
- Issue date Apr 14, 2020
- Marvell Israel (M.I.S.L) Ltd.
- Abed Tatour
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
IC chips containing a mixture of standard cells obtained from an or...
- Patent number 10,622,344
- Issue date Apr 14, 2020
- PDF Solutions, Inc.
- Jonathan Haigh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Planar cavity MEMS and related structures, methods of manufacture a...
- Patent number 10,618,802
- Issue date Apr 14, 2020
- International Business Machines Corporation
- Anthony K. Stamper
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Planar cavity MEMS and related structures, methods of manufacture a...
- Patent number 10,618,803
- Issue date Apr 14, 2020
- International Business Machines Corporation
- Christopher V. Jahnes
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Apparatus for predicting yield of semiconductor integrated circuit...
- Patent number 10,614,186
- Issue date Apr 7, 2020
- Samsung Electronics Co., Ltd.
- Seong Ryeol Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing placement and routing concurrently
- Patent number 10,614,191
- Issue date Apr 7, 2020
- Xilinx, Inc.
- Henri Fraisse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of manufacturing semiconductor devices by etching active fi...
- Patent number 10,615,080
- Issue date Apr 7, 2020
- Samsung Electronics Co., Ltd.
- Min-Chul Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power mode-based operational capability-aware code coverage
- Patent number 10,614,193
- Issue date Apr 7, 2020
- Mentor Graphics Corporation
- Pankaj Kumar Dwivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory cell layout for low current field-induced MRAM
- Patent number 10,606,973
- Issue date Mar 31, 2020
- III Holdings 1, LLC
- Krishnakumar Mani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for dynamic visual guidance of mutually paired co...
- Patent number 10,606,974
- Issue date Mar 31, 2020
- Cadence Design Systems, Inc.
- Amiya Acharya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphical view and debug for coverage-point negative hint
- Patent number 10,606,977
- Issue date Mar 31, 2020
- Synopsys, Inc.
- Alexander John Wakefield
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
NOISE IMPACT ON FUNCTION (NIOF) REDUCTION FOR INTEGRATED CIRCUIT DE...
- Publication number 20210073346
- Publication date Mar 11, 2021
- International Business Machines Corporation
- Jose Neves
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LAYOUT STRUCTURE OF MEMORY ARRAY
- Publication number 20210012846
- Publication date Jan 14, 2021
- Taiwan Semiconductor Manufacturing company Ltd.
- MENG-SHENG CHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK CROSSING INTERFACE FOR INTEGRATED CIRCUIT GENERATION
- Publication number 20210011981
- Publication date Jan 14, 2021
- SiFive, Inc.
- Henry Cook
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC BOOSTING TECHNIQUES FOR MEMORY
- Publication number 20200411128
- Publication date Dec 31, 2020
- International Business Machines Corporation
- Kotb Jabeur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK GATE LATENCY MODELING BASED ON ANALYTICAL FRAMEWORKS
- Publication number 20200401669
- Publication date Dec 24, 2020
- Samsung Electronics Co., Ltd.
- Naman GUPTA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERVER AND PRINTED CIRCUIT BOARD PRINTING METHOD
- Publication number 20200383212
- Publication date Dec 3, 2020
- HONGFUJIN PRECISION ELECTRONICS(TIANJIN)CO.,LTD.
- YAO-HUA GONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR ESL MODELING OF MACHINE LEARNING
- Publication number 20200372124
- Publication date Nov 26, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kai-Yuan TING
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LANE DATA PROCESSING CIRCUIT AND SYSTEM
- Publication number 20200326947
- Publication date Oct 15, 2020
- SK HYNIX INC.
- Chin-Sen HSU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CYCLE LATCH TREE SYNTHESIS
- Publication number 20200311221
- Publication date Oct 1, 2020
- International Business Machines Corporation
- Lakshmi N. Reddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Visualization of Three-Dimensional Semiconductor Structures
- Publication number 20200271595
- Publication date Aug 27, 2020
- KLA-Tencor Corporation
- Aaron J. Rosenberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHARACTERIZATION OF SPATIAL CORRELATION IN INTEGRATED CIRCUIT DEVEL...
- Publication number 20200257769
- Publication date Aug 13, 2020
- International Business Machines Corporation
- Ning Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FILL PROCESS OPTIMIZATION USING FEATURE SCALE MODELING
- Publication number 20200242209
- Publication date Jul 30, 2020
- LAM RESEARCH CORPORATION
- Michael Bowes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING DEVICE, SIMULATION SUPPORT DEVICE, AND NON-TRANSITORY COM...
- Publication number 20200242203
- Publication date Jul 30, 2020
- Toshiba Memory Corporation
- Chika TANAKA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF DESIGNING A LAYOUT OF A STATIC RANDOM ACCESS MEMORY PATTERN
- Publication number 20200212052
- Publication date Jul 2, 2020
- UNITED MICROELECTRONICS CORP.
- Yu-Chang Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIELECTRIC RESONANT ANTENNA BASED NMOSFET TERAHERTZ DETECTOR AND ME...
- Publication number 20200203843
- Publication date Jun 25, 2020
- Guangdong University of Technology
- Jianguo MA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20200203167
- Publication date Jun 25, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Jen CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRINTED CIRCUIT BOARD DESIGN
- Publication number 20200184034
- Publication date Jun 11, 2020
- International Business Machines Corporation
- Michael A. Christo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD WITH OPTIMIZED POLYMER AND METAL STRUCTURAL COMPO...
- Publication number 20200187394
- Publication date Jun 11, 2020
- HONEYWELL INTERNATIONAL INC.
- Gokul Murugesan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System on Chip (SOC) Current Profile Model for Integrated Voltage R...
- Publication number 20200175129
- Publication date Jun 4, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Haohua Zhou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR GENERATING PHOTOMASK PATTERNS
- Publication number 20200133134
- Publication date Apr 30, 2020
- Taiwan Semiconductor Manufacturing company Ltd.
- YEN-TUNG HU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATED GENERATION OF ELECTRONICS SCHEMATICS WITH SINGLE WIRE TRA...
- Publication number 20200125689
- Publication date Apr 23, 2020
- Caterpillar Inc.
- Jarett S. Karnia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CELL HAVING STACKED PICK-UP REGION
- Publication number 20200126901
- Publication date Apr 23, 2020
- Taiwan Semiconductor Manufacturing company Ltd.
- Chung-Hui CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMALLY DRIVING NON-UNIFORM CLOCK MESH LOADS
- Publication number 20200117230
- Publication date Apr 16, 2020
- International Business Machines Corportation
- Matthias Ringe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Accelerated Access to Computations Results Generated from Data Stor...
- Publication number 20200117449
- Publication date Apr 16, 2020
- Micron Technology, Inc.
- Gil Golov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREDICTIVE SPATIAL DIGITAL DESIGN OF EXPERIMENT FOR ADVANCED SEMICO...
- Publication number 20200110852
- Publication date Apr 9, 2020
- Applied Materials, Inc.
- Samer BANNA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Input Logic Circuitry
- Publication number 20200104444
- Publication date Apr 2, 2020
- ARM Limited
- Anil Kumar Baratam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID POWER RAIL STRUCTURE
- Publication number 20200105671
- Publication date Apr 2, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wei-An LAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interconnect Structure for Logic Circuit
- Publication number 20200098686
- Publication date Mar 26, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Fang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Elmore Delay Time (EDT)-Based Resistance Model
- Publication number 20200089830
- Publication date Mar 19, 2020
- Synopsys, Inc.
- Ralph Benhart IVERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR ENGINEERING INTEGRATED CIRCUIT DESIGN AND DEVELOPMENT
- Publication number 20200089833
- Publication date Mar 19, 2020
- efabless corporation
- Bertrand Irissou
- G06 - COMPUTING CALCULATING COUNTING

Physical circuit design

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Defense techniques for split manufacturing

Systems and methods for obfuscating a circuit design

Bandwidth test in networking System-on-Chip verification

Predictive spatial digital design of experiment for advanced semico...

Modeling of a design in reticle enhancement technology

Computer implemented system and method for generating a layout of a...

Cross-coupled transistor circuit defined on four gate electrode tracks

Latency test in networking system-on-chip verification

Cross-coupled transistor circuit defined on three gate electrode tr...

Photonic circuit design systems

System, method and computer-accessible medium providing secure inte...

Verifying planarization performance using electrical measures

Planar cavity MEMS and related structures, methods of manufacture a...

Planar cavity MEMS and related structures, methods of manufacture a...

Method for parasitic-aware capacitor sizing and layout generation

Flow control in networking system-on-chip verification

Etch-assist features

Optimizing integrated circuit designs based on interactions between...

Prototype wiring synthesis

IC die having patterned seal rings

IC chips containing a mixture of standard cells obtained from an or...

Planar cavity MEMS and related structures, methods of manufacture a...

Planar cavity MEMS and related structures, methods of manufacture a...

Apparatus for predicting yield of semiconductor integrated circuit...

Performing placement and routing concurrently

Methods of manufacturing semiconductor devices by etching active fi...

Power mode-based operational capability-aware code coverage

Memory cell layout for low current field-induced MRAM

System and method for dynamic visual guidance of mutually paired co...

Graphical view and debug for coverage-point negative hint

Patents Applicationslast 30 patents

NOISE IMPACT ON FUNCTION (NIOF) REDUCTION FOR INTEGRATED CIRCUIT DE...

LAYOUT STRUCTURE OF MEMORY ARRAY

CLOCK CROSSING INTERFACE FOR INTEGRATED CIRCUIT GENERATION

DYNAMIC BOOSTING TECHNIQUES FOR MEMORY

CLOCK GATE LATENCY MODELING BASED ON ANALYTICAL FRAMEWORKS

SERVER AND PRINTED CIRCUIT BOARD PRINTING METHOD

SYSTEM AND METHOD FOR ESL MODELING OF MACHINE LEARNING

MULTI-LANE DATA PROCESSING CIRCUIT AND SYSTEM

MULTI-CYCLE LATCH TREE SYNTHESIS

Visualization of Three-Dimensional Semiconductor Structures

CHARACTERIZATION OF SPATIAL CORRELATION IN INTEGRATED CIRCUIT DEVEL...

FILL PROCESS OPTIMIZATION USING FEATURE SCALE MODELING

COMPUTING DEVICE, SIMULATION SUPPORT DEVICE, AND NON-TRANSITORY COM...

METHOD OF DESIGNING A LAYOUT OF A STATIC RANDOM ACCESS MEMORY PATTERN

DIELECTRIC RESONANT ANTENNA BASED NMOSFET TERAHERTZ DETECTOR AND ME...

SEMICONDUCTOR DEVICE

PRINTED CIRCUIT BOARD DESIGN

SYSTEM AND METHOD WITH OPTIMIZED POLYMER AND METAL STRUCTURAL COMPO...

System on Chip (SOC) Current Profile Model for Integrated Voltage R...

METHOD AND SYSTEM FOR GENERATING PHOTOMASK PATTERNS

AUTOMATED GENERATION OF ELECTRONICS SCHEMATICS WITH SINGLE WIRE TRA...

CELL HAVING STACKED PICK-UP REGION

OPTIMALLY DRIVING NON-UNIFORM CLOCK MESH LOADS

Accelerated Access to Computations Results Generated from Data Stor...

PREDICTIVE SPATIAL DIGITAL DESIGN OF EXPERIMENT FOR ADVANCED SEMICO...

Multi-Input Logic Circuitry

HYBRID POWER RAIL STRUCTURE

Interconnect Structure for Logic Circuit

Elmore Delay Time (EDT)-Based Resistance Model

METHODS FOR ENGINEERING INTEGRATED CIRCUIT DESIGN AND DEVELOPMENT