Saturation

Industry

CPC
G06F7/49921

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled

Current Industry

G06F7/49921Saturation

Industries

Please log in for detailed analytics

Patents Grantslast 30 patents

Information Patent Grant
Neural network device, method of operating the neural network devic...
- Patent number 12,079,591
- Issue date Sep 3, 2024
- Samsung Electronics Co., Ltd.
- Hyunpil Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic circuitry for power-efficient multiply-add operations
- Patent number 11,327,718
- Issue date May 10, 2022
- Kabushiki Kaisha Toshiba
- Tatsuya Namatame
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for performing vector max/min instructions that...
- Patent number 10,922,080
- Issue date Feb 16, 2021
- Intel Corporation
- Sunny L. Gogar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for vector processing
- Patent number 9,916,130
- Issue date Mar 13, 2018
- ARM Limited
- David Raymond Lutz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Exponent monitoring
- Patent number 9,886,239
- Issue date Feb 6, 2018
- ARM Limited
- Guy Larri
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for performing conversion operation
- Patent number 9,778,906
- Issue date Oct 3, 2017
- ARM Limited
- David Raymond Lutz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Vector operands with component representing different significance...
- Patent number 9,766,858
- Issue date Sep 19, 2017
- ARM Limited
- David Raymond Lutz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data processing apparatus and method using programmable significanc...
- Patent number 9,766,857
- Issue date Sep 19, 2017
- ARM Limited
- David Raymond Lutz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Division circuit and microprocessor
- Patent number 9,747,074
- Issue date Aug 29, 2017
- Kabushiki Kaisha Toshiba
- Toru Sano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Exception generation when generating a result value with programmab...
- Patent number 9,703,529
- Issue date Jul 11, 2017
- ARM Limited
- David Raymond Lutz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Significance alignment
- Patent number 9,690,543
- Issue date Jun 27, 2017
- ARM Limited
- David Raymond Lutz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for performing conversion operation
- Patent number 9,665,347
- Issue date May 30, 2017
- ARM Limited
- David Raymond Lutz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Predicting saturation in a shift operation
- Patent number 9,564,187
- Issue date Feb 7, 2017
- ARM Limited
- David Raymond Lutz
- G11 - INFORMATION STORAGE
Information Patent Grant
Orderly storing of corresponding packed bytes from first and second...
- Patent number 9,389,858
- Issue date Jul 12, 2016
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packing saturated lower 8-bit elements from two source registers of...
- Patent number 9,361,100
- Issue date Jun 7, 2016
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and related methods for overflow detection and clamping...
- Patent number 9,256,577
- Issue date Feb 9, 2016
- Micron Technology, Inc.
- Ole Bentz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interleaving half of packed data elements of size specified in inst...
- Patent number 9,223,572
- Issue date Dec 29, 2015
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Executing unpack instruction and pack instruction with saturation o...
- Patent number 9,182,983
- Issue date Nov 10, 2015
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor executing unpack and pack instructions specifying two sou...
- Patent number 9,141,387
- Issue date Sep 22, 2015
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packing in destination register half of each element with saturatio...
- Patent number 9,116,687
- Issue date Aug 25, 2015
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packing odd bytes from two source registers of packed data
- Patent number 9,015,453
- Issue date Apr 21, 2015
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,793,299
- Issue date Jul 29, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic logic unit for use within a flight control system
- Patent number 8,745,117
- Issue date Jun 3, 2014
- Honeywell International Inc.
- Jason Bickler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,745,119
- Issue date Jun 3, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor for performing multiply-add operations on packed data
- Patent number 8,725,787
- Issue date May 13, 2014
- Intel Corporation
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packing signed word elements from two source registers to saturated...
- Patent number 8,639,914
- Issue date Jan 28, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing multiply-add operations on pack...
- Patent number 8,626,814
- Issue date Jan 7, 2014
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic logic unit for use within a flight control system
- Patent number 8,615,540
- Issue date Dec 24, 2013
- Honeywell International Inc.
- Jason Bickler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Saturation and rounding in multiply-accumulate blocks
- Patent number 8,615,543
- Issue date Dec 24, 2013
- Altera Corporation
- Leon Zheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Execution of instruction with element size control bit to interleav...
- Patent number 8,601,246
- Issue date Dec 3, 2013
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ARITHMETIC CIRCUITRY
- Publication number 20210294572
- Publication date Sep 23, 2021
- Kabushiki Kaisha Toshiba
- Tatsuya NAMATAME
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PERFORMING INSTRUCTIONS SPECIFYING VECTOR T...
- Publication number 20200104132
- Publication date Apr 2, 2020
- Intel Corporation
- Sunny L. GOGAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, APPARATUSES, AND METHODS FOR VECTOR-PACKED FRACTIONAL MULT...
- Publication number 20200073635
- Publication date Mar 5, 2020
- Intel Corporation
- Venkateswara R. MADDURI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FIXED POINT DIVISION CIRCUIT UTILIZING FLOATING POINT ARCHITECTURE
- Publication number 20140195581
- Publication date Jul 10, 2014
- Analog Devices, Inc.
- Paul S. WILKINS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARITHMETIC LOGIC UNIT FOR USE WITHIN A FLIGHT CONTROL SYSTEM
- Publication number 20140046991
- Publication date Feb 13, 2014
- Jason Bickler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130262547
- Publication date Oct 3, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130262836
- Publication date Oct 3, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130219151
- Publication date Aug 22, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130198254
- Publication date Aug 1, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND RELATED METHODS FOR OVERFLOW DETECTION AND CLAMPING...
- Publication number 20130151579
- Publication date Jun 13, 2013
- Micron Technology, Inc.
- Ole Bentz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unpacking Packed Data
- Publication number 20130124830
- Publication date May 16, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unpacking Packed Data
- Publication number 20130124834
- Publication date May 16, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Packing Packed Data
- Publication number 20130124831
- Publication date May 16, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unpacking Packed Data
- Publication number 20130124833
- Publication date May 16, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unpacking Packed Data
- Publication number 20130124832
- Publication date May 16, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Packing Packed Data
- Publication number 20130124835
- Publication date May 16, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Packing Packed Data
- Publication number 20130117539
- Publication date May 9, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unpacking Packed Data
- Publication number 20130117538
- Publication date May 9, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR UNPACKING PACKED DATA
- Publication number 20130117540
- Publication date May 9, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unpacking Packed Data
- Publication number 20130117537
- Publication date May 9, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Unpacking and Moving Packed Data
- Publication number 20130117547
- Publication date May 9, 2013
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20130091190
- Publication date Apr 11, 2013
- Intel Corporation
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20120331028
- Publication date Dec 27, 2012
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA
- Publication number 20120216018
- Publication date Aug 23, 2012
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessor Having Novel Operations
- Publication number 20120198210
- Publication date Aug 2, 2012
- ALEXANDER PELEG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACK...
- Publication number 20110264895
- Publication date Oct 27, 2011
- Alexander D. Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessor having novel operations
- Publication number 20110219214
- Publication date Sep 8, 2011
- Alexander Peleg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PACKING DATA
- Publication number 20110093682
- Publication date Apr 21, 2011
- ALEXANDER PELEG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARITHMETIC LOGIC UNIT FOR USE WITHIN A FLIGHT CONTROL SYSTEM
- Publication number 20110022910
- Publication date Jan 27, 2011
- Honeywell International Inc.
- Jason Bickler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DSP Engine with Implicit Mixed Sign Operands
- Publication number 20100306292
- Publication date Dec 2, 2010
- MICROCHIP TECHNOLOGY INCORPORATED
- Michael I. Catherwood
- G06 - COMPUTING CALCULATING COUNTING

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Neural network device, method of operating the neural network devic...

Arithmetic circuitry for power-efficient multiply-add operations

Systems and methods for performing vector max/min instructions that...

Apparatus and method for vector processing

Exponent monitoring

Apparatus and method for performing conversion operation

Vector operands with component representing different significance...

Data processing apparatus and method using programmable significanc...

Division circuit and microprocessor

Exception generation when generating a result value with programmab...

Significance alignment

Apparatus and method for performing conversion operation

Predicting saturation in a shift operation

Orderly storing of corresponding packed bytes from first and second...

Packing saturated lower 8-bit elements from two source registers of...

Apparatuses and related methods for overflow detection and clamping...

Interleaving half of packed data elements of size specified in inst...

Executing unpack instruction and pack instruction with saturation o...

Processor executing unpack and pack instructions specifying two sou...

Packing in destination register half of each element with saturatio...

Packing odd bytes from two source registers of packed data

Processor for performing multiply-add operations on packed data

Arithmetic logic unit for use within a flight control system

Processor for performing multiply-add operations on packed data

Processor for performing multiply-add operations on packed data

Packing signed word elements from two source registers to saturated...

Method and apparatus for performing multiply-add operations on pack...

Arithmetic logic unit for use within a flight control system

Saturation and rounding in multiply-accumulate blocks

Execution of instruction with element size control bit to interleav...

Patents Applicationslast 30 patents

ARITHMETIC CIRCUITRY

SYSTEMS AND METHODS FOR PERFORMING INSTRUCTIONS SPECIFYING VECTOR T...

SYSTEMS, APPARATUSES, AND METHODS FOR VECTOR-PACKED FRACTIONAL MULT...

FIXED POINT DIVISION CIRCUIT UTILIZING FLOATING POINT ARCHITECTURE

ARITHMETIC LOGIC UNIT FOR USE WITHIN A FLIGHT CONTROL SYSTEM

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

APPARATUSES AND RELATED METHODS FOR OVERFLOW DETECTION AND CLAMPING...

Method and Apparatus for Unpacking Packed Data

Method and Apparatus for Unpacking Packed Data

Method and Apparatus for Packing Packed Data

Method and Apparatus for Unpacking Packed Data

Method and Apparatus for Unpacking Packed Data

Method and Apparatus for Packing Packed Data

Method and Apparatus for Packing Packed Data

Method and Apparatus for Unpacking Packed Data

METHOD AND APPARATUS FOR UNPACKING PACKED DATA

Method and Apparatus for Unpacking Packed Data

Method and Apparatus for Unpacking and Moving Packed Data

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

PROCESSOR FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACKED DATA

Microprocessor Having Novel Operations

METHOD AND APPARATUS FOR PERFORMING MULTIPLY-ADD OPERATIONS ON PACK...

Microprocessor having novel operations

METHOD AND APPARATUS FOR PACKING DATA

ARITHMETIC LOGIC UNIT FOR USE WITHIN A FLIGHT CONTROL SYSTEM

DSP Engine with Implicit Mixed Sign Operands