Systolic arrays

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G06F15/8046

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F15/00Digital computers in general Data processing equipment in general

Current Industry

G06F15/8046Systolic arrays

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for improving cache efficiency and utilization
- Patent number 12,210,477
- Issue date Jan 28, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor data access and sharing
- Patent number 12,204,487
- Issue date Jan 21, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplier and adder in systolic array
- Patent number 12,197,890
- Issue date Jan 14, 2025
- Google LLC
- Doe Hyun Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for multiplying matrices using a plurality of chiplets
- Patent number 12,197,534
- Issue date Jan 14, 2025
- Persimmons, Inc.
- James Michael Bodwin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-circuit utilization monitoring for a systolic array
- Patent number 12,197,308
- Issue date Jan 14, 2025
- Amazon Technologies, Inc.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture for block sparse operations on a systolic array
- Patent number 12,198,222
- Issue date Jan 14, 2025
- Intel Corporation
- Abhishek Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual pipeline parallel systolic array
- Patent number 12,189,571
- Issue date Jan 7, 2025
- Intel Corporation
- Jorge Parra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing elements array that includes delay queues between proces...
- Patent number 12,190,224
- Issue date Jan 7, 2025
- Industrial Technology Research Institute
- Yao-Hua Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error checking for systolic array computation
- Patent number 12,189,472
- Issue date Jan 7, 2025
- Google LLC
- Doe Hyun Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using sparsity metadata to reduce systolic array power consumption
- Patent number 12,190,158
- Issue date Jan 7, 2025
- Intel Corporation
- Jorge Parra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,182,062
- Issue date Dec 31, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple accumulate busses in a systolic array
- Patent number 12,182,064
- Issue date Dec 31, 2024
- Amazon Technologies, Inc.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and computer-readable medium for parallelization...
- Patent number 12,174,784
- Issue date Dec 24, 2024
- Cornami, Inc.
- Solomon Harsha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor instruction dispatch configuration
- Patent number 12,175,287
- Issue date Dec 24, 2024
- Groq, Inc.
- Brian Lee Kurtz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic array of arbitrary physical and logical depth
- Patent number 12,174,783
- Issue date Dec 24, 2024
- Intel Corporation
- Jorge Parra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,153,541
- Issue date Nov 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic disaggregation within a matrix accelerator architecture
- Patent number 12,141,094
- Issue date Nov 12, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculation circuit and deep learning system including the same
- Patent number 12,141,545
- Issue date Nov 12, 2024
- SK Hynix Inc.
- Ji Hoon Nam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic array, systolic array system, computation method, device,...
- Patent number 12,141,095
- Issue date Nov 12, 2024
- Nanjing SemiDrive Technology LTD.
- Yu Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,099,461
- Issue date Sep 24, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression techniques
- Patent number 12,093,210
- Issue date Sep 17, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computing efficient cross channel operations in parallel computing...
- Patent number 12,093,213
- Issue date Sep 17, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Random sparsity handling in a systolic array
- Patent number 12,086,205
- Issue date Sep 10, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor operation scheduling for deterministic latency
- Patent number 12,079,155
- Issue date Sep 3, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic array including fused multiply accumulate with efficient p...
- Patent number 12,067,375
- Issue date Aug 20, 2024
- Amazon Technologies, Inc.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,066,975
- Issue date Aug 20, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable sparse matrix multiply acceleration using systolic arrays...
- Patent number 12,039,001
- Issue date Jul 16, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory operation for systolic array
- Patent number 12,026,607
- Issue date Jul 2, 2024
- Amazon Technologies, Inc.
- Jeffrey T. Huynh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic array device
- Patent number 12,019,582
- Issue date Jun 25, 2024
- SAPEON KOREA INC.
- Seung Rok Jung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile architecture for graphics operations
- Patent number 12,013,808
- Issue date Jun 18, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY
- Publication number 20250028675
- Publication date Jan 23, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable Processing Element for a Systolic Array
- Publication number 20250028785
- Publication date Jan 23, 2025
- SambaNova Systems, Inc.
- Mark William Gottscho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE MEMORY MANAGEMENT
- Publication number 20250004981
- Publication date Jan 2, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE SPARSE MATRIX MULTIPLY ACCELERATION USING SYSTOLIC ARRAYS...
- Publication number 20240427847
- Publication date Dec 26, 2024
- Intel Corporation
- SUBRAMANIAM MAIYURAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE, SCALABLE GRAPH-PROCESSING ACCELERATOR
- Publication number 20240419735
- Publication date Dec 19, 2024
- ADVANCED MICRO DEVICES, INC.
- Ganesh Dasika
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS FOR ACCELERATING NEURAL NETWORKS
- Publication number 20240419494
- Publication date Dec 19, 2024
- University-Industry Foundation, Yonsei University
- Youngsok KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL EXECUTION OF SELF-ATTENTION-BASED AI MODELS
- Publication number 20240419516
- Publication date Dec 19, 2024
- Etched.ai, Inc.
- Gavin UBERTI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20240411717
- Publication date Dec 12, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSION TECHNIQUES
- Publication number 20240403259
- Publication date Dec 5, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CHIP SYSTOLIC ARRAYS
- Publication number 20240378175
- Publication date Nov 14, 2024
- Etched.ai, Inc.
- Gavin UBERTI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systolic Memory Access
- Publication number 20240370403
- Publication date Nov 7, 2024
- Micron Technology, Inc.
- Febin Sunny
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...
- Publication number 20240362180
- Publication date Oct 31, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTOLIC ARRAY INCLUDING FUSED MULTIPLY ACCUMULATE WITH EFFICIENT P...
- Publication number 20240361986
- Publication date Oct 31, 2024
- AMAZON TECHNOLOGIES, INC.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY MATRIX MULTIPLY UNIT
- Publication number 20240362298
- Publication date Oct 31, 2024
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-tile Memory Management for Detecting Cross Tile Access Provid...
- Publication number 20240345990
- Publication date Oct 17, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UTILIZING STRUCTURED SPARSITY IN SYSTOLIC ARRAYS
- Publication number 20240320000
- Publication date Sep 26, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS
- Publication number 20240320184
- Publication date Sep 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY MATRIX MULTIPLY UNIT
- Publication number 20240303297
- Publication date Sep 12, 2024
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Domain Adaptive Processor For Wireless Communication
- Publication number 20240273058
- Publication date Aug 15, 2024
- The Regents of the University of Michigan
- Hun-seok KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable Parallel Processing
- Publication number 20240264975
- Publication date Aug 8, 2024
- XDL Technologies Inc.
- Yuan Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR DATA ACCESS AND SHARING
- Publication number 20240256483
- Publication date Aug 1, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Modal Systolic Array For Matrix Multiplication
- Publication number 20240220202
- Publication date Jul 4, 2024
- Google LLC
- Matthew Leever Hedlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECONFIGURABLE PROCESSING-IN-MEMORY LOGIC USING LOOK-UP TABLES
- Publication number 20240220272
- Publication date Jul 4, 2024
- Lodestar Licensing Group LLC
- Dmitri Yudanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE AND CONFIGURABLE CLUSTERED SYSTOLIC ARRAY
- Publication number 20240220448
- Publication date Jul 4, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC MEMORY RECONFIGURATION
- Publication number 20240184739
- Publication date Jun 6, 2024
- Intel Corporation
- Joydeep RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE AND METHOD WITH BATCH NORMALIZATION
- Publication number 20240184630
- Publication date Jun 6, 2024
- Samsung Electronics Co., Ltd.
- Jung Ho AHN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROTATING DATA FOR NEURAL NETWORK COMPUTATIONS
- Publication number 20240185047
- Publication date Jun 6, 2024
- Google LLC
- Jonathan Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA STREAM PROTOCOL FIELD DECODING BY A SYSTOLIC ARRAY
- Publication number 20240176760
- Publication date May 30, 2024
- SECTURION SYSTEMS, INC.
- JORDAN ANDERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CROSS-THREAD REGISTER SHARING FOR MATRIX MULTIPLICATION COMPUTE
- Publication number 20240168807
- Publication date May 23, 2024
- Intel Corporation
- Jorge Eduardo Parra Osorio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE FOR BLOCK SPARSE OPERATIONS ON A SYSTOLIC ARRAY
- Publication number 20240161227
- Publication date May 16, 2024
- Intel Corporation
- Abhishek Appu
- G06 - COMPUTING CALCULATING COUNTING

Systolic arrays

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Systems and methods for improving cache efficiency and utilization

Graphics processor data access and sharing

Multiplier and adder in systolic array

Methods for multiplying matrices using a plurality of chiplets

On-circuit utilization monitoring for a systolic array

Architecture for block sparse operations on a systolic array

Dual pipeline parallel systolic array

Processing elements array that includes delay queues between proces...

Error checking for systolic array computation

Using sparsity metadata to reduce systolic array power consumption

Multi-tile memory management

Multiple accumulate busses in a systolic array

Method, apparatus, and computer-readable medium for parallelization...

Processor instruction dispatch configuration

Systolic array of arbitrary physical and logical depth

Cache structure and utilization

Systolic disaggregation within a matrix accelerator architecture

Calculation circuit and deep learning system including the same

Systolic array, systolic array system, computation method, device,...

Multi-tile memory management

Compression techniques

Computing efficient cross channel operations in parallel computing...

Random sparsity handling in a systolic array

Graphics processor operation scheduling for deterministic latency

Systolic array including fused multiply accumulate with efficient p...

Cache structure and utilization

Scalable sparse matrix multiply acceleration using systolic arrays...

Memory operation for systolic array

Systolic array device

Multi-tile architecture for graphics operations

Patents Applicationslast 30 patents

GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY

Reconfigurable Processing Element for a Systolic Array

MULTI-TILE MEMORY MANAGEMENT

SCALABLE SPARSE MATRIX MULTIPLY ACCELERATION USING SYSTOLIC ARRAYS...

FLEXIBLE, SCALABLE GRAPH-PROCESSING ACCELERATOR

APPARATUS FOR ACCELERATING NEURAL NETWORKS

PARALLEL EXECUTION OF SELF-ATTENTION-BASED AI MODELS

CACHE STRUCTURE AND UTILIZATION

COMPRESSION TECHNIQUES

MULTI-CHIP SYSTOLIC ARRAYS

Systolic Memory Access

GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...

SYSTOLIC ARRAY INCLUDING FUSED MULTIPLY ACCUMULATE WITH EFFICIENT P...

LOW LATENCY MATRIX MULTIPLY UNIT

Multi-tile Memory Management for Detecting Cross Tile Access Provid...

UTILIZING STRUCTURED SPARSITY IN SYSTOLIC ARRAYS

MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS

LOW LATENCY MATRIX MULTIPLY UNIT

Domain Adaptive Processor For Wireless Communication

Reconfigurable Parallel Processing

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

Multi-Modal Systolic Array For Matrix Multiplication

RECONFIGURABLE PROCESSING-IN-MEMORY LOGIC USING LOOK-UP TABLES

SCALABLE AND CONFIGURABLE CLUSTERED SYSTOLIC ARRAY

DYNAMIC MEMORY RECONFIGURATION

DEVICE AND METHOD WITH BATCH NORMALIZATION

ROTATING DATA FOR NEURAL NETWORK COMPUTATIONS

DATA STREAM PROTOCOL FIELD DECODING BY A SYSTOLIC ARRAY

CROSS-THREAD REGISTER SHARING FOR MATRIX MULTIPLICATION COMPUTE

ARCHITECTURE FOR BLOCK SPARSE OPERATIONS ON A SYSTOLIC ARRAY